The path::operator/=(const Source&) and path::append overloads were
still following the semantics of the Filesystem TS not C++17. Only
the path::operator/=(const path&) overload was correct.
This change adds more tests for path::operator/=(const path&) and adds
new tests to verify that the other append operations have equivalent
behaviour.
PR libstdc++/84159
* include/bits/fs_path.h (path::operator/=, path::append): Construct
temporary path before calling _M_append.
(path::_M_append): Change parameter to path and implement C++17
semantics.
* testsuite/27_io/filesystem/path/append/path.cc: Add helper function
and more examples from the standard.
* testsuite/27_io/filesystem/path/append/source.cc: New.
* testsuite/27_io/filesystem/path/decompose/filename.cc: Add comment.
* testsuite/27_io/filesystem/path/nonmember/append.cc: New.
From-SVN: r260255
2018-05-15 Richard Biener <rguenther@suse.de>
* tree-ssa-dse.c (dse_classify_store): Remove use_stmt parameter,
add by_clobber_p one. Change algorithm to collect all defs
representing uses we need to walk and try reducing them to
a single one before failing.
(dse_dom_walker::dse_optimize_stmt): Adjust.
* gcc.dg/tree-ssa/ssa-dse-31.c: New testcase.
From-SVN: r260253
For older DWARF and -gsplit-dwarf we want to emit DW_OP_GNU_addr_index
and DW_OP_GNU_const_index, but for DWARF5 we should use DW_OP_addrx
and DW_OP_constx.
gcc/ChangeLog:
* dwarf2out.c (dwarf_OP): Handle DW_OP_addrx and DW_OP_constx.
(size_of_loc_descr): Likewise.
(output_loc_operands): Likewise.
(output_loc_operands_raw): Likewise.
(dw_addr_op): Use dwarf_OP () for DW_OP_constx and DW_OP_addrx.
(resolve_addr_in_expr): Handle DW_OP_addrx and DW_OP_constx.
(hash_loc_operands): Likewise.
(compare_loc_operands): Likewise.
From-SVN: r260252
The length in the .debug_addr unit header was calculated using the number
of elements in the addr_index_table. This is wrong because the entries in
the table are refcounted and only those with a refcount > 0 are actually
put in the index. Add a helper function count_index_addrs to get the
correct number of addresses in the index.
gcc/ChangeLog:
* dwarf2out.c (count_index_addrs): New function.
(dwarf2out_finish): Use count_index_addrs to calculate addrs_length.
From-SVN: r260251
2018-05-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR ipa/85734
* ipa-pure-const.c (warn_function_malloc): Pass value of known_finite param
as true in call to suggest_attribute.
testsuite/
* gcc.dg/ipa/pr85734.c: New test.
From-SVN: r260249
* tree.c (build_cp_fntype_variant): New.
(build_ref_qualified_type, build_exception_variant)
(strip_typedefs, cxx_copy_lang_qualifiers): Use it.
(cxx_type_hash_eq, cp_check_qualified_type): Check
TYPE_HAS_LATE_RETURN_TYPE.
(cp_build_type_attribute_variant): Check cxx_type_hash_eq.
(cp_build_qualified_type_real): No need to preserve C++ qualifiers.
* class.c (build_clone): Use cxx_copy_lang_qualifiers.
(adjust_clone_args): Likewise.
* decl.c (grokfndecl): Add late_return_type_p parameter. Use
build_cp_fntype_variant.
(grokdeclarator): Pass late_return_type_p to grokfndecl.
(check_function_type): Use cxx_copy_lang_qualifiers.
(static_fn_type): Use cxx_copy_lang_qualifiers.
* decl2.c (build_memfn_type, maybe_retrofit_in_chrg)
(cp_reconstruct_complex_type, coerce_new_type, coerce_delete_type)
(change_return_type): Use cxx_copy_lang_qualifiers.
* mangle.c (write_type): Use cxx_copy_lang_qualifiers.
* parser.c (cp_parser_lambda_declarator_opt): Represent an explicit
return type on the declarator like a normal trailing return type.
* pt.c (tsubst_function_type): Use build_cp_fntype_variant.
(copy_default_args_to_explicit_spec): Use cxx_copy_lang_qualifiers.
* typeck.c (merge_types): Use build_cp_fntype_variant.
From-SVN: r260238
For some reason I made both an @item and an @itemx for
-mreadonly-in-sdata. This fixes it.
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete @itemx for
-mreadonly-in-sdata.
From-SVN: r260237
PR libstdc++/81256
* include/bits/fstream.tcc (basic_filebuf::close): Do not swallow
exceptions from _M_terminate_output().
* include/std/fstream (basic_filebuf::~basic_filebuf): Swallow any
exceptions from close().
* testsuite/27_io/basic_filebuf/close/81256.cc: New.
From-SVN: r260236
When the AESE,AESD and AESMC, AESMC instructions are generated through the appropriate arm_neon.h intrinsics
we really want to keep them together when the AESE feeds into an AESMC and fusion is supported by the target CPU.
We have macro-fusion hooks and scheduling model forwarding paths defined to facilitate that.
It is, however, not always enough.
This patch adds another mechanism for doing that.
When we can detect during combine that the required dependency is exists (AESE -> AESMC, AESD -> AESIMC)
just keep them together with a combine pattern throughout the rest of compilation.
We won't ever want to split them.
The testcases generate 4 AESE(D) instructions in a block followed by 4 AES(I)MC instructions that
consume the corresponding results and it also adds a bunch of computations in-between so that the
AESE and AESMC instructions are not trivially back-to-back, thus exercising the compiler's ability
to bring them together.
With this patch all 4 pairs are fused whereas before a couple of fusions would be missed due to intervening
arithmetic and memory instructions.
* config/aarch64/aarch64-simd.md (*aarch64_crypto_aese_fused):
New pattern.
(aarch64_crypto_aesd_fused): Likewise.
* gcc.target/aarch64/crypto-fuse-1.c: New test.
* gcc.target/aarch64/crypto-fuse-2.c: Likewise.
From-SVN: r260234
Remove the remaining uses of '*' from aarch64.md.
Using '*' in alternatives is typically incorrect as it tells the register
allocator to ignore those alternatives. Also add a missing '?' so we
prefer a floating point register for same-size int<->fp conversions.
gcc/
* config/aarch64/aarch64.md (mov<mode>): Remove '*' in alternatives.
(movsi_aarch64): Likewise.
(load_pairsi): Likewise.
(load_pairdi): Likewise.
(store_pairsi): Likewise.
(store_pairdi): Likewise.
(load_pairsf): Likewise.
(load_pairdf): Likewise.
(store_pairsf): Likewise.
(store_pairdf): Likewise.
(zero_extend): Likewise.
(trunc): Swap alternatives.
(fcvt_target): Add '?' to prefer w over r.
testsuite/
* gcc.target/aarch64/vmov_n_1.c: Update test.
* gcc.target/aarch64/vfp-1.c: Update test.
From-SVN: r260233
PR target/85756
* config/i386/i386.md: Disallow non-commutative arithmetics in
last twpeephole for mem {+,-,&,|,^}= x; mem != 0 after cmpelim
optimization. Use COMMUTATIVE_ARITH_P test rather than != MINUS
in the peephole2 before it.
testsuite/ChangeLog:
* gcc.c-torture/execute/pr85756.c: New test.
From-SVN: r260231
PR libstdc++/82966
* include/bits/node_handle.h (_Node_handle_common::_M_swap): Use value
instead of type.
* testsuite/23_containers/set/modifiers/node_swap.cc: New.
From-SVN: r260226
2018-05-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/63529
* gfortran.texi: Clarify documentation for Cray pointer and
assumed-sized array.
From-SVN: r260213
2018-05-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85742
* trans-types.c (gfc_get_dtype_rank_type): Reorder evaluation
of 'size'. If the element type is a pointer use the size of the
TREE_TYPE of the type, unless it is VOID_TYPE. In this latter
case, set the size to zero.
2018-05-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85742
* gfortran.dg/assumed_type_9.f90 : New test.
From-SVN: r260211
2018-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32):
Reformat alternatives and attributes so it is easier to identify
which constraints/attributes go with which instruction.
(mov<mode>_hardfloat32, FMOVE64): Likewise.
(mov<mode>_softfloat32, FMOVE64): Likewise.
(mov<mode>_hardfloat64, FMOVE64): Likewise.
(mov<mode>_softfloat64, FMOVE64): Likewise.
From-SVN: r260190
gcc/ChangeLog:
2018-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise.
From-SVN: r260167
2018-05-11 Martin Jambor <mjambor@suse.cz>
PR ipa/85655
* ipa-cp.c (intersect_with_plats): Check that the lattice contains
single const.
testsuite/
* g++.dg/lto/pr85655_0.C: New test.
From-SVN: r260165
My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit). The feature list defined was thus
missing the be8 bit. Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.
The fix is embarrassingly simple...
PR target/85733
* config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature.
From-SVN: r260162
When Arm introduced ARMv6-M there were two variants, ARMv6-M and
ARMv6S-M. The two differed only in support for the SVC instruction.
Later on SVC was then made a mandatory part of ARMv6-M and the
ARMv6S-M name was dropped. GCC and GAS, however still recognize both
names and at least some versions of GAS still distinguish between the
two.
To address this, this patch changes the architecture for the ARMv6-m
cortex parts (m0, m0plus, m1 and the variants will small multiply
units) to use the ARMv6S-M name in conjunction with the assembler.
This avoids problems with them rejecting code that was previously
accepted with older versions of GCC where we did not pass an explicit
architecture string through to the compiler when using -mcpu on the
command line.
PR target/85606
* config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
equivalent.
(cortex-m0): Use armv6s-m isa.
(cortex-m0plus): Likewise.
(cortex-m1): Likewise.
(cortex-m0.small-multiply): Likewise.
(cortex-m0plus.small-multiply): Likewise.
(cortex-m1.small-multiply): Likewise.
From-SVN: r260157
PR c/85696
* c-omp.c (c_omp_predetermined_sharing): Return
OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type.
* cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype.
* cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around
cxx_omp_predetermined_sharing_1. Rename old function to ...
(cxx_omp_predetermined_sharing_1): ... this.
* semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1
instead of cxx_omp_predetermined_sharing.
* c-c++-common/gomp/pr85696.c: New test.
From-SVN: r260156
Jonathan Wakely
Richard Biener
Mark Wielaard
Prathamesh Kulkarni
GCC Administrator
Eric Botcazou
Jason Merrill
Segher Boessenkool
Kyrylo Tkachov
Wilco Dijkstra
Uros Bizjak
Jakub Jelinek
Paolo Carlini
Sebastian Peryt
Alexander Monakov
Kito Cheng
Steven G. Kargl
Paul Thomas
Ville Voutilainen
Monk Chiang
Michael Meissner
Edward Smith-Rowland
Kelvin Nilsen
Martin Jambor
Richard Earnshaw
Allan Sandfeld Jensen
Martin Liska