When I originally started work on the new options framework for ARM
I'd worked on the assumption that AWK might not be available on every
build machine (only on developer's machines). However, looking again
I notice that all the options framework relies on it being present for
every build. This means that some of the generated files that come
from running parsecpu.awk do not need to be kept under revision
control.
Unfortunately, it's not _all_ generated files. The build
infrastructure assumes that all .md fragments are in the source tree
and similarly that all .opt fragments are there as well.
Still, eliminating the very big .h files is a step forward as they are
very regular in structure and diff/patch/merge tools can sometimes
make mistakes when resolving conflicts.
So this patch removes the generated .h files from the source tree and
tweaks the make rules accordingly. I've also changed the build rules
to use the stamp technique to eliminate some false dependencies in a
rebuild.
Top-level:
* contrib/gcc_update (files_and_dependencies): Remove stamp rules for
arm-specific auto-generated header files.
gcc:
* common/config/arm/arm-common.c: Adjust include path for
arm-cpu-cdata.h
* t-arm (TM_H): Adjust path for arm-cpu.h.
(arm-cpu.h): Create in build directory. Adjust dependency rules.
(arm-cpu-data.h): Likewise.
(arm-cpu-cdata.h): Likewise.
* config/arm/arm-cpu.h: Delete.
* config/arm/arm-cpu-cdata.h: Delete.
* config/arm/arm-cpu-data.h: Delete.
From-SVN: r249971
2017-05-31 Martin Liska <mliska@suse.cz>
* configure.ac: Add handling of stage2_werror_flags to
action-if-given and to action-if-not-given.
* configure: Regenerate.
From-SVN: r248737
* configure.ac: Add --enable-languages=default to mean default and
make --enable-languages=all mean all supported languages.
* configure: Regenerated.
gcc/
* doc/invoke.texi (--enable-languages): Update documentation.
From-SVN: r248454
* config/powerpcspe: New port. Files are copied from the rs6000
port, with "rs6000" in filenames replaced by "powerpcspe".
* config.gcc (powerpc*-*-*spe*): New.
(powerpc-*-eabispe*): Use ${cpu_type} instead of hardcoded pathnames.
(powerpc-*-rtems*spe*): New.
(powerpc*-*-linux*spe*): New.
(powerpc-wrs-vxworksspe): New.
(powerpc*-*-*, rs6000-*-*): Use ${cpu_type}.
(misc flags) [powerpc*-*-*, rs6000-*-*): Use ${cpu_type}.
* config.host (powerpc*-*-*spe*): New.
From-SVN: r248429
2017-05-19 Martin Liska <mliska@suse.cz>
* configure.ac: Add --enable-werror-always just for
bootstrap-debug (or none build config) and do not add it
when we are on a release branch.
* configure: Regenerated.
From-SVN: r248276
When a processor enters a fast interrupts handler, and duplicate
register banks are configured, the processor saves the user context by
saving the registers in the main register bank to these additional
registers in the duplicate register bank. In this fast interrupt
context, when you specify the rgf_banked_regs option,the compiler does
not save the registers duplicated in the additional register bank are
not saved.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.c (ARC_AUTOBLINK_IRQ_P): Consider fast interrupts
case also.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(rgf_banked_register_count): New variable.
(parse_mrgf_banked_regs_option): New function.
(arc_override_options): Handle rgf_banked_regs option.
(arc_handle_interrupt_attribute): Add firq option.
(arc_compute_function_type): Return fast irq type when required.
(arc_must_save_register): Handle fast interrupts.
(arc_expand_prologue): Do not emit dwarf info for fast interrupts.
(arc_return_address_regs): Update.
* config/arc/arc.h (arc_return_address_regs): Update.
(arc_function_type): Add fast interrupt type.
(ARC_INTERRUPT_P): Update.
(RC_FAST_INTERRUPT_P): Define.
* config/arc/arc.md (simple_return): Update for fast interrupts.
(p_return_i): Likewise.
* config/arc/arc.opt (mrgf-banked-regs): New option.
* doc/invoke.texi (mrgf-banked-regs): Document.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* gcc.target/arc/firq-1.c: New file.
* gcc.target/arc/firq-2.c: Likewise.
* gcc.target/arc/firq-3.c: Likewise.
* gcc.target/arc/firq-4.c: Likewise.
* gcc.target/arc/firq-5.c: Likewise.
* gcc.target/arc/firq-6.c: Likewise.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r247796
The AUX_IRQ_CTRL register controls the behavior of automated register
save and restore or prologue and epilogue sequences during a non-fast
interrupt entry and exit, and context save and restore instructions.
A user passes to the compiler the configuration of the AUX_IRQ_CTRL
register via mirq-ctrl-saved option. This option, specifies
gneral-purposes registers that the processor saves/restores on
interrupt entry and exit, and it is only valid for ARC EM and ARC HS
cores.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (irq_ctrl_saved): New variable.
(ARC_AUTOBLINK_IRQ_P): Define.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(irq_range): New function.
(arc_must_save_register): Likewise.
(arc_must_save_return_addr): Likewise.
(arc_dwarf_emit_irq_save_regs): Likewise.
(arc_override_options): Handle deferred options.
(MUST_SAVE_REGISTER): Deleted, replaced by arc_must_save_register.
(MUST_SAVE_RETURN_ADDR): Deleted, replaced by
arc_must_save_return_addr.
(arc_compute_frame_size): Handle automated save and restore of
registers.
(arc_expand_prologue): Likewise.
(arc_expand_epilogue): Likewise.
* config/arc/arc.md (stack_irq_dwarf): New unspec instruction.
* config/arc/arc.opt (mirq-ctrl-saved): New option.
* doc/invoke.texi (mirq-ctrl-saved): Document option.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/interrupt-5.c: Newfile.
* gcc.target/arc/interrupt-6.c: Likewise.
* gcc.target/arc/interrupt-7.c: Likewise.
* gcc.target/arc/interrupt-8.c: Likewise.
* gcc.target/arc/interrupt-9.c: Likewise.
From-SVN: r247795
2017-03-20 Palmer Dabbelt <palmer@dabbelt.com>
* MAINTAINERS (CPU Port Maintainers): Add Kito Cheng, Palmer Dabbelt,
and Andrew Waterman as the RISC-V maintainers.
From-SVN: r246280
2017-01-27 Pekka Jaaskelainen <pekka.jaaskelainen@parmance.com>
* configure.ac: Moved the white list of enabling BRIG FE to
libhsail-rt/configure.tgt.
* configure: Regenerated.
* MAINTAINERS: Updated maintainers for BRIG FE and libhsail-rt.
gcc/
* builtin-types.def: Use unsigned_char_type_node for BT_UINT8. Use
uint16_type_node for BT_UINT16.
gcc/brig/
* config-lang.in: Removed stale target-libbrig reference.
libhsail-rt/
* configure.tgt: Moved the white list of supported targets here
from configure.ac. Added i[3456789]86-*-linux* as a supported env
for the BRIG FE.
* README: Added a proper description of what libhsail-rt is.
From-SVN: r244978