Commit Graph

132837 Commits

Author SHA1 Message Date
Alexander Ivchenko
b982628645 AVX-512. Add reduce, range, fpclass insn patterns.
gcc/
	* config/i386/i386.c
	(ix86_expand_args_builtin): Handle avx512dq_rangepv8df_mask_round,
	avx512dq_rangepv16sf_mask_round, avx512dq_rangepv4df_mask,
	avx512dq_rangepv8sf_mask, avx512dq_rangepv2df_mask,
	avx512dq_rangepv4sf_mask.
	* config/i386/sse.md
	(define_c_enum "unspec"): Add UNSPEC_REDUCE, UNSPEC_FPCLASS,
	UNSPEC_RANGE.
	(define_insn "<mask_codefor>reducep<mode><mask_name>"): New.
	(define_insn "reduces<mode>"): Ditto.
	(define_insn "avx512dq_rangep<mode><mask_name><round_saeonly_name>"):
	Ditto.
	(define_insn "avx512dq_ranges<mode><round_saeonly_name>"): Ditto.
	(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Ditto.
	(define_insn "avx512dq_vmfpclass<mode>"): Ditto..


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215107
2014-09-10 06:54:51 +00:00
Alexander Ivchenko
b040ded3c6 AVX-512. Update float unspecs: storeu, rcp14, rsqrt14, scalef, getexp, fixupimm, rndscale, getmant.
gcc/
	* config/i386/i386.c
	(avx512f_vgetmantv2df_round): Rename from "avx512f_getmantv2df_round".
	(avx512f_vgetmantv4sf_round): Rename from "avx512f_vgetmantv4sf_round".
	(ix86_expand_args_builtin): Handle avx512vl_getmantv8sf_mask,
	avx512vl_getmantv4df_mask, avx512vl_getmantv4sf_mask,
	avx512vl_getmantv2df_mask.
	(ix86_expand_round_builtin): Handle avx512f_vgetmantv2df_round,
	avx512f_vgetmantv4sf_round.
	* config/i386/sse.md
	(define_insn "<avx512>_storeu<ssemodesuffix><avxsizesuffix>_mask"):
	Rename from "avx512f_storeu<ssemodesuffix>512_mask" and update
	mode iterator.
	(define_insn "<mask_codefor>rcp14<mode><mask_name>"): Use VF_AVX512VL.
	(define_insn "<mask_codefor>rsqrt14<mode><mask_name>"): Ditto.
	(define_insn "<avx512>_scalef<mode><mask_name><round_name>"): Rename
	from "avx512f_scalef<mode><mask_name><round_name>" and update mode
	iterator..
	(define_insn "<avx512>_getexp<mode><mask_name><round_saeonly_name>"):
	Rename from "avx512f_getexp<mode><mask_name><round_saeonly_name>" and
	update mode iterator.
	(define_expand
	"<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>"): Rename from
	"avx512f_fixupimm<mode>_maskz<round_saeonly_expand_name>" and update
	mode iterator.
	(define_insn
	"<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>"): Rename
	from "avx512f_fixupimm<mode><sd_maskz_name><round_saeonly_name>" and
	update mode iterator.
	(define_insn "<avx512>_fixupimm<mode>_mask<round_saeonly_name>"): Rename
	from "avx512f_fixupimm<mode>_mask<round_saeonly_name>" and update mode
	iterator..
	(define_insn
	"<avx512>_rndscale<mode><mask_name><round_saeonly_name>"): rename from
	"avx512f_rndscale<mode><mask_name><round_saeonly_name>" and update
	mode iterator..
	(define_insn "<avx512>_getmant<mode><mask_name><round_saeonly_name>"):
	Rename from "avx512f_getmant<mode><mask_name><round_saeonly_name>" and
	update mode iterator.
	(define_insn "avx512f_vgetmant<mode><round_saeonly_name>"): Rename from
	"avx512f_getmant<mode><round_saeonly_name>".


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215106
2014-09-10 06:51:20 +00:00
Jan Hubicka
21833f2df0 re PR lto/63166 (ICE (LTO): ipa_intraprocedural_devirtualization, at ipa-prop.c:2611)
PR ipa/63166
	* ipa-prop.c (compute_known_type_jump_func): Fix conditional.

	* g++.dg/lto/pr63166_0.ii: New testcase.
	* g++.dg/lto/pr63166_1.ii: New testcase.

From-SVN: r215105
2014-09-10 06:33:36 +00:00
Alexander Ivchenko
e274629ef8 AVX-512. Extend FMA patterns.
gcc/
	* config/i386/sse.md (define_mode_iterator VF_AVX512VL): New.
	(define_mode_iterator FMAMODEM): Allow 128/256bit EVEX version.
	(define_mode_iterator FMAMODE_AVX512): New.
	(define_mode_iterator FMAMODE): Remove conditions.
	(define_expand "fma4i_fmadd_<mode>"): Use FMAMODE_AVX512 mode iterator.
	(define_expand "<avx512>_fmadd_<mode>_maskz<round_expand_name>"): Rename
	from "<avx512>_fmadd_<mode>_maskz<round_expand_name>" and use VF_AVX512VL
	mode iterator.
	(define_mode_iterator FMAMODE_NOVF512): Remove.
	(define_insn "*fma_fmadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_mode_iterator VF_SF_AVX512VL): New.
	(define_insn "<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fmsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fnmadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>" and
	use FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fnmadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fnmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fnmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fnmsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fnmsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fnmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fnmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_expand "<avx512>_fmaddsub_<mode>_maskz<round_expand_name>"):
	Rename from "avx512f_fmaddsub_<mode>_maskz<round_expand_name>" and
	use VF_AVX512VL mode iterator.
	(define_insn "*fma_fmaddsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>" and
	remove subst usage.
	(define_insn "<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmaddsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fmaddsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmaddsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fmsubadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>" and
	remove usage of subst.
	(define_insn "<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmsubadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fmsubadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmsubadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215104
2014-09-10 06:28:03 +00:00
Tony Wang
0876bdf57b re PR libgcc/56846 (_Unwind_Backtrace on ARM and noexcept)
2014-09-10  Tony Wang  <tony.wang@arm.com>

    libstdc++-v3/
    PR target/56846
    * libsupc++/eh_personality.cc (PERSONALITY_FUNCTION):
    Return with CONTINUE_UNWINDING when the state pattern
    contains: _US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND

From-SVN: r215101
2014-09-10 04:45:32 +00:00
Kugan Vivekanandarajah
27be0c3223 revert: calls.c (precompute_arguments): Check promoted_for_signed_and_unsigned_p and set the promoted mode.
gcc/ChangeLog:

2014-09-10  Kugan Vivekanandarajah  <kuganv@linaro.org>

	Revert r213751:
	* calls.c (precompute_arguments): Check
	 promoted_for_signed_and_unsigned_p and set the promoted mode.
	(promoted_for_signed_and_unsigned_p): New function.
	(expand_expr_real_1): Check promoted_for_signed_and_unsigned_p
	and set the promoted mode.
	* expr.h (promoted_for_signed_and_unsigned_p): New function definition.
	* cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if
	SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.

From-SVN: r215100
2014-09-10 00:19:23 +00:00
GCC Administrator
6e8962a5a0 Daily bump.
From-SVN: r215099
2014-09-10 00:16:26 +00:00
Manuel López-Ibáñez
b559c810f3 opth-gen.awk: Generate mapping from cpp message reasons to the options that enable them.
gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* opth-gen.awk: Generate mapping from cpp message reasons to the
	options that enable them.
	* doc/options.texi (CppReason): Document.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* c.opt: Add CppReason to various flags.
	(Wdate-time): Re-sort.
	* c-common.c: Include c-common.h earlier.
	(struct reason_option_codes_t): Delete.
	(c_option_controlling_cpp_error): Prefix global type and struct
	with cpp_.

From-SVN: r215095
2014-09-09 22:17:54 +00:00
Manuel López-Ibáñez
1ef33fd4cd invoke.texi (Wnormalized=): Update.
gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* doc/invoke.texi (Wnormalized=): Update.

libcpp/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* include/cpplib.h (struct cpp_options): Declare warn_normalize as
	int instead of enum.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* c.opt	(Wnormalized): New.
	(Wnormalized=): Use Enum and Reject Negative.
	* c-opts.c (c_common_handle_option): Do not handle Wnormalized here.

gcc/testsuite/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* gcc.dg/cpp/warn-normalized-3.c: Delete useless dg-prune-output.

From-SVN: r215093
2014-09-09 21:41:43 +00:00
Janne Blomqvist
00c7a3c72a Fix pad status check.
2014-09-10  Janne Blomqvist  <jb@gcc.gnu.org>

	* io/transfer.c (read_block_form): Fix pad status check (found by
	Thomas Schwinge with -Wlogical-not-parentheses).

From-SVN: r215092
2014-09-10 00:23:25 +03:00
Segher Boessenkool
4abf82644e re PR target/63195 (stage3 build/gengtype miscompiled)
2014-09-09  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/63195
	* config/rs6000/rs6000.md (*bool<mode>3): Allow only register
	operands.  Split off the constant operand alternative to ...
	(*bool<mode>3_imm): New.

From-SVN: r215091
2014-09-09 20:49:08 +02:00
Jonathan Wakely
fd18c76ac8 Make std::deque meet C++11 allocator requirements.
* include/bits/deque.tcc (deque::operator=(const deque&)): Handle
	allocator propagation.
	(deque::emplace_front, deque::emplace_back): Use allocator traits.
	(deque::_M_push_back_aux, deque::_M_push_front_aux): Likewise.
	(deque::_M_pop_back_aux, deque::_M_pop_front_aux): Likewise.
	* include/bits/stl_deque.h (__deque_buf_size): Add constexpr.
	(_Deque_iterator): Handle allocators with custom pointers.
	(_Deque_base): Likewise. Use allocator traits.
	(deque): Likewise. Add allocator-extended constructors.
	(deque::_M_move_assign1, deque::_M_move_assign2): Implement move
	assignment via tag dispatching.
	(deque::_M_replace_map): Replace existing data.
	* include/debug/deque (deque): Add allocator-extended constructors.
	* include/profile/deque (deque): Likewise.
	* testsuite/23_containers/deque/allocator/copy.cc: New.
	* testsuite/23_containers/deque/allocator/copy_assign.cc: New.
	* testsuite/23_containers/deque/allocator/ext_ptr.cc: New.
	* testsuite/23_containers/deque/allocator/minimal.cc: New.
	* testsuite/23_containers/deque/allocator/move.cc: New.
	* testsuite/23_containers/deque/allocator/move_assign-2.cc: New.
	* testsuite/23_containers/deque/allocator/move_assign.cc: New.
	* testsuite/23_containers/deque/allocator/noexcept.cc: New.
	* testsuite/23_containers/deque/allocator/swap.cc: New.
	* testsuite/23_containers/deque/requirements/dr438/assign_neg.cc:
	Adjust dg-error line number.
	* testsuite/23_containers/deque/requirements/dr438/
	constructor_1_neg.cc: Likewise.
	* testsuite/23_containers/deque/requirements/dr438/
	constructor_2_neg.cc: Likewise.
	* testsuite/23_containers/deque/requirements/dr438/insert_neg.cc:
	Likewise.
	* testsuite/23_containers/vector/52591.cc: Test both the propagating
	and always-equal cases.

From-SVN: r215090
2014-09-09 18:29:32 +01:00
David Malcolm
e8a54173bc single_set takes an insn
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* rtl.h (single_set_2): Strengthen first param from const_rtx to
	const rtx_insn *, and move prototype to above...
	(single_set): ...this.  Convert this from a macro to an inline
	function, enforcing the requirement that the param is a const
	rtx_insn *.
	(find_args_size_adjust): Strengthen param from rtx to rtx_insn *.

	* config/arm/aarch-common-protos.h (aarch_crypto_can_dual_issue):
	Strengthen both params from rtx to rtx_insn *.
	* config/arm/aarch-common.c (aarch_crypto_can_dual_issue):
	Likewise; introduce locals "producer_set", "consumer_set", using
	them in place of "producer" and "consumer" when dealing with SET
	rather than insn.
	* config/avr/avr.c (avr_out_plus): Add checked cast to rtx_insn *
	when invoking single_set in region guarded by INSN_P.
	(avr_out_bitop): Likewise.
	(_reg_unused_after): Introduce local rtx_sequence * "seq" in
	region guarded by GET_CODE check, using methods to strengthen
	local "this_insn" from rtx to rtx_insn *, and for clarity.
	* config/avr/avr.md (define_insn_and_split "xload8<mode>_A"):
	Strengthen local "insn" from rtx to rtx_insn *.
	(define_insn_and_split "xload<mode>_A"): Likewise.
	* config/bfin/bfin.c (trapping_loads_p): Likewise for param
	"insn".
	(find_load): Likewise for return type.
	(workaround_speculation): Likewise for both locals named
	"load_insn".
	* config/cris/cris.c (cris_cc0_user_requires_cmp): Likewise for
	local "cc0_user".
	* config/cris/cris.md (define_peephole2 ; moversideqi): Likewise
	for local "prev".
	* config/h8300/h8300-protos.h (notice_update_cc): Likewise for
	param 2.
	* config/h8300/h8300.c (notice_update_cc): Likewise.
	* config/i386/i386.c (ix86_flags_dependent): Likewise for params
	"insn" and "dep_insn".
	(exact_store_load_dependency): Likewise for both params.
	(ix86_macro_fusion_pair_p): Eliminate local named "single_set"
	since this now clashes with inline function.  Instead, delay
	calling single_set until the point where its needed, and then
	assign the result to "compare_set" and rework the conditional that
	follows.
	* config/ia64/ia64.md (define_expand "tablejump"): Strengthen
	local "last" from rtx to rtx_insn *.
	* config/mips/mips-protos.h (mips_load_store_insns): Likewise for
	second param.
	(mips_store_data_bypass_p): Likewise for both params.
	* config/mips/mips.c (mips_load_store_insns): Likewise for second
	param.
	(mips_store_data_bypass_p): Likewise for both params.
	(mips_orphaned_high_part_p): Likewise for param "insn".
	* config/mn10300/mn10300.c (extract_bundle): Likewise.
	(mn10300_bundle_liw): Likewise for locals "r", "insn1", "insn2".
	Introduce local rtx "insn2_pat".
	* config/rl78/rl78.c (move_elim_pass): Likewise for locals "insn",
	"ninsn".
	(rl78_remove_unused_sets): Likewise for locals "insn", "ninsn".
	Introduce local rtx "set", using it in place of "insn" for the
	result of single_set.  This appears to fix a bug, since the call
	to find_regno_note on a SET does nothing.
	* config/rs6000/rs6000.c (set_to_load_agen): Strengthen both
	params from rtx to rtx_insn *.
	(set_to_load_agen): Likewise.
	* config/s390/s390.c (s390_label_align): Likewise for local
	"prev_insn".  Introduce new rtx locals "set" and "src", using
	them in place of "prev_insn" for the results of single_set
	and SET_SRC respectively.
	(s390_swap_cmp): Strengthen local "jump" from rtx to rtx_insn *.
	Introduce new rtx local "set" using in place of "jump" for the
	result of single_set.  Use SET_SRC (set) rather than plain
	XEXP (set, 1).
	* config/sh/sh.c (noncall_uses_reg): Strengthen param 2from
	rtx to rtx_insn *.
	(noncall_uses_reg): Likewise.
	(reg_unused_after): Introduce local rtx_sequence * "seq" in region
	guarded by GET_CODE check, using its methods for clarity, and to
	enable strengthening local "this_insn" from rtx to rtx_insn *.
	* config/sh/sh.md (define_expand "mulhisi3"): Strengthen local
	"insn" from rtx to rtx_insn *.
	(define_expand "umulhisi3"): Likewise.
	(define_expand "smulsi3_highpart"): Likewise.
	(define_expand "umulsi3_highpart"): Likewise.
	* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
	local "after".  Replace GET_CODE check with a dyn_cast,
	introducing new local rtx_sequence * "seq", using insn method for
	typesafety.

	* dwarf2cfi.c (dwarf2out_frame_debug): Strengthen param "insn"
	from rtx to rtx_insn *.  Introduce local rtx "pat", using it in
	place of "insn" once we're dealing with patterns rather than the
	input insn.
	(scan_insn_after): Strengthen param "insn" from rtx to rtx_insn *.
	(scan_trace): Likewise for local "elt", updating lookups within
	sequence to use insn method rather than element method.
	* expr.c (find_args_size_adjust): Strengthen param "insn" from rtx
	to rtx_insn *.
	* gcse.c (gcse_emit_move_after): Likewise for local "new_rtx".
	* ifcvt.c (noce_try_abs): Likewise for local "insn".
	* ira.c (fix_reg_equiv_init): Add checked cast to rtx_insn * when
	invoking single_set.
	* lra-constraints.c (insn_rhs_dead_pseudo_p): Strengthen param
	"insn" from rtx to rtx_insn *.
	(skip_usage_debug_insns): Likewise for return type, adding a
	checked cast.
	(check_secondary_memory_needed_p): Likewise for local "insn".
	(inherit_reload_reg): Likewise.
	* modulo-sched.c (sms_schedule): Likewise for local "count_init".
	* recog.c (peep2_attempt): Likewise for local "old_insn", adding
	checked casts.
	(store_data_bypass_p): Likewise for both params.
	(if_test_bypass_p): Likewise.
	* recog.h (store_data_bypass_p): Likewise for both params.
	(if_test_bypass_p): Likewise.
	* reload.c (find_equiv_reg): Likewise for local "where".
	* reorg.c (delete_jump): Likewise for param "insn".
	* rtlanal.c (single_set_2): Strenghen param "insn" from const_rtx
	to const rtx_insn *.
	* store-motion.c (replace_store_insn): Likewise for param "del".
	(delete_store): Strengthen local "i" from rtx to rtx_insn_list *,
	and use its methods for clarity, and to strengthen local "del"
	from rtx to rtx_insn *.
	(build_store_vectors): Use insn method of "st" when calling
	replace_store_insn for typesafety and clarity.

From-SVN: r215089
2014-09-09 17:02:34 +00:00
Bill Schmidt
65cf8039d3 rs6000.c (rtx_is_swappable_p): Add UNSPEC_VSX_CVDPSPN as an unswappable operand...
[gcc]

2014-09-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rtx_is_swappable_p): Add
	UNSPEC_VSX_CVDPSPN as an unswappable operand, and add commentary
	on how to make it legal in future.

[gcc/testsuite]

2014-09-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/swaps-p8-15.c: Remove scan-assembler-not for
	xxpermdi and add commentary about adding it back later; remove
	unused typedef.

From-SVN: r215088
2014-09-09 16:53:07 +00:00
David Malcolm
647d790d2f recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
	to rtx_insn *.
	(restinsn): Likewise.
	* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
	Likewise for param.
	* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
	Likewise.
	* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
	first param.
	(arc_hazard): Likewise for both params.
	* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
	checked casts to rtx_sequence * and uses of the insn method for
	type-safety.
	(arc_hazard): Strengthen both params from rtx to rtx_insn *.
	(arc_adjust_insn_length): Likewise for param "insn".
	(struct insn_length_parameters_s): Likewise for first param of
	"get_variants" callback field.
	(arc_get_insn_variants): Likewise for first param and local
	"inner".  Replace a check of GET_CODE with a dyn_cast to
	rtx_sequence *, using methods for type-safety and clarity.
	* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
	rtx_sequence * and uses of the insn method for type-safety when
	invoking arc_adjust_insn_length.
	* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
	for param.
	(arm_address_offset_is_imm): Likewise.
	(struct tune_params): Likewise for params 1 and 3 of the
	"sched_adjust_cost" callback field.
	* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
	params 1 and 3 ("insn" and "dep").
	(xscale_sched_adjust_cost): Likewise.
	(fa726te_sched_adjust_cost): Likewise.
	(cortexa7_older_only): Likewise for param "insn".
	(cortexa7_younger): Likewise.
	(arm_attr_length_move_neon): Likewise.
	(arm_address_offset_is_imm): Likewise.
	* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
	* config/avr/avr.c (avr_notice_update_cc): Likewise.
	* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
	(workaround_speculation): Likewise for local "last_condjump".
	* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
	(shadow_or_blockage_p): Likewise.
	(get_unit_reqs): Likewise.
	(get_unit_operand_masks): Likewise.
	(c6x_registers_update): Likewise.
	(returning_call_p): Likewise.
	(can_use_callp): Likewise.
	(convert_to_callp): Likewise.
	(find_last_same_clock): Likwise for local "t".
	(reorg_split_calls): Likewise for local "shadow".
	(hwloop_pattern_reg): Likewise for param "insn".
	* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
	* config/frv/frv.c (frv_final_prescan_insn): Likewise.
	(frv_extract_membar): Likewise.
	(frv_optimize_membar_local): Strengthen param "last_membar" from
	rtx * to rtx_insn **.
	(frv_optimize_membar_global): Strengthen param "membar" from rtx
	to rtx_insn *.
	(frv_optimize_membar): Strengthen local "last_membar" from rtx *
	to rtx_insn **.
	* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
	both params from rtx to rtx_insn *.
	(ia64_ld_address_bypass_p): Likewise.
	* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
	"insn".
	(ia64_safe_type): Likewise.
	(group_barrier_needed): Likewise.
	(safe_group_barrier_needed): Likewise.
	(ia64_single_set): Likewise.
	(is_load_p): Likewise.
	(record_memory_reference): Likewise.
	(get_mode_no_for_insn): Likewise.
	(important_for_bundling_p): Likewise.
	(unknown_for_bundling_p): Likewise.
	(ia64_st_address_bypass_p): Likewise for both params.
	(ia64_ld_address_bypass_p): Likewise.
	(expand_vselect): Introduce new local rtx_insn * "insn", using it
	in place of rtx "x" after the emit_insn call.
	* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
	Strengthen param from rtx to rtx_insn *.
	(ix86_agi_dependent): Likewise for both params.
	(ix86_attr_length_immediate_default): Likewise for param 1.
	(ix86_attr_length_address_default): Likewise for param.
	(ix86_attr_length_vex_default): Likewise for param 1.
	* config/i386/i386.c (ix86_attr_length_immediate_default):
	Likewise for param "insn".
	(ix86_attr_length_address_default): Likewise.
	(ix86_attr_length_vex_default): Likewise.
	(ix86_agi_dependent): Likewise for both params.
	(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
	(vselect_insn): Likewise for this variable.
	* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
	for param 1.
	(m68k_sched_attr_opy_type): Likewise.
	* config/m68k/m68k.c (sched_get_operand): Likewise.
	(sched_attr_op_type): Likewise.
	(m68k_sched_attr_opx_type): Likewise.
	(m68k_sched_attr_opy_type): Likewise.
	(sched_get_reg_operand): Likewise.
	(sched_get_mem_operand): Likewise.
	(m68k_sched_address_bypass_p): Likewise for both params.
	(sched_get_indexed_address_scale): Likewise.
	(m68k_sched_indexed_address_bypass_p): Likewise.
	* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
	(m68k_sched_indexed_address_bypass_p): Likewise.
	* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
	"label", "ret" from rtx to rtx_insn *, adding a checked cast and
	removing another.
	* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
	params from rtx to rtx_insn *.
	(mips_fmadd_bypass): Likewise.
	* config/mips/mips.c (mips_fmadd_bypass): Likewise.
	(mips_linked_madd_p): Likewise.
	(mips_macc_chains_last_hilo): Likewise for this variable.
	(mips_macc_chains_record): Likewise for param.
	(vr4130_last_insn): Likewise for this variable.
	(vr4130_swap_insns_p): Likewise for both params.
	(mips_ls2_variable_issue): Likewise for param.
	(mips_need_noat_wrapper_p): Likewise for param "insn".
	(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
	in place of "x" after the emit_insn.
	* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
	params from rtx to rtx_insn *.
	* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
	(pa_combine_instructions): Introduce local "par" for result of
	gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
	to make_insn_raw.
	(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
	* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
	(rl78_alloc_physical_registers_op1): Likewise.
	(rl78_alloc_physical_registers_op2): Likewise.
	(rl78_alloc_physical_registers_ro1): Likewise.
	(rl78_alloc_physical_registers_cmp): Likewise.
	(rl78_alloc_physical_registers_umul): Likewise.
	(rl78_alloc_address_registers_macax): Likewise.
	(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
	* config/s390/predicates.md (execute_operation): Likewise for
	local "insn".
	* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
	params.
	* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
	(addr_generation_dependency_p): Likewise for param "insn".
	(s390_agen_dep_p): Likewise for both params.
	(s390_fpload_toreg): Likewise for param "insn".
	* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
	* config/sh/sh.c (sh_loop_align): Likewise for param and local
	"next".
	* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
	* config/sh/sh_treg_combine.cc
	(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
	and local "i".
	(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
	* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
	"and_insn", "load", "shift".
	* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
	"insn".
	* final.c (final_scan_insn): Introduce local rtx_insn * "other"
	for XEXP (note, 0) of the REG_CC_SETTER note.
	(cleanup_subreg_operands): Strengthen param "insn" from rtx to
	rtx_insn *, eliminating a checked cast made redundant by this.
	* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
	to rtx_insn *.
	* genattr.c (main): When writing out the prototype to
	const_num_delay_slots, strengthen the param from rtx to
	rtx_insn *.
	* genattrtab.c (write_const_num_delay_slots): Likewise when
	writing out the implementation of const_num_delay_slots.
	* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
	"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
	* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
	favor of new rtx locals "src" and "set" and new local rtx_insn *
	"insn" and "seq".
	(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
	to rtx_insn *.
	(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
	locals "cond", "if_then_else", "set" and new rtx_insn * locals
	"insn" and "seq".
	(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
	"last" from rtx to rtx_insn *.  Likewise for a local "tmp",
	renaming to "tmp_insn".  Eliminate the other local rtx "tmp" from
	the top-level scope, replacing with new more tightly-scoped rtx
	locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
	"new_insn", "copy_of_insn_b", and make local rtx "set" more
	tightly-scoped.
	* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
	rtx_insn *.
	* ira.c (setup_prohibited_mode_move_regs): Likewise for local
	"move_insn".
	(ira_setup_alts): Likewise for param "insn".
	* lra-constraints.c (emit_inc): Likewise for local "add_insn".
	* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
	and an rtx_insn *.
	(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
	new more-tightly scoped rtx locals "add3_insn", "insn",
	"add2_insn" and rtx_insn * "move_insn".
	* postreload-gcse.c (eliminate_partially_redundant_load): Add
	checked cast on result of gen_move_insn when invoking
	extract_insn.
	* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(verify_changes): Add a checked cast on "object" when invoking
	insn_invalid_p.
	(extract_insn_cached): Strengthen param "insn" from rtx to
	rtx_insn *.
	(extract_constrain_insn_cached): Likewise.
	(extract_insn): Likewise.
	* recog.h (insn_invalid_p): Likewise for param 1.
	(recog_memoized): Likewise for param.
	(extract_insn): Likewise.
	(extract_constrain_insn_cached): Likewise.
	(extract_insn_cached): Likewise.
	* reload.c (can_reload_into): Likewise for local "test_insn".
	* reload.h (cleanup_subreg_operands): Likewise for param.
	* reload1.c (emit_insn_if_valid_for_reload): Rename param from
	"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
	result of emit_insn.  Remove a checked cast made redundant by this
	change.
	* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
	rtx to rtx_insn *.
	* sel-sched.c (get_reg_class): Likewise.

From-SVN: r215087
2014-09-09 16:34:56 +00:00
Marcus Shawcroft
b677236af0 Add crtfastmath for AArch64.
gcc/Changelog

2014-09-09  Marcus Shawcroft  <marcus.shawcroft@arm.com>
            Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

     * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
     * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC): Define.
      (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.

libgcc/Changelog

2014-09-09  Marcus Shawcroft  <marcus.shawcroft@arm.com>
            Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

    * config.host (aarch64*): Include crtfastmath and t-crtfm.
    * config/aarch64/crtfastmath.c: New file. 

Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

From-SVN: r215086
2014-09-09 15:53:01 +00:00
Kyrylo Tkachov
ab7f327830 [ARM][tests] Make input and output arrays 128-bit aligned in vectorisation tests
* gcc.target/arm/vect-lceilf_1.c: Make input and output arrays global
	and 16-byte aligned.
	* gcc.target/arm/vect-lfloorf_1.c: Likewise.
	* gcc.target/arm/vect-lroundf_1.c: Likewise.
	* gcc.target/arm/vect-rounding-btruncf.c: Likewise.
	* gcc.target/arm/vect-rounding-ceilf.c: Likewise.
	* gcc.target/arm/vect-rounding-floorf.c: Likewise.
	* gcc.target/arm/vect-rounding-roundf.c: Likewise.

From-SVN: r215085
2014-09-09 15:27:42 +00:00
David Malcolm
a1950df341 INSN_LOCATION takes an rtx_insn
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* rtl.h (INSN_LOCATION): Strengthen param from const_rtx to
	const rtx_insn *, and from rtx to rtx_insn * for the other
	overloaded variant.
	(RTL_LOCATION): Add a checked cast to rtx_insn * when invoking
	INSN_LOCATION, since we know INSN_P holds.
	(insn_line): Strengthen param from const_rtx to const rtx_insn *.
	(insn_file): Likewise.
	(insn_scope): Likewise.
	(insn_location): Likewise.

	* config/mips/mips.c (mips16_gp_pseudo_reg): Strengthen local
	"insn" from rtx to rtx_insn *, introducing a new local rtx "set"
	for the result of gen_load_const_gp.
	* config/rs6000/rs6000-protos.h (output_call): Strengthen first
	param from rtx to rtx_insn *.
	* config/rs6000/rs6000.c (output_call): Likewise.
	* dwarf2out.c (dwarf2out_var_location): Likewise for local "prev",
	introducing a checked cast to rtx_sequence * and use of the insn
	method.
	* emit-rtl.c (emit_copy_of_insn_after): Strengthen both params
	from rtx to rtx_insn *.
	(insn_scope): Strengthen param from const_rtx to const rtx_insn *.
	(insn_line): Likewise.
	(insn_file): Likewise.
	(insn_location): Likewise.
	* emit-rtl.h (emit_copy_of_insn_after): Strengthen both params
	from rtx to rtx_insn *.
	* print-rtl.c (print_rtx): Introduce local "in_insn" via a checked
	cast, using it for calls to INSN_HAS_LOCATION and insn_location.
	* recog.c (peep2_attempt): Introduce local rtx_insn * "peepinsn"
	via a checked cast.
	* reorg.c (relax_delay_slots): Strengthen locals named "after"
	from rtx to rtx_insn *; use methods of "pat" for type-safety.

From-SVN: r215084
2014-09-09 15:20:07 +00:00
David Malcolm
d6e1e8b8d1 Handcode gen_rtx_INSN
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* combine.c (try_combine): Eliminate checked cast on result of
	gen_rtx_INSN.
	* emit-rtl.c (gen_rtx_INSN): New function, improving over the prior
	autogenerated one by strengthening the return type and params 2 and 3
	from rtx to rtx_insn *, and by naming the params.
	* gengenrtl.c (special_rtx): Add INSN to those that are
	special-cased.
	* rtl.h (gen_rtx_INSN): New prototype.

From-SVN: r215083
2014-09-09 15:14:03 +00:00
David Malcolm
0cc97fc552 struct ira_reg_equiv_s's "init_insns" is an rtx_insn_list
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* ira.c (ira_update_equiv_info_by_shuffle_insn): Use NULL rather
	than NULL_RTX.
	(no_equiv): Likewise.
	(update_equiv_regs): Likewise.
	(setup_reg_equiv): Likewise.  Strengthen locals "elem",
	"prev_elem", "next_elem" from rtx to rtx_insn_list *, and "insn"
	from rtx to rtx_insn *.  Use methods of "elem" for typesafety and
	clarity.
	* ira.h (struct ira_reg_equiv_s): Strengthen field "init_insns"
	from rtx to rtx_insn_list *.
	* lra-assigns.c (spill_for): Strengthen local "x" from rtx to
	rtx_insn_list * and use methods for clarity and typesafety.
	* lra-constraints.c (contains_deleted_insn_p): Likewise for param
	"list".
	(init_insn_rhs_dead_pseudo_p): Likewise for local "insns".  Remove
	redundant check on INSN_P (insns): this cannot hold, as "insns" is
	an INSN_LIST, not an insn.
	(reverse_equiv_p): Strengthen local "insns" from rtx to
	rtx_insn_list * and use methods for clarity and typesafety.
	(contains_reloaded_insn_p): Likewise for local "list".

From-SVN: r215082
2014-09-09 15:10:39 +00:00
Alan Lawrence
fcad3635f9 [AArch64 Testsuite] Add a test of vldN_dup intrinsics
* gcc.target/aarch64/vldN_dup_1.c: New test.

From-SVN: r215078
2014-09-09 14:08:56 +00:00
Alan Lawrence
a3ea9ab8d0 [AArch64 Testsuite] Extend test of vld1+vst1 intrinsics to cover more variants
* gcc.target/aarch64/vld1-vst1_1.c: Rewrite to test all variants.

From-SVN: r215077
2014-09-09 14:03:17 +00:00
Richard Sandiford
ba6fdd828d Update email address for recent commits, to comply with company policy.
From-SVN: r215074
2014-09-09 13:21:15 +00:00
Alan Lawrence
79d2a4839b [AArch64 Testsuite] Add test of vld[234]q? intrinsic
* gcc.target/aarch64/vldN_1.c: New test.

From-SVN: r215072
2014-09-09 13:07:27 +00:00
Alan Lawrence
bc23b1960d [AArch64 Testsuite]Fix scan-assembler test false alarm on aarch64-linux-gnu
* gcc.target/aarch64/simd/int_comparisons_1.c: Tighten regexp.

From-SVN: r215071
2014-09-09 13:03:32 +00:00
Jason Merrill
8591575ff8 typeck.c (build_class_member_access_expr): Move -Winvalid-offsetof code...
* typeck.c (build_class_member_access_expr): Move
	-Winvalid-offsetof code...
	* semantics.c (finish_offsetof): ...here.
	* parser.c (cp_parser_builtin_offsetof): Remember the location of
	the type argument.
	* pt.c (tsubst_copy_and_build) [OFFSETOF_EXPR]: Preserve it.

From-SVN: r215070
2014-09-09 08:49:23 -04:00
Jiong Wang
97f518b3fe [ARM] Enable auto-vectorization for copysignf
gcc/
    * config/arm/arm.c (NEON_COPYSIGNF): New enum.
    (arm_init_neon_builtins): Support NEON_COPYSIGNF.
    (arm_builtin_vectorized_function): Likewise.
    * config/arm/arm_neon_builtins.def: New macro for copysignf.
    * config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
    copysignf.

  gcc/testsuite/
    * gcc.target/arm/vect-copysignf.c: New testcase.

From-SVN: r215067
2014-09-09 12:29:36 +00:00
Richard Sandiford
1942d1a9e1 bb-reorder.h (default_target_bb_reorder): Remove redundant GTY.
gcc/
	* bb-reorder.h (default_target_bb_reorder): Remove redundant GTY.
	* builtins.h (default_target_builtins): Likewise.
	* gcse.h (default_target_gcse): Likewise.
	* target-globals.h (target_globals): Add a destructor.  Convert
	void-pointer fields back to their real type and change from
	GTY((atomic)) to GTY((skip)).
	(restore_target_globals): Remove casts accordingly.
	* target-globals.c (save_target_globals): Use XCNEW rather than
	ggc_internal_cleared_alloc to allocate non-GC structures.
	Use ggc_cleared_alloc to allocate the target_globals structure
	itself.
	(target_globals::~target_globals): Define.

From-SVN: r215063
2014-09-09 12:12:06 +00:00
Jason Merrill
cb3037199c re PR c++/62255 (Introducing an unrelated template parameter causes compilation to fail)
PR c++/62255
	* pt.c (instantiate_decl): Handle recursive instantiation of
	static data member.

From-SVN: r215062
2014-09-09 07:59:45 -04:00
Kyrylo Tkachov
b27832edcf [ARM][7/7] Convert FP mnemonics to UAL | f{ld,st}m -> v{ld,st}m
* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
	mnemonic instead of fldmfdd.
	* config/arm/arm.c (vfp_output_fstmd): Rename to...
	(vfp_output_vstmd): ... This.  Convert output to UAL syntax.
	Output vpush when address register is SP.
	* config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
	(vfp_output_vstmd): ... This.
	* config/arm/vfp.md (push_multi_vfp): Update call to
	vfp_output_vstmd.

From-SVN: r215056
2014-09-09 11:29:21 +00:00
Kyrylo Tkachov
5a1501087f [ARM][6/7] Convert FP mnemonics to UAL | movcc_vfp (fmstat)
* config/arm/vfp.md (*movcc_vfp): Use UAL syntax.

From-SVN: r215055
2014-09-09 11:27:49 +00:00
Kyrylo Tkachov
c278658453 [ARM][5/7] Convert FP mnemonics to UAL | sqrt and FP compare patterns
* config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
	(*sqrtdf2_vfp): Likewise.
	(*cmpsf_vfp): Likewise.
	(*cmpsf_trap_vfp): Likewise.
	(*cmpdf_vfp): Likewise.
	(*cmpdf_trap_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215054
2014-09-09 11:27:00 +00:00
Kyrylo Tkachov
14a082a364 [ARM][4/7] Convert FP mnemonics to UAL | vcvt patterns
* config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
	(*truncdfsf2_vfp): Likewise.
	(*truncsisf2_vfp): Likewise.
	(*truncsidf2_vfp): Likewise.
	(fixuns_truncsfsi2): Likewise.
	(fixuns_truncdfsi2): Likewise.
	(*floatsisf2_vfp): Likewise.
	(*floatsidf2_vfp): Likewise.
	(floatunssisf2): Likewise.
	(floatunssidf2): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215053
2014-09-09 11:25:12 +00:00
Kyrylo Tkachov
14d9aa9fc0 [3/7] Convert FP mnemonics to UAL | mul+add patterns
* config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
	(*muldf3_vfp): Likewise.
	(*mulsf3negsf_vfp): Likewise.
	(*muldf3negdf_vfp): Likewise.
	(*mulsf3addsf_vfp): Likewise.
	(*muldf3adddf_vfp): Likewise.
	(*mulsf3subsf_vfp): Likewise.
	(*muldf3subdf_vfp): Likewise.
	(*mulsf3negsfaddsf_vfp): Likewise.
	(*fmuldf3negdfadddf_vfp): Likewise.
	(*mulsf3negsfsubsf_vfp): Likewise.
	(*muldf3negdfsubdf_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215052
2014-09-09 11:22:52 +00:00
Kyrylo Tkachov
436c249d44 [ARM][2/7] Convert FP mnemonics to UAL | add/sub/div/abs patterns.
* config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
	(*absdf2_vfp): Likewise.
	(*negsf2_vfp): Likewise.
	(*negdf2_vfp): Likewise.
	(*addsf3_vfp): Likewise.
	(*adddf3_vfp): Likewise.
	(*subsf3_vfp): Likewise.
	(*subdf3_vfp): Likewise.
	(*divsf3_vfp): Likewise.
	(*divdf3_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215051
2014-09-09 11:20:02 +00:00
Kyrylo Tkachov
35cb3e5387 [ARM][1/7] Convert FP mnemonics to UAL | mov patterns.
* config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
	multiple.
	(arm_print_operand): Don't convert real values to decimal
	representation in default case.
	(fp_immediate_constant): Delete.
	* config/arm/arm-protos.h (fp_immediate_constant): Likewise.
	* config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
	syntax.
	(*thumb2_movsi_vfp): Likewise.
	(*movdi_vfp): Likewise.
	(*movdi_vfp_cortexa8): Likewise.
	(*movhf_vfp_neon): Likewise.
	(*movhf_vfp): Likewise.
	(*movsf_vfp): Likewise.
	(*thumb2_movsf_vfp): Likewise.
	(*movdf_vfp): Likewise.
	(*thumb2_movdf_vfp): Likewise.
	(*movsfcc_vfp): Likewise.
	(*thumb2_movsfcc_vfp): Likewise.
	(*movdfcc_vfp): Likewise.
	(*thumb2_movdfcc_vfp): Likewise.

	* gcc.target/arm/pr51835.c: Update expected assembly.
	* gcc.target/arm/vfp-1.c: Likewise.
	* gcc.target/arm/vfp-ldmdbd.c: Likewise.
	* gcc.target/arm/vfp-ldmdbs.c: Likewise.
	* gcc.target/arm/vfp-ldmiad.c: Likewise.
	* gcc.target/arm/vfp-ldmias.c: Likewise.
	* gcc.target/arm/vfp-stmdbd.c: Likewise.
	* gcc.target/arm/vfp-stmdbs.c: Likewise.
	* gcc.target/arm/vfp-stmiad.c: Likewise.
	* gcc.target/arm/vfp-stmias.c: Likewise.

From-SVN: r215050
2014-09-09 11:17:20 +00:00
James Greenhalgh
995ba386ee [Obvious] Change Linux to GNU/LINUX in ARM options documentation
gcc/
	* doc/invoke.texi (-march): Use GNU/Linux rather than Linux.
	(-mtune): Likewise.
	(-mcpu): Likewise.

From-SVN: r215049
2014-09-09 10:58:18 +00:00
Tony Wang
f0373b8db2 xordi3-opt.c: Disable this test case for thumb1 target.
2014-09-09  Tony Wang  <tony.wang@arm.com>

    gcc/testsuite/
    * gcc.target/arm/xordi3-opt.c: Disable this
    test case for thumb1 target.
    * gcc.target/arm/iordi3-opt.c: Ditto.

From-SVN: r215047
2014-09-09 10:40:40 +00:00
Kyrylo Tkachov
d5a294199d [AArch64] PR 61749: Do not ICE in lane intrinsics when passed non-constant lane number
PR target/61749
	* config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
	Use qualifier_immediate for last operand.  Rename to...
	(aarch64_types_ternop_lane_qualifiers): ... This.
	(TYPES_QUADOP): Rename to...
	(TYPES_TERNOP_LANE): ... This.
	(aarch64_simd_expand_args): Return const0_rtx when encountering user
	error.  Change return of 0 to return of NULL_RTX.
	(aarch64_crc32_expand_builtin): Likewise.
	(aarch64_expand_builtin): Return NULL_RTX instead of 0.
	ICE when expanding unknown builtin.
	* config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
	TERNOP_LANE qualifiers.
	(sqdmlsl_lane): Likewise.
	(sqdmlal_laneq): Likewise.
	(sqdmlsl_laneq): Likewise.
	(sqdmlal2_lane): Likewise.
	(sqdmlsl2_lane): Likewise.
	(sqdmlal2_laneq): Likewise.
	(sqdmlsl2_laneq): Likewise.

	* gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.

From-SVN: r215046
2014-09-09 10:15:46 +00:00
Nick Clifton
b250f296e9 invoke.texi (Optimization Options): Add missing @gol to the end of a line.
* doc/invoke.texi (Optimization Options): Add missing @gol to the
	end of a line.
	(S/390 and zSeries Options): Remove superfluous word from the
	description of the -mhotpatch option.

From-SVN: r215044
2014-09-09 08:27:39 +00:00
Zhenqiang Chen
a5e022d5d6 shrink-wrap.h: #define SHRINK_WRAPPING_ENABLED.
ChangeLog:
2014-09-09  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* shrink-wrap.h: #define SHRINK_WRAPPING_ENABLED.
	* ira.c: #include "shrink-wrap.h"
	(split_live_ranges_for_shrink_wrap): Use SHRINK_WRAPPING_ENABLED.
	* ifcvt.c: #include "shrink-wrap.h"
	(dead_or_predicable): Use SHRINK_WRAPPING_ENABLED.

testsuite/ChangeLog:
2014-09-09  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/split-live-ranges-for-shrink-wrap.c: New test.

From-SVN: r215041
2014-09-09 05:30:36 +00:00
Trevor Saunders
157e859ffe remove picochip
contrib/ChangeLog:

2014-09-08  Trevor Saunders  <tsaunders@mozilla.com>

	* compare-all-tests: Don't test picochip.
	* config-list.mk: Likewise.

gcc/ChangeLog:

2014-09-08  Trevor Saunders  <tsaunders@mozilla.com>

	* common/config/picochip/picochip-common.c: Remove.
	* config.gcc: Remove support for picochip.
	* config/picochip/constraints.md: Remove.
	* config/picochip/dfa_space.md: Remove.
	* config/picochip/dfa_speed.md: Remove.
	* config/picochip/picochip-protos.h: Remove.
	* config/picochip/picochip.c: Remove.
	* config/picochip/picochip.h: Remove.
	* config/picochip/picochip.md: Remove.
	* config/picochip/picochip.opt: Remove.
	* config/picochip/predicates.md: Remove.
	* config/picochip/t-picochip: Remove.
	* doc/md.texi: Don't document picochi.

libgcc/ChangeLog:

2014-09-08  Trevor Saunders  <tsaunders@mozilla.com>

	* config.host: Remove picochip support.
	* config/picochip/adddi3.S: Remove.
	* config/picochip/ashlsi3.S: Remove.
	* config/picochip/ashlsi3.c: Remove.
	* config/picochip/ashrsi3.S: Remove.
	* config/picochip/ashrsi3.c: Remove.
	* config/picochip/clzsi2.S: Remove.
	* config/picochip/cmpsi2.S: Remove.
	* config/picochip/divmod15.S: Remove.
	* config/picochip/divmodhi4.S: Remove.
	* config/picochip/divmodsi4.S: Remove.
	* config/picochip/lib1funcs.S: Remove.
	* config/picochip/longjmp.S: Remove.
	* config/picochip/lshrsi3.S: Remove.
	* config/picochip/lshrsi3.c: Remove.
	* config/picochip/parityhi2.S: Remove.
	* config/picochip/popcounthi2.S: Remove.
	* config/picochip/setjmp.S: Remove.
	* config/picochip/subdi3.S: Remove.
	* config/picochip/t-picochip: Remove.
	* config/picochip/ucmpsi2.S: Remove.
	* config/picochip/udivmodhi4.S: Remove.
	* config/picochip/udivmodsi4.S: Remove.

From-SVN: r215039
2014-09-09 02:11:06 +00:00
GCC Administrator
b9e76e8054 Daily bump.
From-SVN: r215036
2014-09-09 00:16:58 +00:00
David Malcolm
43f9bab0d2 control_flow_insn_p takes an insn
gcc/ChangeLog:
2014-09-08  David Malcolm  <dmalcolm@redhat.com>

	* basic-block.h (control_flow_insn_p): Strengthen param from
	const_rtx to const rtx_insn *.
	* cfgbuild.c (control_flow_insn_p): Likewise.

From-SVN: r215028
2014-09-08 20:52:19 +00:00
David Malcolm
e26d1bb239 gcse.c's modify_mem_list is a list of insns
gcc/ChangeLog:
2014-09-08  David Malcolm  <dmalcolm@redhat.com>

	* gcse.c (modify_mem_list): Strengthen this variable from
	vec<rtx> * to vec<rtx_insn *> *.
	(vec_rtx_heap): Strengthen this typedef from vec<rtx> to
	vec<rtx_insn *>.
	(load_killed_in_block_p): Strengthen local "list" from vec<rtx> to
	vec<rtx_insn *>, and local "setter" from rtx to rtx_insn *.
	(record_last_mem_set_info): Strengthen param "insn" from rtx to
	rtx_insn *.
	(record_last_set_info): Likewise for local "last_set_insn".

From-SVN: r215027
2014-09-08 20:45:32 +00:00
Jakub Jelinek
19b472cc70 re PR tree-optimization/60196 (Incorrect compilation with -fwrapv and -ftree-vectorize)
PR tree-optimization/60196
	PR tree-optimization/63189
	* gcc.dg/vect/pr63189.c: New test.
	* gcc.dg/vect/pr60196-1.c: New test.
	* gcc.dg/vect/pr60196-2.c: New test.

From-SVN: r215025
2014-09-08 22:15:31 +02:00
DJ Delorie
59784c46ff * doc/invoke.texi (MSP430 Options): Add -minrt.
From-SVN: r215021
2014-09-08 15:34:18 -04:00
Bill Schmidt
db09274d91 rs6000.c (special_handling_values): Add SH_SPLAT.
[gcc]

2014-09-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (special_handling_values):  Add SH_SPLAT.
	(rtx_is_swappable_p): Convert UNSPEC cascading ||s to a switch
	statement; allow optimization of UNSPEC_VSPLT_DIRECT with special
	handling SH_SPLAT.
	(adjust_extract): Fix test for VEC_DUPLICATE case; fix adjustment
	of extracted lane.
	(adjust_splat): New function.
	(handle_special_swappables): Call adjust_splat for SH_SPLAT.
	(dump_swap_insn_table): Add case for SH_SPLAT.

[gcc/testsuite]

2014-09-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/swaps-p8-16.c: New test.

From-SVN: r215019
2014-09-08 18:40:56 +00:00
Richard Biener
33d9078ac5 re PR ipa/63196 (FAIL: g++.dg/torture/pr57140.C -O3 -fomit-frame-pointer (internal compiler error))
2014-09-08  Richard Biener  <rguenther@suse.de>

	PR ipa/63196
	* tree-inline.c (copy_loops): The source loop header should
	always be non-NULL.
	(tree_function_versioning): If loops need fixup after removing
	unreachable blocks fix them.
	* omp-low.c (simd_clone_adjust): Do not add incr block to
	loop under construction.

From-SVN: r215016
2014-09-08 14:28:51 +00:00
Alan Lawrence
efe295f237 [Obvious] Remove unused aarch64_types_cmtst_qualifiers, was breaking bootstrap.
* config/aarch64/aarch64-builtins.c 
        (aarch64_types_cmtst_qualifiers, TYPES_TST): Remove as unused.

From-SVN: r215015
2014-09-08 14:18:01 +00:00