Commit r12-7687 exposed one miss optimization chance in function
rs6000_maybe_emit_maxc_minc, for now it only considers comparison
codes GE/GT/LE/LT, but it can support more variants with codes
UNLT/UNLE/UNGT/UNGE by reversing them into the equivalent ones
with GE/GT/LE/LT.
gcc/ChangeLog:
PR target/105002
* config/rs6000/rs6000.cc (rs6000_maybe_emit_maxc_minc): Support more
comparison codes UNLT/UNLE/UNGT/UNGE.
Patch from Rui Ueyama, who says:
libbacktrace occasionally fails to decompress compressed debug info
even though the sections contain valid zlib streams. The cause of the
issue is an off-by-one error.
If a zlib data block is a plain data (uncompressed data), the next two
bytes contain the size of the block. These two bytes value is byte-
aligned, so if we read-ahead more than 8 bits, we need to unread it.
So, the correct condition to determine whether or not we need to
unread a byte is bits >= 8 and not bits > 8. Due to this error,
if the last read bits happened to end at a byte boundary, the next
byte would be skipped. That caused the decompression failure.
This bug was originally reported against the mold linker.
rui314/mold#402
* elf.c (elf_zlib_inflate): Don't skip initial aligned byte in
uncompressed block.
gcc/ChangeLog:
* doc/extend.texi (Common Function Attributes): Document that
'access' does not imply 'nonnull'.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
This patch fixes an obvious coding goof that caused all clauses for
the combined OMP masked taskloop directive to be discarded.
gcc/fortran/
* trans-openmp.cc (gfc_split_omp_clauses): Fix mask for
EXEC_OMP_MASKED_TASKLOOP.
gcc/testsuite/
* gfortran.dg/gomp/masked-taskloop.f90: New.
gcc/fortran/ChangeLog:
PR fortran/105138
* intrinsic.cc (gfc_is_intrinsic): When a symbol refers to a
RECURSIVE procedure, it cannot be an INTRINSIC.
gcc/testsuite/ChangeLog:
PR fortran/105138
* gfortran.dg/recursive_reference_3.f90: New test.
Co-authored-by: Steven G. Kargl <kargl@gcc.gnu.org>
The mops cpy* patterns take three registers: a destination address,
a source address, and a size. The patterns clobber all three registers
as part of the operation. The set* patterns take a destination address,
a size, and a store value, and they clobber the first two registers as
part of the operation.
However, the associated expanders would try to use existing source,
destination and size registers where possible. Any variables in
those registers could therefore change unexpectedly.
For example:
void
copy1 (int *x, int *y, long z, int **res)
{
__builtin_memcpy (x, y, z);
*res = x;
}
generated:
cpyfp [x0]!, [x1]!, x2!
cpyfm [x0]!, [x1]!, x2!
cpyfe [x0]!, [x1]!, x2!
str x0, [x3]
ret
which stores the incremented x at *res.
gcc/
* config/aarch64/aarch64.md (aarch64_cpymemdi): Turn into a
define_expand and turn operands 0 and 1 from REGs to MEMs.
(*aarch64_cpymemdi): New pattern.
(aarch64_setmemdi): Turn into a define_expand and turn operand 0
from a REG to a MEM.
(*aarch64_setmemdi): New pattern.
* config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Use
copy_to_mode_reg on all three registers. Replace the original
MEM addresses rather than creating wild reads and writes.
(aarch64_expand_setmem_mops): Likewise for the size and for the
destination memory and address.
gcc/testsuite/
* gcc.target/aarch64/mops_4.c: New test.
This PR is about -fpack-struct causing a crash when <arm_neon.h>
is included. The new register_tuple_type code was expecting a
normal unpacked structure layout instead of a packed one.
For SVE we got around this by temporarily suppressing -fpack-struct,
so that the tuple types always have their normal ABI. However:
(a) The SVE ACLE tuple types are defined to be abstract. The fact
that GCC uses structures is an internal implementation detail.
(b) In contrast, the ACLE explicitly defines the Advanced SIMD
tuple types to be particular structures.
(c) Clang and previous versions of GCC are consistent in applying
-fpack-struct to these tuple structures.
This patch therefore honours -fpack-struct and -fpack-struct=. It also
adds tests for some other combinations, such as -mgeneral-regs-only and
-fpack-struct -mstrict-align.
gcc/
PR target/103147
* config/aarch64/aarch64-protos.h (aarch64_simd_switcher): New class.
* config/aarch64/aarch64-sve-builtins.h (sve_switcher): Inherit
from aarch64_simd_switcher.
* config/aarch64/aarch64-builtins.cc (aarch64_simd_tuple_modes):
New variable.
(aarch64_lookup_simd_builtin_type): Use it instead of TYPE_MODE.
(register_tuple_type): Add more asserts. Expect the alignment
of the structure to be subject to flag_pack_struct and
maximum_field_alignment. Set aarch64_simd_tuple_modes.
(aarch64_simd_switcher::aarch64_simd_switcher): New function.
(aarch64_simd_switcher::~aarch64_simd_switcher): Likewise.
(handle_arm_neon_h): Hold an aarch64_simd_switcher throughout.
(aarch64_general_init_builtins): Hold an aarch64_simd_switcher
while calling aarch64_init_simd_builtins.
* config/aarch64/aarch64-sve-builtins.cc (sve_switcher::sve_switcher)
(sve_switcher::~sve_switcher): Remove code now performed by
aarch64_simd_switcher.
gcc/testsuite/
PR target/103147
* gcc.target/aarch64/pr103147-1.c: New test.
* gcc.target/aarch64/pr103147-2.c: Likewise.
* gcc.target/aarch64/pr103147-3.c: Likewise.
* gcc.target/aarch64/pr103147-4.c: Likewise.
* gcc.target/aarch64/pr103147-5.c: Likewise.
* gcc.target/aarch64/pr103147-6.c: Likewise.
* gcc.target/aarch64/pr103147-7.c: Likewise.
* gcc.target/aarch64/pr103147-8.c: Likewise.
* gcc.target/aarch64/pr103147-9.c: Likewise.
* gcc.target/aarch64/pr103147-10.c: Likewise.
* g++.target/aarch64/pr103147-1.C: Likewise.
* g++.target/aarch64/pr103147-2.C: Likewise.
* g++.target/aarch64/pr103147-3.C: Likewise.
* g++.target/aarch64/pr103147-4.C: Likewise.
* g++.target/aarch64/pr103147-5.C: Likewise.
* g++.target/aarch64/pr103147-6.C: Likewise.
* g++.target/aarch64/pr103147-7.C: Likewise.
* g++.target/aarch64/pr103147-8.C: Likewise.
* g++.target/aarch64/pr103147-9.C: Likewise.
* g++.target/aarch64/pr103147-10.C: Likewise.
Use error_n rather than error_at for “%d vectors”, so that
translators can pick different translations based on the
number (2 vs more than 2, etc.)
gcc/
PR target/104897
* config/aarch64/aarch64-sve-builtins.cc
(function_resolver::infer_vector_or_tuple_type): Use error_n
for "%d vectors" messages.
I had been thinking about DR1286 "equivalence" as meaning generally
interchangeable, but looking back at the proposed resolution in the context
of this PR, I see that it's just about use as a template argument. So let's
give a pedwarn if we look through a renaming alias.
PR c++/103852
DR 1286
gcc/cp/ChangeLog:
* pt.cc (do_class_deduction): Pedwarn for renaming alias in C++17.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1z/class-deduction-alias1.C: Expect warning.
We were failing to declare class S in the global namespace because we were
treating the requires-expression parameter scope as a normal block scope, so
the implicit declaration went there.
It seems to me that the requires parameter scope is more like a function
parameter scope (not least in the use of the word "parameter"), so let's
change the scope kind. But then we need to adjust the prohibition on
placeholders declaring implicit template parameters.
PR c++/101677
gcc/cp/ChangeLog:
* name-lookup.h (struct cp_binding_level): Add requires_expression
bit-field.
* parser.cc (cp_parser_requires_expression): Set it.
(synthesize_implicit_template_parm): Check it.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-pr67178.C: Adjust error.
* g++.dg/cpp2a/concepts-requires28.C: New test.
This test was failing with -std=c++23 -fimplicit-constexpr (not tested by
default) due to different wording in the error message.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/noexcept34.C: Allow more wording variation.
This patch fixes a bug in lower_omp_target, where for Fortran arrays,
the expanded sender assignment is wrongly using the variable in the
current ctx, instead of the one looked-up outside, which is causing
use_device_ptr/addr to fail to work when used inside an omp-parallel
(where the omp child_fn is split away from the original).
The fix is inside omp-low.cc, though because the omp_array_data langhook
is used only by Fortran, this is essentially Fortran-specific.
2022-04-05 Chung-Lin Tang <cltang@codesourcery.com>
gcc/ChangeLog:
* omp-low.cc (lower_omp_target): Use outer context looked-up 'var' as
argument to lang_hooks.decls.omp_array_data, instead of 'ovar' from
current clause.
libgomp/ChangeLog:
* testsuite/libgomp.fortran/use_device_ptr-4.f90: New testcase.
When the walloca pass gained support for ranger the early pass
was not moved to a place where SSA form is available but remained
in the lowering pipeline. For the testcase in this bug this is
a problem because for errorneous input we still run the lowering
pipeline but here have broken SSA form which ranger does not like.
The solution is to rectify the mistake with using ranger without
SSA form and move the pass which solves both issues.
2022-04-05 Richard Biener <rguenther@suse.de>
PR c/105151
* passes.def (pass_walloca): Move early instance into
pass_build_ssa_passes to make SSA form available.
* gcc.dg/gimplefe-error-14.c: New testcase.
Some tests expect a convert instruction but nowadays
(r12-4475-g247c407c83f001) the conversion is already done at compile
time. This results in a literal-pool load. Change the tests accordingly.
gcc/testsuite/ChangeLog:
* gcc.target/s390/zvector/vec-double-compile.c: Expect vl
instead of vc*.
* gcc.target/s390/zvector/vec-float-compile.c: Dito.
* gcc.target/s390/zvector/vec-signed-compile.c: Dito.
* gcc.target/s390/zvector/vec-unsigned-compile.c: Dito.
We have been emitting the "higher" variantes instead of the "not less or equal"
ones for a while. Change the test expectations accordingly.
gcc/testsuite/ChangeLog:
* gcc.target/s390/ifcvt-two-insns-bool.c: Change nle to h.
* gcc.target/s390/ifcvt-two-insns-int.c: Dito.
* gcc.target/s390/ifcvt-two-insns-long.c: Dito.
In gcc.dg/Wuse-after-free-2.c we try to detect a use-after-free. The
test's while loop is converted into a rawmemchr builtin making
it impossible to determine that the pointers *p and *q are related.
Therefore, disable the tree loop distribute patterns pass for this test.
gcc/testsuite/ChangeLog:
* gcc.dg/Wuse-after-free-2.c:
Add -fno-tree-loop-distribute-patterns in order to avoid
rawmemchr.
Since cfg is freed before machine_reorg, just do a rough calculation
of the window according to the layout.
Also according to an experiment on CLX, set window size to 64.
Currently only handle V2DFmode load since it doesn't need any scratch
registers, and it's sufficient to recover cray performance for -O2
compared to GCC11.
gcc/ChangeLog:
PR target/101908
* config/i386/i386.cc (ix86_split_stlf_stall_load): New
function
(ix86_reorg): Call ix86_split_stlf_stall_load.
* config/i386/i386.opt (-param=x86-stlf-window-ninsns=): New
param.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr101908-1.c: New test.
* gcc.target/i386/pr101908-2.c: New test.
* gcc.target/i386/pr101908-3.c: New test.
When the mode of regno_reg_rtx is not hard_regno_mode_ok for the
target, try grouping the register with subsequent ones. This enables
s16 to s31 and their hidden pairs to be zeroed with the default logic
on some arm variants.
for gcc/ChangeLog
* targhooks.cc (default_zero_call_used_regs): Attempt to group
regs that the target refuses to use in their natural modes.
(zcur_select_mode_rtx): New.
* regs.h (struct target_regs): Add x_hard_regno_max_nregs.
(hard_regno_max_nregs): Define.
* reginfo.cc (init_reg_modes_target): Set hard_regno_max_nregs.
Since olddecl isn't a definition, it doesn't get DECL_FRIEND_CONTEXT, so we
need to copy it from newdecl when we merge the declarations.
PR c++/101894
gcc/cp/ChangeLog:
* decl.cc (duplicate_decls): Copy DECL_FRIEND_CONTEXT.
gcc/testsuite/ChangeLog:
* g++.dg/lookup/friend22.C: New test.
The suggested resolution for CWG1286, which we implemented, ignores default
template arguments, but this PR is an example of why that doesn't make
sense: the templates aren't functionally equivalent.
PR c++/103852
DR 1286
gcc/cp/ChangeLog:
* pt.cc (get_underlying_template): Compare default template args.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/alias-decl-dr1286a.C: Default args now matter.
* g++.dg/cpp1z/class-deduction-alias1.C: New test.
Normally updates to the source directory files are guarded with
--enable-maintainer-mode, e.g. we don't regenerate configure, config.h,
Makefile.in in directories that use automake etc. unless gcc is configured
that way. Otherwise the source tree can't be e.g. stored on a read-only
filesystem etc.
In gcc/Makefile.in we use @MAINT@ for that but that works because
gcc/Makefile is generated by configure. In config/*/t-* files we need to
check $(ENABLE_MAINTAINER_RULES):
# The following provides the variable ENABLE_MAINTAINER_RULES that can
# be used in language Make-lang.in makefile fragments to enable
# maintainer rules. So, ENABLE_MAINTAINER_RULES is 'true' in
# maintainer mode, and '' otherwise.
@MAINT@ ENABLE_MAINTAINER_RULES = true
On Mon, Apr 04, 2022 at 11:10:14AM +0100, Richard Sandiford wrote:
> I guess the risk is that it will become even easier to forget
> to commit an updated aarch64-tune.md. Perhaps we should have a
> non-maintainer rule to build aarch64-tune.md locally and check it
> against the source-directory version, and fail the build if there's
> a mismatch. Or maybe we should just generate aarch64-tune.md in the
> build directory and remove the source directory version.
I've tried if aarch64-tune.md will be read from the build dir, but it is
not. The gen* files can use -I options to add additional directories, but
they don't use them.
Here is a variant patch which will complain and fail if there is a change
and --enable-maintainer-mode is not enabled.
2022-04-04 Jakub Jelinek <jakub@redhat.com>
PR target/105144
* config/aarch64/t-aarch64 (s-aarch64-tune-md): Do move-if-change
only if configured with --enable-maintainer-mode, otherwise compare
tmp-aarch64-tune.md with $(srcdir)/config/aarch64/aarch64-tune.md and
if they differ, emit a message and fail.
The test-cases libgomp.fortran/examples-4/declare_target-{1,2}.f90 mean to
set an nvptx-specific limit using offload_target_nvptx, but also change
behaviour for amd.
That is, there is now a difference in behaviour between:
- a compiler configured for GCN offloading, and
- a compiler configured for both GCN and nvptx offloading.
Fix this by using instead on_device_arch_nvptx.
Tested on x86_64 with nvptx accelerator.
libgomp/ChangeLog:
2022-04-04 Tom de Vries <tdevries@suse.de>
* testsuite/libgomp.fortran/examples-4/declare_target-1.f90: Use
on_device_arch_nvptx instead of offload_target_nvptx.
* testsuite/libgomp.fortran/examples-4/declare_target-2.f90: Same.
As I wrote in the PR, our Fedora trunk gcc builds likely after r12-7842
change are now failing (lto1 crashes).
What happens is that when one bootstraps into an empty build directory
(or set of them), mddeps.mk doesn't exist yet and so Makefile doesn't
include it. When building from an empty dir, that is usually not a big
issue, it is enough when various build directory files depend on just
$(srcdir)/config/aarch64/aarch64.md, those files don't exist and
aarch64.md does, so they are built, so is mddeps.mk.
But because the other dependencies aren't there (in particular
$(srcdir)/config/aarch64/aarch64-tune.md ), the
s-aarch64-tune-md rule isn't invoked to regenerate that file and the
r12-7842 commit reordered aarch64-cores.def entries but didn't commit
regenerated aarch64-tune.md. Because it is just reordering in
aarch64-tune.md, it actually doesn't matter and bootstraps succeeds.
But then during make install, mddeps.mk exists already in gcc/ directory,
it sees that aarch64-cores.def is newer than aarch64-tune.md (unless
gen_update is used, that just touches aarch64-tune.md to make sure it
is newer) and regenerates it and as it is different, make install rebuilds
a large subset of the *.o files, but this time with the system g++
rather than previous stage one. And during lto linking of it there
are differences in LTO bytecode between the compilers and we crash.
The following patch fixes that by regenerating aarch64-tune.md
(what was forgotten in r12-7842) and by adding a dependency from
s-mddeps to s-aarch64-tune-md, which makes sure that even when mddeps.mk
doesn't exist yet make sees the dependency and regenerates aarch64-tune.md
if needed.
2022-04-04 Jakub Jelinek <jakub@redhat.com>
PR target/105144
* config/aarch64/t-aarch64 (s-mddeps): Depend on s-aarch64-tune-md.
* config/aarch64/aarch64-tune.md: Regenerated.
The following adds missing verification that the input vectors
have the same number of elements for vectorizable_operation.
2022-04-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/105132
* tree-vect-stmts.cc (vectorizable_operation): Check that
the input vectors have the same number of elements.
* gcc.dg/torture/pr105132.c: New testcase.
fold_convertible_p expects an operand and a type to convert to
but recurses with two vector component types. Fixed by allowing
types instead of an operand as well.
2022-04-04 Richard Biener <rguenther@suse.de>
PR middle-end/105140
* fold-const.cc (fold_convertible_p): Allow a TYPE_P arg.
* gcc.dg/pr105140.c: New testcase.
Ignore:
Checking 86d8e0c065: FAILED
ERR: line should start with a tab: "This reverts commits r12-7804 and r12-7929."
ERR: could not deduce ChangeLog file
contrib/ChangeLog:
* gcc-changelog/git_update_version.py: Ignore the revision.
The iq2000 port is mis-compiling its mulsi3 libgcc2 function.
AFAICT, the iq2000 has delay slots and can use "branch-likely" forms of conditional branches to annul-false the slot. There's a support routine that handles creation of the likely form. However, that routine is not used by the bbi[n] instructions.
If I manually add the likely extension to the bbi[b] instructions, the assembler complains After a fair amount of digging it appears that the likely forms of bbi[n] are only supported on the IQ10 variant.
Given this is a dead processor and has been so for a while it seems reasonable to just disallow annul-false slots for the bbi[n] instructions rather than try to handle them just for the IQ10 (which we don't have real support for anyway).
This (of course) fixes the vrp13 regression. But it also fixes nearly a thousand execution test failures in the testsuite (Yow!).
gcc/
PR target/104987
* config/iq2000/iq2000.md (bbi): New attribute, default to no.
(delay slot descripts): Use different delay slot description when
the insn as the "bbi" attribute.
(bbi, bbin patterns): Set the bbi attribute to yes.
The following testcase is miscompiled on ia32.
The problem is that at -O0 we end up with:
vector(4) short unsigned int _1;
short unsigned int u.0_3;
...
_1 = {u.0_3, u.0_3, u.0_3, u.0_3};
statement (dead) which is wrongly expanded.
elt is (subreg:HI (reg:SI 83 [ u.0_3 ]) 0), tmp_mode SImode,
so after convert_mode we start with word (reg:SI 83 [ u.0_3 ]).
The intent is to manually broadcast that value to 2 SImode parts,
but because we pass word as target to expand_simple_binop, it will
overwrite (reg:SI 83 [ u.0_3 ]) and we end up with 0:
10: {r83:SI=r83:SI<<0x10;clobber flags:CC;}
11: {r83:SI=r83:SI|r83:SI;clobber flags:CC;}
12: {r83:SI=r83:SI<<0x10;clobber flags:CC;}
13: {r83:SI=r83:SI|r83:SI;clobber flags:CC;}
14: clobber r110:V4HI
15: r110:V4HI#0=r83:SI
16: r110:V4HI#4=r83:SI
as the two ors do nothing and two shifts each by 16 left shift it all
away.
The following patch fixes that by using NULL_RTX target, so we expand it as
10: {r110:SI=r83:SI<<0x10;clobber flags:CC;}
11: {r111:SI=r110:SI|r83:SI;clobber flags:CC;}
12: {r112:SI=r83:SI<<0x10;clobber flags:CC;}
13: {r113:SI=r112:SI|r83:SI;clobber flags:CC;}
14: clobber r114:V4HI
15: r114:V4HI#0=r111:SI
16: r114:V4HI#4=r113:SI
instead.
Another possibility would be to pass NULL_RTX only when word == elt
and word otherwise, where word would necessarily be a pseudo from the first
shift after passing NULL_RTX there once or pass NULL_RTX for the shift and
word for ior.
2022-04-03 Jakub Jelinek <jakub@redhat.com>
PR target/105123
* config/i386/i386-expand.cc (ix86_expand_vector_init_general): Avoid
using word as target for expand_simple_binop when doing ASHIFT and
IOR.
* gcc.target/i386/pr105123.c: New test.
These have been superceded by the front-end's own internal tracking of
instantiations, exposed by `-ftransition=templates'.
gcc/d/ChangeLog:
* d-lang.cc: Include dmd/template.h.
(d_parse_file): Call printTemplateStats when vtemplates is set.
* decl.cc (start_function): Remove OPT_Wtemplates warning.
* lang.opt (Wtemplates): Remove.
When finishing a function that is a coroutine, the function is
transformed into a "ramp" function, and the original user-provided
function body gets moved into a newly created "actor" function.
In this case `current_function_decl` points to the ramp function,
but `current_binding_level->blocks` would still point to the
scope block of the user-provided function body in the actor function,
so when the ramp function was finished during `poplevel()` in decl.cc,
we could end up with that block being reused as the `DECL_INITIAL()` of
the ramp function:
subblocks = functionbody >= 0 ? current_binding_level->blocks : 0;
// [...]
DECL_INITIAL (current_function_decl) = block ? block : subblocks;
This block would then be independently modified by subsequent passes
touching either the ramp or the actor function, potentially causing
an ICE depending on the order and function of these passes.
gcc/cp/ChangeLog:
PR c++/103328
* coroutines.cc (morph_fn_to_coro): Reset
current_binding_level->blocks.
gcc/testsuite/ChangeLog:
PR c++/103328
* g++.dg/coroutines/pr103328.C: New test.
Co-Authored-By: Iain Sandoe <iain@sandoe.co.uk>
D front-end changes:
- Import dmd v2.099.1-beta.1.
- The address of NRVO variables is now stored in scoped closures
when they have nested references.
- Using `__traits(parameters)' in foreach loops now always returns
the parameters to the function the foreach appears within.
Previously, when used inside a `foreach' using an overloaded
`opApply', the trait would yield the parameters to the delegate.
- The deprecation period of unannotated `asm' blocks has been ended.
- The `inout' attribute no longer implies the `return' attribute.
- Added new `D_PreConditions', `D_PostConditions', and
`D_Invariants' version identifiers.
D runtime changes:
- Import druntime v2.099.1-beta.1.
Phobos changes:
- Import phobos v2.099.1-beta.1.
- `Nullable' in `std.typecons' can now act as a range.
- std.experimental.logger default level changed to `info' instead of
`warning'.
gcc/d/ChangeLog:
* dmd/MERGE: Merge upstream dmd 47871363d.
* d-builtins.cc (d_init_versions): Add predefined version identifiers
D_PreConditions, D_PostConditions, and D_Invariants.
* d-codegen.cc (d_build_call): Update for new front-end interface.
(build_frame_type): Generate reference field for NRVO variables with
nested references.
(build_closure): Generate assignment of return address to closure.
* d-tree.h (DECL_INSTANTIATED): Use DECL_LANG_FLAG_2.
(bind_expr): Remove.
* decl.cc (DeclVisitor::visit (FuncDeclaration *)): Update for new
front-end interface.
(get_symbol_decl): Likewise.
(get_decl_tree): Check DECL_LANG_FRAME_FIELD before DECL_LANG_NRVO.
Dereference the field when both are set.
* expr.cc (ExprVisitor::visit (DeleteExp *)): Update for new front-end
interface.
* modules.cc (get_internal_fn): Likewise.
* toir.cc (IRVisitor::visit (ReturnStatement *)): Likewise.
libphobos/ChangeLog:
* libdruntime/MERGE: Merge upstream druntime c52e28b7.
* libdruntime/Makefile.am (DRUNTIME_DSOURCES_OPENBSD): Add
core/sys/openbsd/pwd.d.
* libdruntime/Makefile.in: Regenerate.
* src/MERGE: Merge upstream phobos 99e9c1b77.
* testsuite/libphobos.exceptions/message_with_null.d: New test.
gcc/testsuite/ChangeLog:
* gdc.dg/nrvo1.d: New test.
DECL_SIZE(x) is NULL if x is a flexible array member, but I forgot to
check it in r12-7962. Then if we increase the size of a struct with
flexible array member (by using aligned attribute), the code will
dereference NULL trying to use the "size" of the flexible array member.
gcc/
* config/mips/mips.cc (mips_function_arg): Check if DECL_SIZE is
NULL before dereferencing it.
gcc/testsuite/
* gcc.target/mips/pr102024-4.c: New test.
Apparently clang trunk implemented __builtin_source_location(), but the
using __builtin_ret_type = decltype(__builtin_source_location());
which has been added for it isn't enough, they also need the
std::source_location::__impl class to be defined (but incomplete seems
to be good enough) before the builtin is used.
The following has been tested on godbolt with clang trunk (old version
fails with
error: 'std::source_location::__impl' was not found; it must be defined before '__builtin_source_location' is called
and some follow-up errors), getting back to just void * instead of
__builtin_ret_type and commenting out using doesn't work either and
just struct __impl; before using __builtin_ret_type doesn't work too.
2022-04-02 Jakub Jelinek <jakub@redhat.com>
PR libstdc++/105128
* include/std/source_location (std::source_location::__impl): Move
definition before using __builtin_ret_type.
On machines that support fixed-point and the test runs, it's failing
because of warnings issued by -Warray-parameter=[12], enabled by
-Wall.
The warnings state "mismatch in bound 1 of argument 1 declared as...",
referring to the redeclaration of f2_##NAME. The purpose of the
redeclaration is not clear to me.
It doesn't look like the test intends to catch mismatches between
parameter's array lengths, despite the explicit array bound and the
incompatible calls, so I'm adding -Wno-array-parameter to avoid this
distraction and enable the test to pass.
for gcc/testsuite/ChangeLog
* gcc.dg/fixed-point/composite-type.c: Add -Wno-array-parameter.
Here when attempting to deduce T in the NTTP type A<T> from the argument
type 'const A<int>', we give up due to the const:
types ‘A<T>’ and ‘const A<int>’ have incompatible cv-qualifiers
But since the type of an NTTP cannot be cv-qualified, it seems natural
to ignore cv-qualifiers on the argument type before attempting to unify
the two types.
PR c++/105110
gcc/cp/ChangeLog:
* pt.cc (unify) <case TEMPLATE_PARM_INDEX>: Drop cv-quals from
the argument type of an NTTP before deducing from it.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/nontype-class52.C: New test.
We should make sure that the hard register set that is actually cleared by
the target hook zero_call_used_regs should be a subset of all call used
registers.
At the same time, update documentation for the target hook
TARGET_ZERO_CALL_USED_REGS.
This new assertion identified a bug in the i386 implemenation, which
incorrectly set the zeroed_hardregs for stack registers. Fixed this bug
in i386 implementation.
gcc/ChangeLog:
2022-04-01 Qing Zhao <qing.zhao@oracle.com>
* config/i386/i386.cc (zero_all_st_registers): Return the value of
num_of_st.
(ix86_zero_call_used_regs): Update zeroed_hardregs set according to
the return value of zero_all_st_registers.
* doc/tm.texi: Update the documentation of TARGET_ZERO_CALL_USED_REGS.
* function.cc (gen_call_used_regs_seq): Add an assertion.
* target.def: Update the documentation of TARGET_ZERO_CALL_USED_REGS.
gcc/
PR target/102024
* config/mips/mips.cc (mips_function_arg): Ignore zero-width
fields, and inform if it causes a psABI change.
gcc/testsuite/
PR target/102024
* gcc.target/mips/pr102024-1.c: New test.
* gcc.target/mips/pr102024-2.c: New test.
* gcc.target/mips/pr102024-3.c: New test.
gcc/
PR target/102024
* config/mips/mips.cc (mips_fpr_return_fields): Detect C++
zero-width bit-fields and set up an indicator.
(mips_return_in_msb): Adapt for mips_fpr_return_fields change.
(mips_function_value_1): Diagnose when the presense of a C++
zero-width bit-field changes function returning in GCC 12.
gcc/testsuite/
PR target/102024
* g++.target/mips/mips.exp: New test supporting file.
* g++.target/mips/pr102024.C: New test.
