2019-07-28 Martin Liska <mliska@suse.cz>
PR ipa/89330
* cgraph.c (symbol_table::create_edge): Always allocate
a cgraph_edge.
(symbol_table::free_edge): Store summary_id to
edge_released_summary_ids if != -1;
* cgraph.h (NEXT_FREE_NODE): Remove.
(SET_NEXT_FREE_NODE): Likewise.
(NEXT_FREE_EDGE): Likewise.
(symbol_table::release_symbol): Store summary_id to
cgraph_released_summary_ids if != -1;
(symbol_table::allocate_cgraph_symbol): Always allocate
a cgraph_node.
From-SVN: r273857
Since svn r123193 (git 327202e27a) the comment about scratch regs was
no longer correct, and I think gen_sibcall could have been used even
then.
* gcc/config/rs6000/rs6000-call.c (rs6000_output_mi_thunk): Use
gen_sibcall.
From-SVN: r273855
This patch makes the obvious fix for PR91135, and deletes extraneous
copies of GNU_USER_TARGET_D_OS_VERSIONS that appear in rs6000/linux.h
and rs6000/linux64.h. Since all configurations using either of these
files also include linux.h there is no need to duplicate the macro.
PR target/91135
* config/rs6000/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Don't
define.
* config/rs6000/linux64.h (TARGET_OS_CPP_BUILTINS): Invoke
GNU_USER_TARGET_OS_CPP_BUILTINS for aixdesc abi.
(GNU_USER_TARGET_D_OS_VERSIONS): Don't define.
From-SVN: r273854
When gcc is configured using --with-cpu=<cpu>, the specified cpu
effectively becomes a default -mcpu=<cpu> passed to gcc. This then
affects the cpu passed to gas via ASM_CPU_SPEC. If gcc is not
configured using --with-cpu then the cpu passed to gas is that given
by ASM_DEFAULT_SPEC, which currently does not match the default flags
selected in default64.h. This patch makes ASM_DEFAULT_SPEC agree with
TARGET_DEFAULT flags.
rs6000/default64.h appears in three places in config.gcc, the first
one immediately followed by rs6000/freebsd64.h in $tm_file, and the
other two immediately followed by rs6000/linux64.h. To be able to
define ASM_DEFAULT_SPEC in rs6000/default64.h we don't want to
redefine in the other two files. rs6000/freebsd64.h is easy since
that file is always preceded by rs6000/default64.h, but
rs6000/linux64.h can appear without rs6000/default64.h (a
powerpc*-linux config where the default is -m32). In that case we
will have TARGET_DEFAULT flags of 0 (from rs6000/sysv4.h) and want to
use -mppc without -m64 and -mppc64 with -m64. This can be done by
using the rs6000/rtems.h ASM_DEFAULT_SPEC in rs6000/sysv4.h, a change
that won't affect sysv4 configurations where -m64 is invalid.
The patch also introduces ASM_DEFAULT_EXTRA for the altivec variant
targets so as to enable -maltivec by default.
PR target/91050
* config/rs6000/sysv4.h (ASM_DEFAULT_SPEC): Modify if -m64.
* config/rs6000/default64.h (ASM_DEFAULT_SPEC): Define.
* config/rs6000/freebsd64.h (ASM_DEFAULT_SPEC): Don't define.
* config/rs6000/linux64.h (ASM_DEFAULT_SPEC): Likewise.
* config/rs6000/rtems.h (ASM_DEFAULT_SPEC): Likewise.
* config/rs6000/rs6000.h (ASM_DEFAULT_EXTRA): Define and use
in asm_default spec.
* config/rs6000/eabialtivec.h (ASM_DEFAULT_EXTRA): Redefine.
* config/rs6000/linuxaltivec.h (ASM_DEFAULT_EXTRA): Redefine.
From-SVN: r273853
* doc/xml/manual/documentation_hacking.xml: Fix broken reference
to the Doxygen manual. Avoid a "here" link on the way.
Fix another broken link to Doxygen docblocks.
From-SVN: r273852
This test is failing with older cpus because the included header needs both
altivec and vsx to be enabled to succeed in compiling. Without this (if these
are not defaults for the cpu) there are errors like:
In file included from ... x86intrin.h:41,
from ... bmi2-bzhi64-1a.c:6:
... xmmintrin.h: In function '_mm_loadu_ps':
... xmmintrin.h:122:11:
error: incompatible types when returning type 'int' but '__m128' {aka '__vector(4) float'} was expected
<snip>
... xmmintrin.h: In function '_mm_cvtps_pi32':
... xmmintrin.h:996:3:
error: use of 'long long' in AltiVec types is invalid without '-mvsx'
<snip>
Fixed by adding -maltivec -mvsx to the options.
gcc/testsuite/
2019-07-27 Iain Sandoe <iain@sandoe.co.uk>
* gcc.target/powerpc/bmi2-bzhi64-1a.c: Add options to enable altivec
and vsx.
From-SVN: r273844
Darwin's "size" command has a different header line, reflecting the Mach-O
section naming conventions. This causes tests using the command to fail
because scanasm.exp expects and checks specific layout of the header line.
gcc/testsuite/
2019-07-26 Iain Sandoe <iain@sandoe.co.uk>
* lib/scanasm.exp (object-size): Handle Darwin's size command.
From-SVN: r273839
This macro was added as part of moving std::endian from <type_traits> to
<bit>.
* include/std/bit (__cpp_lib_endian): Define.
* include/std/version (__cpp_lib_endian): Define.
* testsuite/26_numerics/endian/2.cc: New.
* testsuite/26_numerics/endian/3.cc: New.
* testsuite/26_numerics/endian/4.cc: New.
From-SVN: r273828
Due to config.gcc all the options need to be on one line because of the grep
lines which would select only the first line of the option.
This causes it not to select the right bits on options that are spread over
multiple lines when the --with-arch configure option is used. The issue happens
silently and you just get a compiler with an incorrect set of default flags.
The current rules are quite rigid:
1) No space between the AARCH64_OPT_EXTENSION and the opening (.
2) No space between the opening ( and the extension name.
3) No space after the extension name before the ,.
4) Spaces are only allowed after a , and around |.
This patch makes this a lot less fragile by using the C pre-processor to flatten
the list and then provides much more flexible regex using group matching to
process the options instead of string replacement. This removes all the
restrictions above and makes the code a bit more readable.
gcc/ChangeLog:
PR target/89517
* config.gcc: Relax parsing of AARCH64_OPT_EXTENSION.
* config/aarch64/aarch64-option-extensions.def: Add new comments
and restore easier to read options.
From-SVN: r273827
This patch moves part of the type conversion code from convert.c to match.pd
because match.pd is able to apply these transformations in the presence of
intermediate temporary variables.
Concretely it makes both these cases behave the same
float e = (float)a * (float)b;
*c = (_Float16)e;
and
*c = (_Float16)((float)a * (float)b);
gcc/ChangeLog:
* convert.c (convert_to_real_1): Move part of conversion code...
* match.pd: ...To here.
gcc/testsuite/ChangeLog:
* gcc.dg/type-convert-var.c: New test.
From-SVN: r273826
2019-07-26 Martin Jambor <mjambor@suse.cz>
PR ipa/89330
* ipa-inline-transform.c (check_speculations_1): New function.
(push_all_edges_in_set_to_vec): Likewise.
(check_speculations): Use check_speculations_1, new parameter
new_edges.
(inline_call): Pass new_edges to check_speculations.
* ipa-inline.c (add_new_edges_to_heap): Assert edge_callee is not
NULL.
(speculation_useful_p): Early return true if edge is inlined, remove
later checks for inline_failed.
testsuite/
* g++.dg/lto/pr89330_[01].C: New test.
* g++.dg/tree-prof/devirt.C: Added -fno-profile-values to dg-options.
From-SVN: r273825
This change to an early C++2a feature was just approved (P1612R1).
* include/std/bit (endian): Move definition here as per P1612R1.
* include/std/type_traits (endian): Remove definition from here.
* testsuite/20_util/endian/1.cc: Rename to ...
* testsuite/26_numerics/endian/1.cc: ... here. Adjust header.
From-SVN: r273816
The testcase is failing to instrument part of the source because of a bug
in the ordering of static DTORs. It seems unlikely that this is generically
fixable in the toolchain (and given that it's likely to be a dynamic loader
change would not be expected to be applied retrospectively to OS versions
that are out of support). To avoid the testsuite noise, xfail the count lines
that don't match (we can adjust the xfails as/when the upstream bug is fixed).
dejagnu xfails do not seem to work when embedded in a line like:
~Test (void) { .... /* count(1) { xfail ... } */ }
the closing brace seems to confuse the parser. The solution is to exapnd the
text onto three lines.
2019-07-25 Iain Sandoe <iain@sandoe.co.uk>
PR gcov-profile/91087
* g++.dg/gcov/pr16855.C: Xfail the count lines for the DTORs and the
"final" line for the failure summaries. Adjust source layout so that
dejagnu xfail expressions work.
From-SVN: r273809
2019-07-25 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65819
* dependency.h (gfc_dep_resovler): Add optional argument identical.
* dependency.c (gfc_check_dependency): Do not alway return 1 if
the symbol is the same. Pass on identical to gfc_dep_resolver.
(gfc_check_element_vs_element): Whitespace fix.
(gfc_dep_resolver): Adjust comment for function. If identical is
true, return 1 if any overlap has been found.
2019-07-25 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65819
* gfortran.dg/dependency_54.f90: New test.
From-SVN: r273807
* cif-code.def (NEVER_CALL): New code.
* ipa-inline.c (want_inline_small_function_p): Fix formatting issues.
Set the failure to CIF_NEVER_CALL if the IPA count is zero.
From-SVN: r273804
The Thumb-2 movsi patterns try to prefer low registers for loads and stores.
However this is done incorrectly by using 2 separate variants with 'l' and 'h'
register classes. The register allocator will only use low registers, and
as a result we end up with significantly more spills and moves to high
registers. Fix this by merging the alternatives and use 'l*r' to indicate
preference for low registers. This saves ~400 instructions from the pr77308
testcase.
gcc/
* config/arm/thumb2.md (thumb2_movsi_insn): Fix load/store low reg.
* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
From-SVN: r273802
2019-07-25 Richard Biener <rguenther@suse.de>
* tree-vrp.c (extract_range_from_multiplicative_op): Add
type parameter and use it instead of guessing expression
type from the first operand.
(extract_range_from_binary_expr): Pass expr_type down.
From-SVN: r273797
GCC 10 now supports having RTL codes being code attributes (thanks
Richard) allowing us to map smax to smin and vice versa.
This means we can clean up their use in the saturation patterns that do
the cross product of [smin, smax] and use the pattern
predicate to cancel out the nonsense ones.
* config/arm/arm.md (SATrev): Change to code attribute.
(*satsi_<SAT:code>): Adjust for the above.
(*satsi_<SAT:code>_shift): Likewise.
From-SVN: r273796
Currently get_most_common_single_value could only return the max hist
<value, count>, add sort after reading from disk, then it return nth value
in later use. Rename it to get_nth_most_common_value.
gcc/ChangeLog:
2019-07-15 Xiong Hu Luo <luoxhu@linux.ibm.com>
* ipa-profile.c (get_most_common_single_value): Use
get_nth_most_common_value.
* profile.c (sort_hist_value): New function.
(compute_value_histograms): Call sort_hist_value to sort the
values after loading from disk.
* value-prof.c (get_most_common_single_value): Rename to ...
get_nth_most_common_value. Add input params n, return
the n_th value and count.
(gimple_divmod_fixed_value_transform): Use
get_nth_most_common_value.
(gimple_ic_transform): Likewise.
(gimple_stringops_transform): Likewise.
* value-prof.h (get_most_common_single_value): Add input params
n, default to 0.
From-SVN: r273789
PR tree-optimization/91183 - strlen of a strcpy result with a conditional source not folded
PR tree-optimization/86688 - missing -Wstringop-overflow using a non-string local array in strnlen with excessive bound
gcc/ChangeLog:
PR tree-optimization/91183
PR tree-optimization/86688
* builtins.c (compute_objsize): Handle MEM_REF.
* tree-ssa-strlen.c (class ssa_name_limit_t): New.
(get_min_string_length): Remove.
(count_nonzero_bytes): New function.
(handle_char_store): Rename...
(handle_store): to this. Handle multibyte stores via integer types.
(strlen_check_and_optimize_stmt): Adjust conditional and the called
function name.
gcc/testsuite/ChangeLog:
PR tree-optimization/91183
PR tree-optimization/86688
* gcc.dg/Wstringop-overflow-14.c: New test.
* gcc.dg/attr-nonstring-2.c: Remove xfails.
* gcc.dg/strlenopt-70.c: New test.
* gcc.dg/strlenopt-71.c: New test.
* gcc.dg/strlenopt-72.c: New test.
* gcc.dg/strlenopt-8.c: Remove xfails.
From-SVN: r273783
We still need to cater for pr80556, for the single-arch case.
2019-07-24 Iain Sandoe <iain@sandoe.co.uk>
gcc/
PR bootstrap/87030
* config/i386/darwin.h (REAL_LIBGCC_SPEC): Revert r273749.
From-SVN: r273768
* gimplify.c (flag_instrument_functions_exclude_p): Include
namespace/class information in the printable name.
* opts.c (add_comma_separated_to_vector): Add NUL terminator
to tokens entered into the vector.
From-SVN: r273766
When entering an interrupt, not only the call save registers needs to
be place on stack but also the call clobbers one. More over, the
ARC700 return from interrupt instruction needs to be rtie, the same
like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX]
instruction. Additionally, we need to save the state of the ZOL
machinery, namely the lp_count, lp_end and lp_start registers. For
architectures which are using extension registers (i.e., HS48) we need
to save/restore them as well.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_output_function_epilogue): Delete
declaration.
(arc_compute_frame_size): Millicode is disabled when compiling
ISR.
(arc_return_address_register): Likewise.
(arc_compute_function_type): Likewise.
(arc_compute_frame_size): Likewise.
(secondary_reload_info): Likewise.
(arc_get_unalign): Likewise.
(arc_can_use_return_insn): Declare.
* config/arc/arc.c (AUX_LP_START): Define
(AUX_LP_END): Likewise.
(arc_frame_info): Update gmask member to 64-bit datum.
(GMASK_LEN): Update.
(arc_compute_function_type): Make it static, move it forward.
(arc_must_save_register): Update, consider the extra regs.
(arc_compute_millicode_save_restore_regs): Update to use the 64
bit gmask.
(arc_compute_frame_size): Likewise.
(arc_enter_leave_p): Likewise.
(arc_save_callee_saves): Likewise.
(arc_restore_callee_saves): Likewise.
(arc_save_callee_enter): Likewise.
(arc_restore_callee_leave): Likewise.
(arc_save_callee_milli): Likewise.
(arc_restore_callee_milli): Likewise.
(arc_expand_prologue): Add new interrupt handling.
(arc_return_address_register): Make it static, move it forward.
(arc_expand_epilogue): Add new interrupt handling.
(arc_get_unalign): Delete.
(arc_epilogue_uses): Make sure we do not remove the extra
saved/restored registers when interrupt.
(arc_can_use_return_insn): New function.
(push_reg): Likewise.
(pop_reg): Likewise.
(arc_save_callee_saves): Add ZOL and FPX aux registers saving
procedures.
(arc_restore_callee_saves): Likewise, but restoring.
* config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define.
(R33_REG): Likewise.
(R34_REG): Likewise.
(R35_REG): Likewise.
(R36_REG): Likewise.
(R37_REG): Likewise.
(R38_REG): Likewise.
(R39_REG): Likewise.
(R45_REG): Likewise.
(R46_REG): Likewise.
(R47_REG): Likewise.
(R48_REG): Likewise.
(R49_REG): Likewise.
(R50_REG): Likewise.
(R51_REG): Likewise.
(R52_REG): Likewise.
(R53_REG): Likewise.
(R54_REG): Likewise.
(R55_REG): Likewise.
(R56_REG): Likewise.
(R58_REG): Likewise.
(type): Add rtie attribute.
(in_call_delay_slot): Use RETURN_ADDR_REGNUM.
(movsi_insn): Accept moves to lp_count.
(rtie): Update pattern.
(simple_return): Simplify it, don't use this pattern as a return
from an interrupt.
(arc600_rtie): New pattern.
(p_return_i): Clean up.
(return): Likewise.
* config/arc/builtins.def (rtie): Only available for non ARC6xx
family CPUs.
* config/arc/predicates.md (move_src_operand): Consider lp_count
as a register.
gcc/testsuite
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/arc.exp (check_effective_target_accregs): New
predicate.
* gcc.target/arc/builtin_special.c: Update test/
* gcc.target/arc/interrupt-1.c: Likewise.
* gcc.target/arc/interrupt-10.c: New test.
* gcc.target/arc/interrupt-11.c: Likewise.
* gcc.target/arc/interrupt-12.c: Likewise.
update
From-SVN: r273761
This patch implements the addv, subv, and mulv patterns for signed
integers.
gcc/ChangeLog:
2019-07-24 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/predicates.md (addv_const_operand): New predicate.
* config/s390/s390-modes.def (CCO): New condition code mode.
* config/s390/s390.c (s390_match_ccmode_set): Handle E_CCOmode.
(s390_branch_condition_mask): Likewise.
* config/s390/s390.md ("addv<mode>4", "subv<mode>4")
("mulv<mode>4"): New expanders.
("*addv<mode>3_ccoverflow", "*addv<mode>3_ccoverflow_const")
("*subv<mode>3_ccoverflow", "*mulv<mode>3_ccoverflow"): New
pattern definitions.
gcc/testsuite/ChangeLog:
2019-07-24 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/addsub-signed-overflow-1.c: New test.
* gcc.target/s390/addsub-signed-overflow-2.c: New test.
* gcc.target/s390/mul-signed-overflow-1.c: New test.
* gcc.target/s390/mul-signed-overflow-2.c: New test.
From-SVN: r273759
