The linear_congruential_engine negative tests fail with a different
error in C++20 mode, because double is no longer an invalid type for
NTTP. Adjust the expected errors.
libstdc++-v3/ChangeLog:
* testsuite/26_numerics/random/linear_congruential_engine/requirements/non_uint_neg.cc:
Adjust expected error for C++20 mode.
* testsuite/tr1/5_numerical_facilities/random/linear_congruential/requirements/non_uint_neg.cc:
Likewise.
contrib/ChangeLog:
* gcc-changelog/git_commit.py: Support long filenames
in entries.
* gcc-changelog/test_email.py: Test it.
* gcc-changelog/test_patches.txt: Likewise.
The 17_intro/headers/c++1998/49745.cc test fails for C++20 mode with PCH
enabled, because PCH makes it include <bits/stdc++.h>, which includes
<atomic>, and that includes <unistd.h> in C++20 mode. The <unistd.h>
dependency should go away when C++20 atomic waiting is stable, but will
probably remain while the feature is experimental. Change the test to
always include <bits/stdc++.h>, and XFAIL for C++20 and later.
libstdc++-v3/ChangeLog:
PR libstdc++/99995
* testsuite/17_intro/headers/c++1998/49745.cc: Include all
standard headers and XFAIL for effective-target c++20.
Alder Lake Intel Hybrid Technology will not support Intel® AVX-512. ISA
features such as Intel® AVX, AVX-VNNI, Intel® AVX2, and UMONITOR/UMWAIT/TPAUSE
are supported.
gcc/ChangeLog
* config/i386/i386.h (PTA_ALDERLAKE): Change alderlake ISA list.
* config/i386/i386-options.c (m_CORE_AVX2): Add m_ALDERLAKE.
* common/config/i386/cpuinfo.h (get_intel_cpu): Add AlderLake model.
* doc/invoke.texi: Change alderlake ISA list.
We have seen an ICE both on trunk and devel/omp/gcc-10 branches which can
be reprodued with this simple testcase. It occurs if an OpenACC loop has
a collapse clause and any of the loop being collapsed uses GT or GE
condition. This issue is specific to OpenACC.
int main (void)
{
int ix, iy;
int dim_x = 16, dim_y = 16;
{
for (iy = dim_y - 1; iy > 0; --iy)
for (ix = dim_x - 1; ix > 0; --ix)
;
}
}
The problem is caused by a failing assertion in expand_oacc_collapse_init.
It checks that cond_code for fd->loop should be same as cond_code for all
the loops that are being collapsed. As the cond_code for fd->loop is
LT_EXPR with collapse clause (set at the end of omp_extract_for_data),
this assertion forces that all the loop in collapse clause should use
< operator.
There does not seem to be anything in the code which demands this
condition as loop with > condition works ok otherwise. I digged old
mailing list a bit but could not find any discussion on this change.
Looking at the code, expand_oacc_for checks that fd->loop->cond_code is
either LT_EXPR or GT_EXPR. I guess the original intention was to have
similar checks on the loop which are being collapsed. But the way check
was written does not acheive that.
I have fixed it by modifying the check in the assertion to be same as
check on fd->loop->cond_code.
I tested goacc and libgomp (with nvptx offloading) and did not see any
regression. I have added new tests to check collapse with GT/GE condition.
PR middle-end/98088
gcc/
* omp-expand.c (expand_oacc_collapse_init): Update condition in
a gcc_assert.
gcc/testsuite/
* c-c++-common/goacc/collapse-2.c: New.
libgomp/
* testsuite/libgomp.oacc-c-c++-common/collapse-2.c: Add check
for loop with GT/GE condition.
* testsuite/libgomp.oacc-c-c++-common/collapse-3.c: Likewise.
Here lookup got confused by finding a conversion operator from
lookup_anon_field. Let's avoid this by pruning functions from
CLASSTYPE_MEMBER_VEC as well as TYPE_FIELDS.
gcc/cp/ChangeLog:
PR c++/97974
* decl.c (fixup_anonymous_aggr): Prune all functions from
CLASSTYPE_MEMBER_VEC.
gcc/testsuite/ChangeLog:
PR c++/97974
* g++.dg/lookup/pr84962.C: Adjust diagnostic.
* g++.dg/other/anon-union5.C: New test.
Here instantiation of the fake 'this' parameter we used when parsing the
trailing return type of func() was failing because there is no actual 'this'
parameter in the instantiation. For PR97399 I told Patrick to do the 'this'
injection even for statics, but now I think I was wrong; the out-of-class
definition case I was concerned about does not break with this patch. And
we don't set current_class_ptr in the body of a static member function.
And the OMP code should continue to parse 'this' and complain about it
rather than give a syntax error.
gcc/cp/ChangeLog:
PR c++/98800
PR c++/97399
* parser.c (cp_parser_direct_declarator): Don't
inject_this_parameter if static_p.
(cp_parser_omp_var_list_no_open): Parse 'this' even if
current_class_ptr isn't set for a better diagnostic.
gcc/testsuite/ChangeLog:
PR c++/98800
* g++.dg/gomp/this-1.C: Adjust diagnostic.
* g++.dg/cpp0x/constexpr-this1.C: New test.
gcc/analyzer/ChangeLog:
PR analyzer/100011
* region-model.cc (region_model::on_assignment): Avoid NULL
dereference if ctxt is NULL when assigning from a STRING_CST.
gcc/testsuite/ChangeLog:
PR analyzer/100011
* gcc.dg/analyzer/pr100011.c: New test.
The following testcase ICEs during error recovery, because finish_decl
overwrites TREE_TYPE (error_mark_node), which better should stay always
to be error_mark_node.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR c/99990
* c-decl.c (finish_decl): Don't overwrite TREE_TYPE of
error_mark_node.
* gcc.dg/pr99990.c: New test.
D front-end changes:
- Fix ICE in forward referenced type members of structs.
- Fix ICE passing a member template mixin identifier as alias argument.
- Fix ICE when `__traits' prints error involving a Parameter.
- Fix bugs found in `__traits(allMembers)' returning wrong result.
- Detect and shortcut Alias and AliasSeq template patterns.
Reviewed-on: https://github.com/dlang/dmd/pull/12405https://github.com/dlang/dmd/pull/12411
gcc/d/ChangeLog:
* dmd/MERGE: Merge upstream dmd 0450061c8.
Tests for `-ffunction-sections -fdata-sections' and sets SECTION_FLAGS
accordingly. If there is no warning when using it, take advantage of
the smaller executables that can be had with `--gc-sections'.
libphobos/ChangeLog:
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.ac: Call DRUNTIME_SECTION_FLAGS.
* libdruntime/Makefile.am: Add SECTION_FLAGS to AM_DFLAGS.
* libdruntime/Makefile.in: Regenerate.
* m4/druntime.m4 (DRUNTIME_SECTION_FLAGS): New macro.
* src/Makefile.am: Add SECTION_FLAGS to AM_DFLAGS.
* src/Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.
This replaces the original and untested support for Windows and OSX, and
is the 90% of the work needed to support libphobos on those targets.
The core.thread interface has been updated to accomodate for the same
function might be implemented by any of the platform-dependent modules.
libphobos/ChangeLog:
* libdruntime/Makefile.am (DRUNTIME_DSOURCES): Removed
gcc/sections/android.d, elf_shared.d, osx.d, win32.d, and win64.d.
Added gcc/sections/common.d, elf.d macho.d, and pecoff.d.
* libdruntime/Makefile.in: Regenerate.
* libdruntime/core/thread/osthread.d: Update externDFunc FQDN names to
use platform independant section function names.
* libdruntime/gcc/sections/elf_shared.d: Renamed to...
* libdruntime/gcc/sections/elf.d: ...this. Mangle functions for
core.thread interface as if they come from the gcc.sections module.
* libdruntime/gcc/sections/package.d: Update public imports, declare
functions for core.thread interface.
* libdruntime/gcc/sections/android.d: Removed.
* libdruntime/gcc/sections/osx.d: Removed.
* libdruntime/gcc/sections/win32.d: Removed.
* libdruntime/gcc/sections/win64.d: Removed.
* libdruntime/gcc/sections/common.d: New file.
* libdruntime/gcc/sections/macho.d: New file.
* libdruntime/gcc/sections/pecoff.d: New file.
Linking to libphobos statically is the default in the driver, however
this may change in future. Be explicit that the static libphobos is
what's being tested.
libphobos/ChangeLog:
* testsuite/libphobos.druntime/druntime.exp: Compile all tests with
-static-libphobos.
* testsuite/libphobos.phobos/phobos.exp: Likewise.
This test isn't compiling with `-static', it's there to verify that the
libphobos is functional when linked in statically.
libphobos/ChangeLog:
* testsuite/libphobos.druntime/druntime.exp: Remove
is-effective-target static.
* testsuite/libphobos.phobos/phobos.exp: Likewise.
Define _serialize as macro for callers with general-regs-only target
attribute to avoid inline failure with always_inline attribute.
gcc/
PR target/99744
* config/i386/serializeintrin.h (_serialize): Defined as macro.
gcc/testsuite/
PR target/99744
* gcc.target/i386/pr99744-2.c: New test.
The gimplifier optimizes away COMPOUND_LITERAL_EXPRs, but they can remain
in the form of ADDR_EXPR of COMPOUND_LITERAL_EXPRs in static initializers.
By the TREE_STATIC check I meant to check that the underlying decl of
the compound literal is a global rather than automatic variable which
obviously can't be referenced in static initializers, but unfortunately
with LTO it might end up in another partition and thus be DECL_EXTERNAL
instead.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR lto/99849
* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.
* gcc.dg/lto/pr99849_0.c: New test.
This PR is about a -W*uninitialized warning on riscv64.
alloca_type_and_limit is documented to have limit member only defined
when type is ALLOCA_BOUND_MAYBE_LARGE or ALLOCA_BOUND_DEFINITELY_LARGE
and otherwise just default constructs limit, which for wide_int means
no initialization at all. IMHO it is fine not to use the limit
member otherwise, but trying to not initialize it when it can be e.g.
copied around and then invoke UB doesn't look like a good idea.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99989
* gimple-ssa-warn-alloca.c
(alloca_type_and_limit::alloca_type_and_limit): Initialize limit to
0 with integer precision unconditionally.
This is a sequel to the PR85022 changes, inline-asm can (unfortunately)
introduce VOIDmode MEMs and in PR85022 they have been changed so that
we don't pretend we know their size (as opposed to assuming they have
zero size).
This time we ICE in rtx_addr_can_trap_p_1 because it assumes that
all memory but BLKmode has known size. The patch just treats VOIDmode
MEMs like BLKmode in that regard. And, the STRICT_ALIGNMENT change
is needed because VOIDmode has GET_MODE_SIZE of 0 and we don't want to
check if something is a multiple of 0.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98601
* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT
unaligned_mems handle VOIDmode like BLKmode.
* gcc.dg/torture/pr98601.c: New test.
alias_ctad_tweaks was expecting that all deduction guides for the class
would be suitable for deduction from the alias definition; in this case, the
deduction guide uses 'true' and the alias B uses 'false', so deduction
fails. But that's OK, we just don't use that deduction guide. I also
noticed that we were giving up on deduction entirely if substitution failed
for some guide; we should only give up on that particular deduction guide.
We ought to give a better diagnostic about this case when deduction fails,
but that can wait.
gcc/cp/ChangeLog:
PR c++/99180
PR c++/93295
PR c++/93867
PR c++/99118
PR c++/96873
* pt.c (alias_ctad_tweaks): Handle failure better.
gcc/testsuite/ChangeLog:
PR c++/99180
PR c++/93295
PR c++/93867
PR c++/95486
* g++.dg/cpp2a/class-deduction-alias5.C: New test.
* g++.dg/cpp2a/class-deduction-alias6.C: New test.
* g++.dg/cpp2a/class-deduction-alias7.C: New test.
* g++.dg/cpp2a/class-deduction-alias8.C: New test.
Normally cp_parser_base_clause prevents unexpanded packs, but in a lambda
check_for_bare_parameter_packs allows it. Then we weren't finding the
pack when scanning the lambda body.
This doesn't fix a valid variant like
template <class... Ts> void sink (Ts&&...);
template <class... Ts>
void f() {
sink ([] { struct S : Ts { }; }...);
}
int main() {
f<int>();
}
but that's a much bigger project.
gcc/cp/ChangeLog:
PR c++/100006
* pt.c (find_parameter_packs_r) [TAG_DEFN]: Look into bases.
gcc/testsuite/ChangeLog:
PR c++/100006
* g++.dg/cpp0x/lambda/lambda-variadic13.C: New test.
A TEMPLATE_INFO is a natural fit for what LAMBDA_EXPR_REGENERATED_FROM
and LAMBDA_EXPR_REGENERATING_TARGS hold, so let's use it instead.
gcc/cp/ChangeLog:
* cp-tree.h (LAMBDA_EXPR_REGENERATED_FROM)
(LAMBDA_EXPR_REGENERATING_TARGS): Replace these with ...
(LAMBDA_EXPR_REGEN_INFO): ... this.
(tree_lambda_expr::regenerated_from)
(tree_lambda_expr::regenerating_targs): Replace these with ...
(tree_lambda_expr::regen_info): ... this.
* constraint.cc (satisfy_declaration_constraints): Adjust
accordingly.
* lambda.c (build_lambda_expr): Likewise.
* pt.c (regenerated_lambda_fn_p): Likewise.
(most_general_lambda): Likewise.
(tsubst_lambda_expr): Likewise.
__dp_sign precision indicates that we found out what iterator comes first or
last in the range. __dp_sign_max_size is the same plus it gives the information
of the max size of the range that is to say the max_size value such that
distance(lhs, rhs) < max_size.
Thanks to this additional information we are able to tell when a copy of n elements
to that range will fail even if we do not know exactly how large it is.
This patch makes sure that we are properly using this information.
libstdc++-v3/ChangeLog:
PR libstdc++/99402
* include/debug/helper_functions.h (__can_advance(_InputIterator,
const std::pair<_Diff, _Distance_precision>&, int)): New.
(__can_advance(const _Safe_iterator<>&,
const std::pair<_Diff, _Distance_precision>&, int)): New.
* include/debug/macros.h (__glibcxx_check_can_increment_dist): New,
use latter.
(__glibcxx_check_can_increment_range): Adapt to use latter.
(__glibcxx_check_can_decrement_range): Likewise.
* include/debug/safe_iterator.h
(_Safe_iterator<>::_M_can_advance(const std::pair<_Diff, _Distance_precision>&,
int)): New.
(__can_advance(const _Safe_iterator<>&,
const std::pair<_Diff, _Distance_precision>&, int)): New.
* include/debug/safe_iterator.tcc
(_Safe_iterator<>::_M_can_advance(const std::pair<_Diff, _Distance_precision>&,
int)): New.
(_Safe_iterator<>::_M_valid_range(const _Safe_iterator<>&,
std::pair<difference_type, _Distance_precision>&, bool)): Adapt for
__dp_sign_max_size.
(__copy_move_a): Adapt to use __glibcxx_check_can_increment_dist.
(__copy_move_backward_a): Likewise.
(__equal_aux): Likewise.
* include/debug/stl_iterator.h (__can_advance(const std::reverse_iterator<>&,
const std::pair<_Diff, _Distance_precision>&, int)): New.
(__can_advance(const std::move_iterator<>&,
const std::pair<_Diff, _Distance_precision>&, int)): New.
* testsuite/25_algorithms/copy/debug/99402.cc: New test.
If a toolchain is configured with --with-cpu=X and gcc is
then run with an explicit -march=Y option, we ignore the
X cpu setting and tune for generic Y code:
if (!selected_cpu)
{
if (selected_arch)
{
------> selected_cpu = &all_cores[selected_arch->ident];
aarch64_isa_flags = arch_isa;
explicit_arch = selected_arch->arch;
}
else
{
/* Get default configure-time CPU. */
selected_cpu = aarch64_get_tune_cpu (aarch64_none);
aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6;
}
if (selected_tune)
explicit_tune_core = selected_tune->ident;
}
…
if (!selected_tune)
selected_tune = selected_cpu;
But after a push/pop_options pair, we simply did:
selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
In the above scenario, ptr->x_explicit_tune_core is aarch64_none,
so we fall back on the default configure-time CPU. This means
that before the push_options we tuned for generic Y but after
the pop_options we tuned for X.
This was picked up by an assertion failure in cl_optimization_compare.
The ICE itself is a GCC 11 regression, but the problem that it shows
up is much older.
gcc/
* config/aarch64/aarch64.c (aarch64_option_restore): If the
architecture was specified explicitly and the tuning wasn't,
tune for the architecture rather than the configured default CPU.
When we have a member function with auto parameter like this:
struct S {
void f(auto);
};
cp_parser_member_declaration -> grokfield produces a FUNCTION_DECL
"void S::foo(auto:1)", and then finish_fully_implicit_template turns
that FUNCTION_DECL into a TEMPLATE_DECL. The bug here is that we only
call cp_parser_save_default_args for a FUNCTION_DECL. As a consequence,
abbrev10.C is rejected because we complain that the default argument has
not been defined, and abbrev11.C ICEs, because we don't re-parse the
delayed noexcept, so the DEFERRED_PARSE tree leaks into tsubst* where we
crash. This patch fixes both issues.
gcc/cp/ChangeLog:
PR c++/99806
* parser.c (cp_parser_member_declaration): Call
cp_parser_save_default_args even for function templates. Use
STRIP_TEMPLATE on the declaration we're passing.
gcc/testsuite/ChangeLog:
PR c++/99806
* g++.dg/concepts/abbrev10.C: New test.
* g++.dg/concepts/abbrev11.C: New test.
Not all hosts can link static executables. It depends on which
development libraries are installed.
gcc/testsuite/
* gcc.target/aarch64/pr70398.c: Require a target that can link
static executables.
These tests are passing on all my runs, and it looks like
they are for Christophe's runs too. We can reapply with a
tighter target selector if this is still a problem for some
configurations.
gcc/testsuite/
* g++.target/aarch64/bfloat_cpp_typecheck.C: Remove XFAILs.
With SVE we can vectorise an additional loop. (Well, more really,
since the count doesn't include epilogue loops for SVE.)
gcc/testsuite/
* gfortran.dg/vect/vect-8.f90: Expect 24 loops to be vectorized
with SVE.
This patch adds XFAILs for some tests that fail with variable-length
vectors.
For pr96573.c I'd wondered about instead extending the regexp.
The code we generate isn't very good though, so it doesn't seem
worth matching. (Fixing the bad code is on the todo list.)
gcc/testsuite/
* g++.dg/tree-ssa/pr83518.C: XFAIL for vect_variable_length.
* gcc.dg/pr96573.c: Likewise.
* gcc.dg/tree-ssa/pr84512.c: Likewise.
* gcc.dg/vect/bb-slp-43.c: Likewise.
* gcc.dg/vect/slp-reduc-11.c: Likewise.
This test was failing on aarch64 targets because we inlined the
test function into main, making it vectorisable.
gcc/testsuite/
* gcc.dg/vect/pr65947-7.c: Add a noipa attribute. Expect the
loop to vectorized if vect_fold_extract_last.
mem-shift-canonical.c started failing after the fix for PR97684.
We used to generate things like:
add x7, x1, x5, lsl 2 // 54 [c=4 l=4] *add_lsl_di
ld1 {v0.s}[1], [x7] // 18 [c=4 l=4] aarch64_simd_vec_setv4si/2
where the add_lsl_di was generated by LRA. After PR97684 we generate:
ldr s1, [x1, x5, lsl 2] // 17 [c=4 l=4] *zero_extendsidi2_aarch64/3
ins v0.s[1], v1.s[0] // 18 [c=4 l=4] aarch64_simd_vec_setv4si/0
Which one is better is an interesting question. However, it was really
only a fluke that we generated the original code. The pseudo that
becomes s1 in the new code above has a REG_EQUIV note:
(insn 17 16 18 3 (set (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ])
(mem:SI (plus:DI (mult:DI (reg:DI 101 [ ivtmp.9 ])
(const_int 4 [0x4]))
(reg/v/f:DI 105 [ b ])) [2 MEM[(int *)b_25(D) + ivtmp.9_30 * 4]+0 S4 A32])) "gcc/testsuite/gcc.target/aarch64/mem-shift-canonical.c":21:18 52 {*movsi_aarch64}
(expr_list:REG_EQUIV (mem:SI (plus:DI (mult:DI (reg:DI 101 [ ivtmp.9 ])
(const_int 4 [0x4]))
(reg/v/f:DI 105 [ b ])) [2 MEM[(int *)b_25(D) + ivtmp.9_30 * 4]+0 S4 A32])
(nil)))
(insn 18 17 19 3 (set (reg:V4SI 109 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ])
(vec_merge:V4SI (vec_duplicate:V4SI (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ]))
(subreg:V4SI (reg:SI 110 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ]) 0)
(const_int 2 [0x2]))) "gcc/testsuite/gcc.target/aarch64/mem-shift-canonical.c":21:18 1683 {aarch64_simd_vec_setv4si}
(expr_list:REG_DEAD (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ])
(expr_list:REG_DEAD (reg:SI 110 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ])
(nil))))
Before the PR, IRA didn't allocate a register to r111 and so LRA
rematerialised the REG_EQUIV note inside insn 18, leading to the
reload. Now IRA allocates a register instead.
So I think this is working as expected, in the sense that IRA is now
doing what the backend asked it to do. If the backend prefers the first
version (and it might not), it needs to do more than it's currently
doing to promote the use of lane loads. E.g. it should probably have a
combine define_split that splits the combination of insn 17 and insn 18
into an ADD + an LD1.
I think for now the best thing is to use a different approach to
triggering the original bug. The asm in the new test ICEs with the
r11-2903 LRA patch reverted and passes with it applied.
gcc/testsuite/
* gcc.target/aarch64/mem-shift-canonical.c: Use an asm instead
of relying on vectorisation.
This patch XFAILs the remaining regressions in PR87763. We should
still fix them at some point, but that's not GCC 11 material.
gcc/testsuite/
PR target/87763
* gcc.target/aarch64/insv_1.c: XFAIL two scan tests.
For the reasons discussed in PR78314, ieee_support_halting
doesn't work correctly for arm* and aarch64*. I think the
easiest thing is to skip these tests until the PR is fixed.
This doesn't mean that the PR is unimportant. It just doesn't
seem useful to have the unpredictable failures described in the
PR trail given that the problem is known and has been analysed.
gcc/testsuite/
PR libfortran/78314
* gfortran.dg/ieee/ieee_6.f90: Skip for arm* and aarch64*.
* gfortran.dg/ieee/ieee_8.f90: Likewise.
gcc.dg/torture/tls/tls-reload-1.c started ICEing for SVE some time
during the GCC 11 cycle (not sure when). The problem is that we
had an output reload on a call_insn, which isn't a supported
combination.
This patch uses LR_REGNUM instead. The resulting "blr x30"
might not perform as well on some CPUs, but in this context
the difference shouldn't be noticeable.
gcc/
* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use X30
as the temporary register.
I keep forgetting that a constexpr function in C++11 has to be a single
return statement.
libstdc++-v3/ChangeLog:
PR libstdc++/99985
* include/bits/hashtable.h (_Hashtable::_S_nothrow_move()): Fix
to be a valid constexpr function in C++11.
* testsuite/23_containers/unordered_set/cons/99985.cc: New test.
Jonathan Wakely
Martin Liska
Cui,Lili
GCC Administrator
Hafiz Abid Qadeer
Gerald Pfeifer
Jason Merrill
David Malcolm
Jakub Jelinek
Iain Buclaw
H.J. Lu
Jan Hubicka
Patrick Palka
François Dumont
Martin Sebor
Richard Sandiford
Thomas Schwinge
Marek Polacek