Commit Graph

146503 Commits

Author SHA1 Message Date
Bernd Edlinger 93671519e2 re PR c/24414 (Old-style asms don't clobber memory)
gcc/
2016-06-06  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR c/24414
        * cfgexpand.c (expand_asm_loc): Remove handling for ADDR_EXPR.
        Implicitly clobber memory for basic asm with non-empty assembler
        string.  Use targetm.md_asm_adjust also here.
        * compare-elim.c (arithmetic_flags_clobber_p): Use asm_noperands here.
        * final.c (final_scan_insn): Handle basic asm in PARALLEL block.
        * gimple.c (gimple_asm_clobbers_memory_p): Handle basic asm with
        non-empty assembler string.
        * ira.c (compute_regs_asm_clobbered): Use asm_noperands here.
        * recog.c (asm_noperands): Handle basic asm in PARALLEL block.
        (decode_asm_operands): Handle basic asm in PARALLEL block.
        (extract_insn): Handle basic asm in PARALLEL block.
        * doc/extend.texi: Mention new behavior of basic asm.
        * config/ia64/ia64 (rtx_needs_barrier): Handle ASM_INPUT here.
        * config/pa/pa.c (branch_to_delay_slot_p, branch_needs_nop_p,
        branch_needs_nop_p): Use asm_noperands.

gcc/testsuite/
2016-06-06  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR c/24414
        * gcc.target/i386/pr24414.c: New test.

From-SVN: r237133
2016-06-06 12:31:59 +00:00
Jose E. Marchesi 690f24b775 sparc: support for the SPARC M7 and VIS 4.0
gcc/ChangeLog:
    
2016-06-06  Jose E. Marchesi  <jose.marchesi@oracle.com>
    
    	* config/sparc/sparc.md (cpu): Add niagara7 cpu type.
    	Include the M7 SPARC DFA scheduler.
    	New attribute v3pipe.
    	Annotate insns with v3pipe where appropriate.
    	Define cpu_feature vis4.
    	Add lzd instruction type and set it on clzdi_sp64 and clzsi_sp64.
    	Add (V8QI "8") to vbits.
    	Add insns {add,sub}v8qi3
    	Add insns ss{add,sub}v8qi3
    	Add insns us{add,sub}{v8qi,v4hi}3
    	Add insns {min,max}{v8qi,v4hi,v2si}3
    	Add insns {minu,maxu}{v8qi,v4hi,v2si}3
    	Add insns fpcmp{le,gt,ule,ug,ule,ugt}{8,16,32}_vis.
    	* config/sparc/niagara4.md: Add a comment explaining the
    	discrepancy between the documented latenty numbers and the
    	implemented ones.
    	* config/sparc/niagara7.md: New file.
    	* configure.ac (HAVE_AS_SPARC5_VIS4): Define if the assembler
    	supports SPARC5 and VIS 4.0 instructions.
    	* configure: Regenerate.
    	* config.in: Likewise.
    	* config.gcc: niagara7 is a supported cpu in sparc*-*-* targets.
    	* config/sparc/sol2.h (ASM_CPU32_DEFAUILT_SPEC): Set for
    	TARGET_CPU_niagara7.
    	(ASM_CPU64_DEFAULT_SPEC): Likewise.
    	(CPP_CPU_SPEC): Handle niagara7.
    	(ASM_CPU_SPEC): Likewise.
    	* config/sparc/sparc-opts.h (processor_type): Add
    	PROCESSOR_NIAGARA7.
    	(mvis4): New option.
    	* config/sparc/sparc.h (TARGET_CPU_niagara7): Define.
    	(AS_NIAGARA7_FLAG): Define.
    	(ASM_CPU64_DEFAULT_SPEC): Set for niagara7.
    	(CPP_CPU64_DEFAULT_SPEC): Likewise.
    	(CPP_CPU_SPEC): Handle niagara7.
    	(ASM_CPU_SPEC): Likewise.
    	* config/sparc/sparc.c (niagara7_costs): Define.
    	(sparc_option_override): Handle niagara7 and adjust cache-related
    	parameters with better values for niagara cpus.  Also support VIS4.
    	(sparc32_initialize_trampoline): Likewise.
    	(sparc_use_sched_lookahead): Likewise.
    	(sparc_issue_rate): Likewise.
    	(sparc_register_move_cost): Likewise.
    	(dump_target_flag_bits): Support VIS4.
    	(sparc_vis_init_builtins): Likewise.
    	(sparc_builtins): Likewise.
    	* config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ for
    	VIS4 4.0.
    	* config/sparc/driver-sparc.c (cpu_names): Add SPARC-M7 and
    	UltraSparc M7.
    	* config/sparc/sparc.opt (sparc_processor_type): New value
    	niagara7.
    	* config/sparc/visintrin.h (__attribute__): Prototypes for the
    	VIS4 builtins.
    	* doc/invoke.texi (SPARC Options): Document -mcpu=niagara7 and
    	-mvis4.
    	* doc/extend.texi (SPARC VIS Built-in Functions): Document the
    	VIS4 builtins.
    
gcc/testsuite/ChangeLog:
    
2016-06-06  Jose E. Marchesi  <jose.marchesi@oracle.com>
    
    	* gcc.target/sparc/vis4misc.c: New file.
    	* gcc.target/sparc/fpcmp.c: Likewise.
    	* gcc.target/sparc/fpcmpu.c: Likewise.

From-SVN: r237132
2016-06-06 13:40:02 +02:00
Jonathan Wakely 8964d5aaaf * doc/sourcebuild.texi (Directives): Remove extra closing braces.
From-SVN: r237131
2016-06-06 11:14:43 +01:00
Eric Botcazou 42a5e4106a decl.c (Gigi_Equivalent_Type): Make sure equivalent types are present before returning them.
* gcc-interface/decl.c (Gigi_Equivalent_Type): Make sure equivalent
	types are present before returning them.  Remove final assertion.
	(gnat_to_gnu_entity) <E_Access_Protected_Subprogram_Type>: Adjust to
	above change.
	<E_Protected_Type>: Likewise.

From-SVN: r237130
2016-06-06 10:03:14 +00:00
Eric Botcazou f8a9b81f10 trans.c (elaborate_all_entities_for_package): Also do not elaborate Itypes.
* gcc-interface/trans.c (elaborate_all_entities_for_package): Also do
	not elaborate Itypes.

From-SVN: r237129
2016-06-06 09:55:44 +00:00
Eric Botcazou 1f0b1322e0 utils.c (gnat_internal_attribute_table): Add support for noinline and noclone attributes.
* gcc-interface/utils.c (gnat_internal_attribute_table): Add support
	for noinline and noclone attributes.
	(handle_noinline_attribute): New handler.
	(handle_noclone_attribute): Likewise.

From-SVN: r237127
2016-06-06 09:51:33 +00:00
Eric Botcazou 5a4916beb8 * gcc-interface/trans.c (process_type): Beef up comment.
From-SVN: r237126
2016-06-06 09:47:17 +00:00
Eric Botcazou 62801a777a utils2.c (build_call_alloc_dealloc): Do not substitute placeholder expressions here but...
* gcc-interface/utils2.c (build_call_alloc_dealloc): Do not substitute
	placeholder expressions here but...
	* gcc-interface/trans.c (gnat_to_gnu) <N_Free_Statement>: ...here.
	Make an exception to the protection of a CALL_EXPR result with an
	unconstrained type only in the same cases as Call_to_gnu.

From-SVN: r237125
2016-06-06 09:44:11 +00:00
Eric Botcazou f1ff07ec09 trans.c (gnat_to_gnu): Rework special code dealing with boolean rvalues and set the location directly.
* gcc-interface/trans.c (gnat_to_gnu): Rework special code dealing
	with boolean rvalues and set the location directly.  Do not set the
	location in the other cases for a simple name.
	(gnat_to_gnu_external): Clear the location on the expression.

From-SVN: r237123
2016-06-06 09:31:13 +00:00
Eric Botcazou d5ebeb8c1b decl.c (gnat_to_gnu_entity): Remove useless 'else' statements and tidy up.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Component>: Remove
	useless 'else' statements and tidy up.
	<E_Array_Subtype>: Fully deal with the declaration here.
	<E_Incomplete_Type>: Use properly-typed constant.
	Assert that we don't apply the special type treatment to dummy types.
	Separate this treatment from the final back-annotation and simplify
	the condition for the RM size.
	(gnat_to_gnu_param): Add GNU_PARAM_TYPE parameter and adjust.
	(gnat_to_gnu_subprog_type): Ajust call to gnat_to_gnu_param.
	* gcc-interface/trans.c (gnat_to_gnu) <N_Subprogram_Declaration>: Add
	comment.
	(process_freeze_entity): Remove obsolete code.
	(process_type): Minor tweaks.

From-SVN: r237122
2016-06-06 09:26:07 +00:00
Eric Botcazou 4d9446f9c0 einfo.ads (Returns_Limited_View): Remove.
* einfo.ads (Returns_Limited_View): Remove.
	(Set_Returns_Limited_View ): Likewise.
	* einfo.adb (Returns_Limited_View): Likewise.
	(Set_Returns_Limited_View ): Likewise.
	* freeze.adb (Late_Freeze_Subprogram): Remove.
	(Freeze_Entity): Do not defer the freezing of functions returning an
	incomplete type coming from a limited context.

From-SVN: r237121
2016-06-06 09:18:41 +00:00
Alan Hayward 31ce615743 vect-live-1.c: Use additional-options.
2016-06-06  Alan Hayward  <alan.hayward@arm.com>

testsuite/
	* gcc.dg/vect/vect-live-1.c: Use additional-options.
	* gcc.dg/vect/vect-live-3.c: Likewise.

From-SVN: r237120
2016-06-06 09:15:23 +00:00
Eric Botcazou 7414a3c340 gigi.h (finish_subprog_decl): Add ASM_NAME parameter.
* gcc-interface/gigi.h (finish_subprog_decl): Add ASM_NAME parameter.
	* gcc-interface/decl.c (gnu_ext_name_for_subprog): New function.
	(gnat_to_gnu_entity) <E_Subprogram_Type>: Do not check compatibility
	of profiles for builtins here...  Call gnu_ext_name_for_subprog.
	Also update profiles if pointers to limited_with'ed types are
	updated.
	(gnat_to_gnu_param): Restore the correct source location information
	for vector ABI warnings.
	(associate_subprog_with_dummy_type): Add comment about AI05-019.
	Set TYPE_DUMMY_IN_PROFILE_P flag unconditionally.
	(update_profile): Deal with builtin declarations.
	Call gnu_ext_name_for_subprog.  Adjust call to finish_subprog_decl.
	(update_profiles_with): Add comment.
	(gnat_to_gnu_subprog_type): Reuse the return type if it is complete.
	Likewise for parameter declarations in most cases.  Do not change
	the return type for the CICO mechanism if the profile is incomplete.
	...but here instead.  Always reset the slot for the parameters.
	* gcc-interface/utils.c (create_subprog_decl): Call
	gnu_ext_name_for_subprog.  Do not set the assembler name here but...
	(finish_subprog_decl): ...but here instead.  Add ASM_NAME parameter.

From-SVN: r237119
2016-06-06 09:08:56 +00:00
Eric Botcazou 128a98eace exp_ch9.adb (Expand_N_Protected_Type_Declaration): Insert the declaration of the corresponding record type before that of the...
* exp_ch9.adb (Expand_N_Protected_Type_Declaration): Insert the
	declaration of the corresponding record type before that of the
	unprotected version of the subprograms that operate on it.
	(Expand_Access_Protected_Subprogram_Type): Declare the Equivalent_Type
	just before the original type.
	* sem_ch3.adb (Handle_Late_Controlled_Primitive): Point the current
	declaration to the newly created declaration for the primitive.
	(Analyze_Subtype_Declaration): Remove obsolete code forcing the
	freezing of the subtype before its declaration.
	(Replace_Anonymous_Access_To_Protected_Subprogram): Insert the new
	declaration in the nearest enclosing scope for formal parameters too.
	(Build_Derived_Access_Type): Restore the status of the created Itype
	after it is erased by Copy_Node.
	* sem_ch6.adb (Exchange_Limited_Views): Remove guard on entry.
	(Analyze_Subprogram_Body_Helper): Call Exchange_Limited_Views only if
	the specification is present.
	Move around the code changing the designated view of the return type
	and save the original view.  Restore it on exit.
	* sem_ch13.adb (Build_Predicate_Function_Declaration): Always insert
	the declaration right after that of the type.

From-SVN: r237118
2016-06-06 08:46:33 +00:00
Richard Biener 9fcebb5aa8 re PR tree-optimization/71398 (ICE at -O3 in 32-bit and 64-bit mode on x86_64-linux-gnu (Segmentation fault, find_edge))
2016-06-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/71398
	* tree-ssa-loop-ivcanon.c (unloop_loops): First unloop, then
	remove edges.

	* gcc.dg/torture/pr71398.c: New testcase.

From-SVN: r237117
2016-06-06 06:55:19 +00:00
James Bowman d48ab0103a ft32.c (ft32_setup_incoming_varargs, [...]): Handle pretend_args.
[gcc]
   * config/ft32/ft32.c (ft32_setup_incoming_varargs,
   ft32_expand_prolog, ft32_expand_epilogue):
   Handle pretend_args.
   * config/ft32/ft32.h: Remove OUTGOING_REG_PARM_STACK_SPACE.
   * config/ft32/ft32.md: Add pretend_returner.

From-SVN: r237116
2016-06-06 02:31:42 +00:00
GCC Administrator 24673d5598 Daily bump.
From-SVN: r237115
2016-06-06 00:16:25 +00:00
Uros Bizjak 903ca97bc4 re PR target/71389 (ICE on trunk gcc on ivybridge target (df_refs_verify))
PR target/71389
	* config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
	Copy op1 RTX to avoid invalid sharing.
	(ix86_expand_vector_move_misalign): Ditto.

testsuite/ChangeLog:

	PR target/71389
	* g++.dg/pr71389.C: New test.

From-SVN: r237111
2016-06-06 00:55:35 +02:00
John David Anglin 603e5a828b expr.c (move_by_pieces_d::generate): Mark mode parameter with ATTRIBUTE_UNUSED.
* expr.c (move_by_pieces_d::generate): Mark mode parameter with
	ATTRIBUTE_UNUSED.

From-SVN: r237110
2016-06-05 20:42:40 +00:00
Jerry DeLisle 9c1eb332b0 re PR fortran/71404 (416.gamess in SPEC CPU 2006 failed to build)
2016-06-05  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/71404
	* gfortran.dg/fmt_read_5.f: New test.

From-SVN: r237109
2016-06-05 19:58:38 +00:00
Jerry DeLisle bc72093756 re PR fortran/71404 (416.gamess in SPEC CPU 2006 failed to build)
2016-06-05  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/71404
	* io.c (match_io): For READ, commit in pending symbols in the
	current statement before trying to match an expression so that
	if the match fails and we undo symbols we dont toss good symbols.

From-SVN: r237108
2016-06-05 19:49:59 +00:00
Ville Voutilainen 7a66745357 Protect allocator-overloads of tuple-from-tuple constructors from cases that would create dangling references.
Protect allocator-overloads of tuple-from-tuple constructors
	from cases that would create dangling references.
	* include/std/tuple (tuple(allocator_arg_t, const _Alloc&,
 	const tuple<_UElements...>&), tuple(allocator_arg_t, const _Alloc&,
 	tuple<_UElements...>&&)): Add a check for _NonNestedTuple.
	* testsuite/20_util/tuple/cons/nested_tuple_construct.cc: Adjust.

From-SVN: r237106
2016-06-05 20:39:10 +03:00
Andre Vehreschild b2d83bd2c7 re PR fortran/69659 (ICE on using option -frepack-arrays, in gfc_conv_descriptor_data_get)
gcc/testsuite/ChangeLog:

2016-06-05  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/69659
	* gfortran.dg/class_array_22.f03: New test.


gcc/fortran/ChangeLog:

2016-06-05  Andre Vehreschild  <vehre@gcc.gnu.org>

	PR fortran/69659
	* trans-array.c (gfc_trans_dummy_array_bias): For class arrays use
	the address of the _data component to reference the arrays data
	component.

From-SVN: r237105
2016-06-05 19:20:54 +02:00
Jan Hubicka ec81960e85 * gcc.dg/tree-prof/peel-1.c: Fix testcase.
From-SVN: r237104
2016-06-05 16:46:38 +00:00
Jan Hubicka 429d2750bf predict.c (predicted_by_loop_heuristics_p): New function.
* predict.c (predicted_by_loop_heuristics_p): New function.
	(predict_iv_comparison): Use it.
	(predict_loops): Walk from innermost loops; do not predict edges
	leaving multiple loops multiple times; implement
	PRED_LOOP_ITERATIONS_MAX heuristics.
	* predict.def (PRED_LOOP_ITERATIONS_MAX): New predictor.
	* gcc.dg/predict-9.c: Update template.

From-SVN: r237103
2016-06-05 16:43:19 +00:00
Jan Hubicka 46f1f3c1c2 cfg.c (check_bb_profile): Do not report mismatched profiles when only edges out of BB are EH edges.
* cfg.c (check_bb_profile): Do not report mismatched profiles when
	only edges out of BB are EH edges.

From-SVN: r237102
2016-06-05 16:38:12 +00:00
Paolo Carlini c1c009833d re PR c++/49377 (Template specialization attributes cause type mismatches when used)
2016-06-05  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/49377
	* g++.dg/template/pr49377.C: New.

From-SVN: r237098
2016-06-05 15:08:22 +00:00
GCC Administrator 16e396885a Daily bump.
From-SVN: r237097
2016-06-05 00:16:18 +00:00
Martin Sebor 58bfcc6615 PR c/48116 - -Wreturn-type does not work as advertised
gcc/ChangeLog:
2016-06-04  Martin Sebor  <msebor@redhat.com>
	    Marcin Baczyński <marbacz@gmail.com>

	PR c/48116
	* doc/invoke.texi (-Wreturn-type): Mention not warning on return with
	a void expression in a void function.

Co-Authored-By: Marcin Baczyński <marbacz@gmail.com>

From-SVN: r237093
2016-06-04 14:50:50 -06:00
Jan Hubicka 174d7275db tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Do not check aux; dump reasons of decisions.
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Do not check
	aux; dump reasons of decisions.
	(should_duplicate_loop_header_p): Likewise.
	(do_while_loop_p): Likewise.
	(ch_base::copy_headers): Dump asi num insns duplicated.

From-SVN: r237092
2016-06-04 20:19:46 +00:00
Jakub Jelinek 1927a96372 re PR tree-optimization/71405 (ICE on valid C++ code at -Os and above on x86_64-linux-gnu: verify_gimple failed)
PR tree-optimization/71405
	* tree-ssa.c (execute_update_addresses_taken): For clobber with
	incompatible type, build a new clobber with the right type instead
	of building a VIEW_CONVERT_EXPR around it.

	* g++.dg/torture/pr71405.C: New test.

From-SVN: r237091
2016-06-04 16:50:57 +02:00
Oleg Endo 5681284549 re PR tree-optimization/52171 (memcmp/strcmp/strncmp can be optimized when the result is tested for [in]equality with 0)
gcc/ChangeLog
	PR tree-optimization/52171
	* config/sh/sh.c (sh_use_by_pieces_infrastructure_p): Use
	by_pieces_ninsns instead of move_by_pieces_ninsns.

From-SVN: r237090
2016-06-04 11:00:58 +00:00
Paolo Carlini 909a11ad43 re PR c++/70202 (ICE on invalid code on x86_64-linux-gnu in build_simple_base_path, at cp/class.c:579)
/cp
2016-06-04  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/70202
	* parser.c (cp_parser_class_head): When xref_basetypes fails and
	emits an error do not zero the type.

/testsuite
2016-06-04  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/70202
	* g++.dg/inherit/crash5.C: New.
	* g++.dg/inherit/virtual1.C: Adjust.

From-SVN: r237089
2016-06-04 07:10:58 +00:00
Oleg Endo c389d3496a Avoid potential slient wrong-code with reg+reg addr. modes on SH.
gcc/
	* config/sh/sh.c (sh_print_operand_address): Don't use hardcoded 'r0'
	for reg+reg addressing mode.

From-SVN: r237088
2016-06-04 06:08:33 +00:00
GCC Administrator 4624e9cd75 Daily bump.
From-SVN: r237087
2016-06-04 00:16:18 +00:00
Jeff Law 08bbb1f8bd re PR tree-optimization/71316 (test case gcc.dg/tree-ssa/ssa-dom-thread-4.c fails starting with r236831)
PR tree-optimization/71316
	* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Update expected output.

From-SVN: r237083
2016-06-03 17:12:39 -06:00
Jakub Jelinek 7c35235c32 vect-live-1.c: Remove dg-options.
* gcc.dg/vect/vect-live-1.c: Remove dg-options.  Add
	dg-additional-options with just -fno-tree-scev-cprop in it.
	* gcc.dg/vect/vect-live-2.c: Likewise.
	* gcc.dg/vect/vect-live-5.c: Likewise.
	* gcc.dg/vect/vect-live-slp-1.c: Likewise.
	* gcc.dg/vect/vect-live-slp-2.c: Likewise.
	* gcc.dg/vect/vect-live-slp-3.c: Likewise.

From-SVN: r237082
2016-06-03 23:25:10 +02:00
Joseph Myers 892e5f4ea0 * sr.po: Update.
From-SVN: r237079
2016-06-03 22:07:36 +01:00
Patrick Palka c8572dd688 re PR c++/27100 (ICE with multiple friend declarations)
Fix PR c++/27100

gcc/cp/ChangeLog:

	PR c++/27100
	* decl.c (duplicate_decls): Properly copy the
	DECL_PENDING_INLINE_P, DECL_PENDING_INLINE_INFO and
	DECL_SAVED_FUNCTION_DATA fields from OLDDECL to NEWDECL.

gcc/testsuite/ChangeLog:

	PR c++/27100
	* g++.dg/other/friend6.C: New test.

From-SVN: r237078
2016-06-03 20:42:08 +00:00
Bill Schmidt 1c7733a760 rs6000-c.c (c/c-tree.h): Add #include.
[gcc]

2016-06-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* rs6000-c.c (c/c-tree.h): Add #include.
	(altivec_resolve_overloaded_builtin): Handle ARRAY_TYPE arguments
	in C++ when found in the base position of vec_ld or vec_st.

[gcc/testsuite]

2016-06-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* g++.dg/torture/ppc-ldst-array.C: New.

From-SVN: r237077
2016-06-03 18:40:26 +00:00
Jan Hubicka 641762ae26 tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Avoid use of profile unless profile status is PROFILE_READ.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Avoid
	use of profile unless profile status is PROFILE_READ.
	* profile.c (compute_branch_probabilities): Set profile status
	only after reporting predictor hitrates.

From-SVN: r237076
2016-06-03 17:00:19 +00:00
Joseph Myers 0d2f700f7b Add option for whether ceil etc. can raise "inexact", adjust x86 conditions.
In ISO C99/C11, the ceil, floor, round and trunc functions may or may
not raise the "inexact" exception for noninteger arguments.  Under TS
18661-1:2014, the C bindings for IEEE 754-2008, these functions are
prohibited from raising "inexact", in line with the general rule that
"inexact" is only when the mathematical infinite precision result of a
function differs from the result after rounding to the target type.

GCC has no option to select TS 18661 requirements for not raising
"inexact" when expanding built-in versions of these functions inline.
Furthermore, even given such requirements, the conditions on the x86
insn patterns for these functions are unnecessarily restrictive.  I'd
like to make the out-of-line glibc versions follow the TS 18661
requirements; in the cases where this slows them down (the cases using
x87 floating point), that makes it more important for inline versions
to be used when the user does not care about "inexact".

This patch fixes these issues.  A new option
-fno-fp-int-builtin-inexact is added to request TS 18661 rules for
these functions; the default -ffp-int-builtin-inexact reflects that
such exceptions are allowed by C99 and C11.  (The intention is that if
C2x incorporates TS 18661-1, then the default would change in C2x
mode.)

The x86 built-ins for rint (x87, SSE2 and SSE4.1) are made
unconditionally available (no longer depending on
-funsafe-math-optimizations or -fno-trapping-math); "inexact" is
correct for noninteger arguments to rint.  For floor, ceil and trunc,
the x87 and SSE2 built-ins are OK if -ffp-int-builtin-inexact or
-fno-trapping-math (they may raise "inexact" for noninteger
arguments); the SSE4.1 built-ins are made to use ROUND_NO_EXC so that
they do not raise "inexact" and so are OK unconditionally.

Now, while there was no semantic reason for depending on
-funsafe-math-optimizations, the insn patterns had such a dependence
because of use of gen_truncxf<mode>2_i387_noop to truncate back to
SFmode or DFmode after using frndint in XFmode.  In this case a no-op
truncation is safe because rounding to integer always produces an
exactly representable value (the same reason why IEEE semantics say it
shouldn't produce "inexact") - but of course that insn pattern isn't
safe because it would also match cases where the truncation is not in
fact a no-op.  To allow frndint to be used for SFmode and DFmode
without that unsafe pattern, the relevant frndint patterns are
extended to SFmode and DFmode or new SFmode and DFmode patterns added,
so that the frndint operation can be represented in RTL as an
operation acting directly on SFmode or DFmode without the extension
and the problematic truncation.

A generic test of the new option is added, as well as x86-specific
tests, both execution tests including the generic test with different
x86 options and scan-assembler tests verifying that functions that
should be inlined with different options are indeed inlined.

I think other architectures are OK for TS 18661-1 semantics already.
Considering those defining "ceil" patterns: aarch64, arm, rs6000, s390
use instructions that do not raise "inexact"; nvptx does not support
floating-point exceptions.  (This does mean the -f option in fact only
affects one architecture, but I think it should still be a -f option;
it's logically architecture-independent and is expected to be affected
by future -std options, so is similar to e.g. -fexcess-precision=,
which also does nothing on most architectures but is implied by -std
options.)

Bootstrapped with no regressions on x86_64-pc-linux-gnu.  OK to
commit?

	PR target/71276
	PR target/71277
gcc:
	* common.opt (ffp-int-builtin-inexact): New option.
	* doc/invoke.texi (-fno-fp-int-builtin-inexact): Document.
	* doc/md.texi (floor@var{m}2, btrunc@var{m}2, round@var{m}2)
	(ceil@var{m}2): Document dependence on this option.
	* ipa-inline-transform.c (inline_call): Handle
	flag_fp_int_builtin_inexact.
	* ipa-inline.c (can_inline_edge_p): Likewise.
	* config/i386/i386.md (rintxf2): Do not test
	flag_unsafe_math_optimizations.
	(rint<mode>2_frndint): New define_insn.
	(rint<mode>2): Do not test flag_unsafe_math_optimizations for 387
	or !flag_trapping_math for SSE.  Just use gen_rint<mode>2_frndint
	for 387 instead of extending and truncating.
	(frndintxf2_<rounding>): Test flag_fp_int_builtin_inexact ||
	!flag_trapping_math instead of flag_unsafe_math_optimizations.
	Change to frndint<mode>2_<rounding>.
	(frndintxf2_<rounding>_i387): Likewise.  Change to
	frndint<mode>2_<rounding>_i387.
	(<rounding_insn>xf2): Likewise.
	(<rounding_insn><mode>2): Test flag_fp_int_builtin_inexact ||
	!flag_trapping_math instead of flag_unsafe_math_optimizations for
	x87.  Test TARGET_ROUND || !flag_trapping_math ||
	flag_fp_int_builtin_inexact instead of !flag_trapping_math for
	SSE.  Use ROUND_NO_EXC in constant operand of
	gen_sse4_1_round<mode>2.  Just use gen_frndint<mode>2_<rounding>
	for 387 instead of extending and truncating.

gcc/testsuite:
	* gcc.dg/torture/builtin-fp-int-inexact.c,
	gcc.target/i386/387-builtin-fp-int-inexact.c,
	gcc.target/i386/387-rint-inline-1.c,
	gcc.target/i386/387-rint-inline-2.c,
	gcc.target/i386/sse2-builtin-fp-int-inexact.c,
	gcc.target/i386/sse2-rint-inline-1.c,
	gcc.target/i386/sse2-rint-inline-2.c,
	gcc.target/i386/sse4_1-builtin-fp-int-inexact.c,
	gcc.target/i386/sse4_1-rint-inline.c: New tests.

From-SVN: r237074
2016-06-03 16:49:04 +01:00
H.J. Lu f8071c0566 Implement x86 interrupt attribute
The interrupt and exception handlers are called by x86 processors.  X86
hardware pushes information onto stack and calls the handler.  The
requirements are

1. Both interrupt and exception handlers must use the 'IRET' instruction,
instead of the 'RET' instruction, to return from the handlers.
2. All registers are callee-saved in interrupt and exception handlers.
3. The difference between interrupt and exception handlers is the
exception handler must pop 'ERROR_CODE' off the stack before the 'IRET'
instruction.

The design goals of interrupt and exception handlers for x86 processors
are:

1. Support both 32-bit and 64-bit modes.
2. Flexible for compilers to optimize.
3. Easy to use by programmers.

To implement interrupt and exception handlers for x86 processors, a
compiler should support:

'interrupt' attribute

Use this attribute to indicate that the specified function with
mandatory arguments is an interrupt or exception handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.  The 'IRET' instruction,
instead of the 'RET' instruction, is used to return from interrupt or
exception handlers.  All registers, except for the EFLAGS register which
is restored by the 'IRET' instruction, are preserved by the compiler.
Since GCC doesn't preserve MPX, SSE, MMX nor x87 states, the GCC option,
-mgeneral-regs-only, should be used to compile interrupt and exception
handlers.

Note for compiler implementers: If the compiler generates MPX, SSE, MMX
or x87 instructions in an interrupt or exception handler, or functions
called from an interrupt or exception handler may contain MPX, SSE, MMX
or x87 instructions, the compiler must save and restore the corresponding
state.

Since the direction flag in the FLAGS register in interrupt (exception)
handlers is undetermined, cld instruction must be emitted in function
prologue if rep string instructions are used in interrupt (exception)
handler or interrupt (exception) handler isn't a leaf function.

Any interruptible-without-stack-switch code must be compiled with
-mno-red-zone since interrupt handlers can and will, because of the
hardware design, touch the red zone.

1. interrupt handler must be declared with a mandatory pointer argument:

struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame)
{
...
}

and user must properly define the structure the pointer pointing to.

2. exception handler:

The exception handler is very similar to the interrupt handler with
a different mandatory function signature:

typedef unsigned int uword_t __attribute__ ((mode (__word__)));

struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame, uword_t error_code)
{
...
}

and compiler pops the error code off stack before the 'IRET' instruction.

The exception handler should only be used for exceptions which push an
error code and all other exceptions must use the interrupt handler.
The system will crash if the wrong handler is used.

'no_caller_saved_registers' attribute

Use this attribute to indicate that the specified function has no
caller-saved registers.  That is, all registers are callee-saved.
The compiler generates proper function entry and exit sequences to
save and restore any modified registers, except for the EFLAGS register.
Since GCC doesn't preserve MPX, SSE, MMX nor x87 states, the GCC option,
-mgeneral-regs-only, should be used to compile functions with
'no_caller_saved_registers'attribute.

Note for compiler implementers: If the compiler generates MPX, SSE,
MMX or x87 instructions in a function with 'no_caller_saved_registers'
attribute or functions called from a function with
'no_caller_saved_registers' attribute may contain MPX, SSE, MMX or x87
instructions, the compiler must save and restore the corresponding state.

The user can call functions specified with 'no_caller_saved_registers'
attribute from an interrupt handler without saving and restoring all
call clobbered registers.

On x86, interrupt handlers are only called by processors which push
interrupt data onto stack at the address where the normal return address
is.  Interrupt handlers must access interrupt data via pointers so that
they can update interrupt data.

gcc/

	PR target/66960
	PR target/67630
	PR target/67634
	PR target/67841
	PR target/68037
	PR target/68618
	PR target/68661
	PR target/69575
	PR target/69596
	PR target/69734
	* config/i386/i386-protos.h (ix86_epilogue_uses): New prototype.
	* config/i386/i386.c (ix86_conditional_register_usage): Preserve
	all registers, except for function return registers if there are
	no caller-saved registers.
	(ix86_set_func_type): New function.
	(ix86_set_current_function): Call ix86_set_func_type to set
	no_caller_saved_registers and func_type.  Call reinit_regs if
	caller-saved registers are changed.  Don't allow MPX, SSE, MMX
	nor x87 instructions in interrupt handler nor function with
	no_caller_saved_registers attribute.
	(ix86_function_ok_for_sibcall): Return false if there are no
	caller-saved registers.
	(type_natural_mode): Don't warn ABI change for MMX in interrupt
	handler.
	(ix86_function_arg_advance): Skip for callee in interrupt
	handler.
	(ix86_function_arg): Return special arguments in interrupt
	handler.
	(ix86_promote_function_mode): Promote pointer to word_mode only
	for normal functions.
	(ix86_can_use_return_insn_p): Don't use `ret' instruction in
	interrupt handler.
	(ix86_epilogue_uses): New function.
	(ix86_hard_regno_scratch_ok): Likewise.
	(ix86_save_reg): Preserve all registers in interrupt handler
	after reload.  Preserve all registers, except for function
	return registers, if there are no caller-saved registers after
	reload.
	(find_drap_reg): Always use callee-saved register if there are
	no caller-saved registers.
	(ix86_minimum_incoming_stack_boundary): Return MIN_STACK_BOUNDARY
	for interrupt handler.
	(ix86_expand_prologue): Don't allow DRAP in interrupt handler.
	Emit cld instruction if stringops are used in interrupt handler
	or interrupt handler isn't a leaf function.
	(ix86_expand_epilogue): Generate interrupt return for interrupt
	handler and pop the 'ERROR_CODE' off the stack before interrupt
	return in exception handler.
	(ix86_expand_call): Disallow calling interrupt handler directly.
	If there are no caller-saved registers, mark all registers that
	are clobbered by the call which returns as clobbered.
	(ix86_handle_no_caller_saved_registers_attribute): New function.
	(ix86_handle_interrupt_attribute): Likewise.
	(ix86_attribute_table): Add interrupt and no_caller_saved_registers
	attributes.
	(TARGET_HARD_REGNO_SCRATCH_OK): Likewise.
	* config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Use argument
	accumulation in interrupt function if stack may be realigned to
	avoid DRAP.
	(EPILOGUE_USES): New.
	(function_type): New enum.
	(machine_function): Add func_type and no_caller_saved_registers.
	* config/i386/i386.md (UNSPEC_INTERRUPT_RETURN): New.
	(interrupt_return): New pattern.
	* doc/extend.texi: Document x86 interrupt and
	no_caller_saved_registers attributes.

gcc/testsuite/

	PR target/66960
	PR target/67630
	PR target/67634
	PR target/67841
	PR target/68037
	PR target/68618
	PR target/68661
	PR target/69575
	PR target/69596
	PR target/69734
	* gcc.dg/guality/pr68037-1.c: New test.
	* gcc.dg/guality/pr68037-2.c: Likewise.
	* gcc.dg/guality/pr68037-3.c: Likewise.
	* gcc.dg/torture/pr68037-1.c: Likewise.
	* gcc.dg/torture/pr68037-2.c: Likewise.
	* gcc.dg/torture/pr68037-3.c: Likewise.
	* gcc.dg/torture/pr68661-1a.c: Likewise.
	* gcc.dg/torture/pr68661-1b.c: Likewise.
	* gcc.target/i386/interrupt-1.c: Likewise.
	* gcc.target/i386/interrupt-2.c: Likewise.
	* gcc.target/i386/interrupt-3.c: Likewise.
	* gcc.target/i386/interrupt-4.c: Likewise.
	* gcc.target/i386/interrupt-5.c: Likewise.
	* gcc.target/i386/interrupt-6.c: Likewise.
	* gcc.target/i386/interrupt-7.c: Likewise.
	* gcc.target/i386/interrupt-8.c: Likewise.
	* gcc.target/i386/interrupt-9.c: Likewise.
	* gcc.target/i386/interrupt-10.c: Likewise.
	* gcc.target/i386/interrupt-11.c: Likewise.
	* gcc.target/i386/interrupt-12.c: Likewise.
	* gcc.target/i386/interrupt-13.c: Likewise.
	* gcc.target/i386/interrupt-14.c: Likewise.
	* gcc.target/i386/interrupt-15.c: Likewise.
	* gcc.target/i386/interrupt-16.c: Likewise.
	* gcc.target/i386/interrupt-17.c: Likewise.
	* gcc.target/i386/interrupt-18.c: Likewise.
	* gcc.target/i386/interrupt-19.c: Likewise.
	* gcc.target/i386/interrupt-20.c: Likewise.
	* gcc.target/i386/interrupt-21.c: Likewise.
	* gcc.target/i386/interrupt-22.c: Likewise.
	* gcc.target/i386/interrupt-23.c: Likewise.
	* gcc.target/i386/interrupt-24.c: Likewise.
	* gcc.target/i386/interrupt-25.c: Likewise.
	* gcc.target/i386/interrupt-26.c: Likewise.
	* gcc.target/i386/interrupt-27.c: Likewise.
	* gcc.target/i386/interrupt-28.c: Likewise.
	* gcc.target/i386/interrupt-387-err-1.c: Likewise.
	* gcc.target/i386/interrupt-387-err-2.c: Likewise.
	* gcc.target/i386/interrupt-bnd-err-1.c: Likewise.
	* gcc.target/i386/interrupt-bnd-err-2.c: Likewise.
	* gcc.target/i386/interrupt-iamcu.c: Likewise.
	* gcc.target/i386/interrupt-mmx-err-1.c: Likewise.
	* gcc.target/i386/interrupt-mmx-err-2.c: Likewise.
	* gcc.target/i386/interrupt-redzone-1.c: Likewise.
	* gcc.target/i386/interrupt-redzone-2.c: Likewise.
	* gcc.target/i386/interrupt-sibcall-1.c: Likewise.
	* gcc.target/i386/interrupt-sibcall-2.c: Likewise.
	* gcc.target/i386/interrupt-switch-abi.c: Likewise.

Co-Authored-By: Julia Koval <julia.koval@intel.com>

From-SVN: r237073
2016-06-03 08:08:00 -07:00
H.J. Lu 9de2e7955b Convert leading spaces to tabs
From-SVN: r237072
2016-06-03 08:06:47 -07:00
H.J. Lu a2ae575258 Convert leading spaces to tabs
From-SVN: r237071
2016-06-03 08:05:11 -07:00
Chung-Lin Tang b605f6639c c-typeck.c (c_finish_omp_clauses): Mark OpenACC reduction arguments as addressable when async clause exists.
2016-06-03  Chung-Lin Tang  <cltang@codesourcery.com>

	c/
	* c-typeck.c (c_finish_omp_clauses): Mark OpenACC reduction
	arguments as addressable when async clause exists.

	cp/
	* semantics.c (finish_omp_clauses): Mark OpenACC reduction
	arguments as addressable when async clause exists.

	fortran/
	* trans-openmp.c (gfc_trans_omp_reduction_list): Add mark_addressable
	bool parameter, set reduction clause DECLs as addressable when true.
	(gfc_trans_omp_clauses): Pass clauses->async to
	gfc_trans_omp_reduction_list, add comment describing OpenACC situation.

	libgomp/
	* testsuite/libgomp.oacc-fortran/reduction-8.f90: New testcase.
	* testsuite/libgomp.oacc-c-c++-common/reduction-8.c: New testcase.

From-SVN: r237070
2016-06-03 14:25:12 +00:00
Bernd Schmidt 36b85e4328 re PR tree-optimization/52171 (memcmp/strcmp/strncmp can be optimized when the result is tested for [in]equality with 0)
PR tree-optimization/52171
        * builtins.c (expand_cmpstrn_or_cmpmem): Delete, moved elsewhere.
        (expand_builtin_memcmp): New arg RESULT_EQ.  All callers changed.
        Look for constant strings.  Move some code to emit_block_cmp_hints
        and use it.
        * builtins.def (BUILT_IN_MEMCMP_EQ): New.
        * defaults.h (COMPARE_MAX_PIECES): New macro.
        * expr.c (move_by_pieces_d, store_by_pieces_d): Remove old structs.
        (move_by_pieces_1, store_by_pieces_1, store_by_pieces_2): Remvoe.
        (clear_by_pieces_1): Don't declare.  Move definition before use.
        (can_do_by_pieces): New static function.
        (can_move_by_pieces): Use it.  Return bool.
        (by_pieces_ninsns): Renamed from move_by_pieces_ninsns.  New arg
        OP.  All callers changed.  Handle COMPARE_BY_PIECES.
        (class pieces_addr); New.
        (pieces_addr::pieces_addr, pieces_addr::decide_autoinc,
        pieces_addr::adjust, pieces_addr::increment_address,
        pieces_addr::maybe_predec, pieces_addr::maybe_postinc): New member
        functions for it.
        (class op_by_pieces_d): New.
        (op_by_pieces_d::op_by_pieces_d, op_by_pieces_d::run): New member
        functions for it.
        (class move_by_pieces_d, class compare_by_pieces_d,
        class store_by_pieces_d): New subclasses of op_by_pieces_d.
        (move_by_pieces_d::prepare_mode, move_by_pieces_d::generate,
        move_by_pieces_d::finish_endp, store_by_pieces_d::prepare_mode,
        store_by_pieces_d::generate, store_by_pieces_d::finish_endp,
        compare_by_pieces_d::generate, compare_by_pieces_d::prepare_mode,
        compare_by_pieces_d::finish_mode): New member functions.
        (compare_by_pieces, emit_block_cmp_via_cmpmem): New static
        functions.
        (expand_cmpstrn_or_cmpmem): Moved here from builtins.c.
        (emit_block_cmp_hints): New function.
        (move_by_pieces, store_by_pieces, clear_by_pieces): Rewrite to just
        use the newly defined classes.
        * expr.h (by_pieces_constfn): New typedef.
        (can_store_by_pieces, store_by_pieces): Use it in arg declarations.
        (emit_block_cmp_hints, expand_cmpstrn_or_cmpmem): Declare.
        (move_by_pieces_ninsns): Don't declare.
        (can_move_by_pieces): Change return value to bool.
        * target.def (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Update docs.
        (compare_by_pieces_branch_ratio): New hook.
        * target.h (enum by_pieces_operation): Add COMPARE_BY_PIECES.
        (by_pieces_ninsns): Declare.
        * targethooks.c (default_use_by_pieces_infrastructure_p): Handle
        COMPARE_BY_PIECES.
        (default_compare_by_pieces_branch_ratio): New function.
        * targhooks.h (default_compare_by_pieces_branch_ratio): Declare.
        * doc/tm.texi.in (STORE_MAX_PIECES, COMPARE_MAX_PIECES): Document.
        * doc/tm.texi: Regenerate.
        * tree-ssa-strlen.c: Include "builtins.h".
        (handle_builtin_memcmp): New static function.
        (strlen_optimize_stmt): Call it for BUILT_IN_MEMCMP.
        * tree.c (build_common_builtin_nodes): Create __builtin_memcmp_eq.

testsuite/
        PR tree-optimization/52171
        * gcc.dg/pr52171.c: New test.
        * gcc.target/i386/pr52171.c: New test.

From-SVN: r237069
2016-06-03 14:20:53 +00:00
Jan Hubicka bfeee8acaa pred-1.C: New testcase
* g++.dg/tree-ssa/pred-1.C: New testcase
	* gcc.dg/tree-ssa/pred-1.c: New testcase
	* cp-gimplify.c (genericize_continue_stmt): Force addition of
	predict stmt.

From-SVN: r237068
2016-06-03 13:47:15 +00:00
Bill Schmidt 859b0bae8e re PR target/70957 (testsuite/gcc.target/powerpc/vsx-elemrev-4.c fails on power7)
2016-06-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/70957
	* gcc.target/powerpc/vsx-elemrev-2.c: Require p9vector hardware
	support.
	* gcc.target/powerpc/vsx-elemrev-4.c: Likewise.

From-SVN: r237066
2016-06-03 13:14:26 +00:00
Alan Hayward 3a2edf4cb8 [3/3] No need to vectorize simple only-live stmts
2016-06-03  Alan Hayward  <alan.hayward@arm.com>

[3/3] No need to vectorize simple only-live stmts

gcc/
	* tree-vect-stmts.c (vect_stmt_relevant_p): Do not vectorize non live
	relevant stmts which are simple and invariant.
	* tree-vect-loop.c (vectorizable_live_operation): Check relevance
	instead of simple and invariant

testsuite/
	* gcc.dg/vect/vect-live-slp-5.c: Remove dg check.

From-SVN: r237065
2016-06-03 13:04:01 +00:00