170275 Commits

Author SHA1 Message Date
Richard Biener
95bbf4751b tree-ssa-pre.c (has_abnormal_preds): Remove global var.
2019-08-01  Richard Biener  <rguenther@suse.de>

	* tree-ssa-pre.c (has_abnormal_preds): Remove global var.
	(compute_antic): Localize it here.

From-SVN: r273971
2019-08-01 11:37:22 +00:00
Bernd Edlinger
6e42c90c06 Make-lang.in (lto.install-common): Remove unnecessary slash between $(DESTDIR) and $(bindir).
2019-08-01  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * Make-lang.in (lto.install-common): Remove unnecessary slash
        between $(DESTDIR) and $(bindir).

From-SVN: r273969
2019-08-01 08:45:29 +00:00
Kito Cheng
ee9021bc15 RISC-V: Fix testcase on rv64
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/attribute-10.c: Fix testcase on rv64.

From-SVN: r273968
2019-08-01 06:33:48 +00:00
GCC Administrator
b13e319661 Daily bump.
From-SVN: r273960
2019-08-01 00:16:17 +00:00
Paolo Carlini
6b58e2b525 decl2.c (delete_sanity): Improve diagnostic locations, use cp_expr_loc_or_loc in four places.
/cp
2019-07-31  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl2.c (delete_sanity): Improve diagnostic locations, use
	cp_expr_loc_or_loc in four places.

/testsuite
2019-07-31  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/diagnostic/delete1.C: New.

From-SVN: r273952
2019-07-31 21:50:04 +00:00
Maxim Blinov
285cf766c1 RISC-V: Raise error on unexpected ISA string at end.
2019-07-31  Maxim Blinov  <maxim.blinov@embecosm.com>
	gcc/
	* common/config/riscv/riscv-common.c: Check -march string ends
	with null.
	gcc/testsuite/
	* gcc.target/riscv/attribute-10.c: New test.

From-SVN: r273951
2019-07-31 14:36:41 -07:00
Jonathan Wakely
3090082cbe Qualify call to prevent ADL
* include/std/memory (make_obj_using_allocator): Qualify call to
	uses_allocator_construction_args.

From-SVN: r273945
2019-07-31 20:08:56 +01:00
Jason Merrill
10acaf4db9 PR c++/90538 - multiple expansions of capture packs
Previously, with init-capture the type of the closure field was a
DECLTYPE_TYPE of the initializer.  But since each time we tsubst a lambda we
get a different lambda, that meant that if the initializer is a lambda, we'd
end up with different closure types in the field and initializer after
substitution (PR 87322).  We dealt with this by remembering the lambda
instantiation within each pack expansion element, using
local_specialization_stack to separate the elements.  But that broke this
testcase, because it lost lambda capture proxies that also use
local_specializations.

So, this patch removes the local_specializations changes from that patch and
fixes 87322 differently, by giving init-capture fields 'auto' type and doing
deduction later.  There's a bit of a kludge to get the right number of
fields by pretending that 'auto...' uses the parameter packs from the
initializer, but it does the trick.

	* cp-tree.h (DECLTYPE_FOR_INIT_CAPTURE): Remove.
	* lambda.c (add_capture): Copy parameter packs from init.
	(lambda_capture_field_type): Always use auto for init-capture.
	* pt.c (uses_parameter_packs): Return tree.
	(tsubst) [DECLTYPE_TYPE]: Remove init-capture handling.
	(gen_elem_of_pack_expansion_instantiation): Don't push
	local_specialization_stack.
	(prepend_one_capture): New.
	(tsubst_lambda_expr): Use it.  Don't touch local_specializations.
	(do_auto_deduction): Avoid redundant error.

From-SVN: r273944
2019-07-31 14:50:00 -04:00
Jason Merrill
fc79fc4966 Fix copy_node of TEMPLATE_INFO.
build_clone uses copy_node to duplicate the TEMPLATE_INFO for a clone, but
this clears TREE_CHAIN, which was TI_ARGS in a TEMPLATE_INFO.

	* cp-tree.h (struct tree_template_info): Use tree_base instead of
	tree_common.  Add tmpl and args fields.
	(TI_TEMPLATE, TI_ARGS): Adjust.

From-SVN: r273943
2019-07-31 14:49:28 -04:00
Alexander Monakov
b6de302895 ipa-devirt: make qsort helpers static
* ipa-devirt.c (type_warning_cmp): Make static.
	(decl_warning_cmp): Ditto.

From-SVN: r273942
2019-07-31 20:55:04 +03:00
Peter Bergner
98ae96d2ad re PR target/91050 (-mdejagnu-cpu=<cpu> does not affect the -m<cpu> assembler option)
PR target/91050
	* config/rs6000/rs6000.opt (mdejagnu-cpu=): Delete option.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
	use of deleted rs6000_dejagnu_cpu_index variable.
	* config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Define.
	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.
	* config/darwin.h (DRIVER_SELF_SPECS): Rename from this ...
	(SUBTARGET_DRIVER_SELF_SPECS): ...to this.
	* config/i386/i386.h (DRIVER_SELF_SPECS): Define.
	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.

From-SVN: r273941
2019-07-31 12:18:40 -05:00
Jonathan Wakely
960b9ae05a Implement "P0631R4 Math Constants" for C++20
The values of the constants are taken from Glibc where the equivalent
constant exists, or by rounding the actual constant to the same number
of digits as the Glibc constants have.

	P0631R4 Math Constants
	* include/Makefile.am: Add new header.
	* include/Makefile.in: Regenerate.
	* include/precompiled/stdc++.h: Include new header.
	* include/std/numbers: New header.
	* include/std/version (__cpp_lib_math_constants): Define.
	* testsuite/26_numerics/numbers/1.cc: New test.
	* testsuite/26_numerics/numbers/2.cc: New test.
	* testsuite/26_numerics/numbers/3.cc: New test.
	* testsuite/26_numerics/numbers/nonfloat_neg.cc: New test.

From-SVN: r273940
2019-07-31 17:40:39 +01:00
Jonathan Wakely
27e6c1f406 Add Doxygen comments to <bit> header
* include/std/bit: Add Doxygen comments.

From-SVN: r273938
2019-07-31 15:38:50 +01:00
Jonathan Wakely
949fdadb9d PR libstdc++/91308 fix constraints on unique_ptr assignment
PR libstdc++/91308
	* include/bits/unique_ptr.h (unique_ptr::__safe_conversion_up): Remove
	constraints on deleter that should only apply to the constructor.
	(unique_ptr<T[], D>::__safe_conversion_up): Likewise.
	(unique_ptr<T[], D>::unique_ptr(unique_ptr<U, D>&&)): Restore
	constraints on deleter here.
	* testsuite/20_util/unique_ptr/assign/91308.cc: New test.

From-SVN: r273937
2019-07-31 15:38:26 +01:00
Richard Biener
208149b720 re PR tree-optimization/91280 (ICE in get_constraint_for_component_ref, at tree-ssa-structalias.c:3259 since r260354)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91280
	* tree-ssa-structalias.c (get_constraint_for_component_ref):
	Decompose MEM_REF manually for offset handling.

	* g++.dg/torture/pr91280.C: New testcase.

From-SVN: r273936
2019-07-31 14:38:21 +00:00
Jakub Jelinek
a28351e7f5 re PR c/91192 (non-deterministic ICE on invalid)
PR c/91192
	* c-parser.c (c_parser_sizeof_expression): Call set_c_expr_source_range
	even if finish is UNKNOWN_LOCATION, just use start as finish in that
	case.

From-SVN: r273935
2019-07-31 16:32:24 +02:00
Richard Biener
2153fa7b60 re PR tree-optimization/91293 (Wrong code with -O3 -mavx2)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91293
	* tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands
	of reduction stmts.

	* gcc.dg/vect/pr91293-1.c: New testcase.
	* gcc.dg/vect/pr91293-2.c: Likewise.
	* gcc.dg/vect/pr91293-3.c: Likewise.

From-SVN: r273934
2019-07-31 14:15:37 +00:00
Matt Thomas
428642b132 config.gcc (hppa*-*-netbsd*): New target.
gcc/ChangeLog:
	* config.gcc (hppa*-*-netbsd*): New target.
	* config/pa/pa-netbsd.h: New file.
	* config/pa/pa32-netbsd.h: New file.

libgcc/ChangeLog:
	* config.host (hppa*-*-netbsd*): New case.
	* config/pa/t-netbsd: New file.


Co-Authored-By: Matthew Green <mrg@eterna.com.au>
Co-Authored-By: Maya Rashish <coypu@sdf.org>
Co-Authored-By: Nick Hudson <nick@nthcliff.demon.co.uk>

From-SVN: r273933
2019-07-31 14:11:16 +00:00
Jakub Jelinek
538e4cdc15 re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR tree-optimization/91201
	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.

	* gcc.target/i386/sse2-pr91201-2.c: New test.

From-SVN: r273932
2019-07-31 15:49:26 +02:00
Andrew Stubbs
930c55993f Remove amdgcn expcnt waits.
2019-07-31  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md
	(scatter<mode>_insn_1offset<exec_scatter>): Remove s_waitcnt.
	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Add delayeduse and reads to
	struct ilist. Add nops for delayeduse insns.
	* config/gcn/gcn.md (delayeduse): New attribute.
	(*movbi): Remove s_waitcnt from stores.
	(*mov<mode>_insn): Likewise.
	(*movti_insn): Likewise. Add delayeduse attribute.
	(sync_compare_and_swap<mode>_insn): Add delayeduse attribute.
	(atomic_store<mode>): Remove or adjust s_waitcnt.

From-SVN: r273931
2019-07-31 11:51:21 +00:00
Richard Biener
f86c2e7196 vr-values.h (vr_values::swap_vr_value): New.
2019-07-31  Richard Biener  <rguenther@suse.de>

	* vr-values.h (vr_values::swap_vr_value): New.
	(vr_values::free_value_range): likewise.
	* vr-values.c (vr_values::swap_vr_value): Implement.
	* gimple-ssa-evrp-analyze.h (evrp_range_analyzer::pop_value_range):
	Do not return a range or take a var.
	(evrp_range_analyzer::stack): Change back to recording a non-const
	value_range *.
	* gimple-ssa-evrp-analyze.c
	(evrp_range_analyzer::record_ranges_from_stmt): Free unused
	value-range.
	(evrp_range_analyzer::pop_to_marker): Adjust.
	(evrp_range_analyzer::push_value_range): Use new swap_vr_value.
	(evrp_range_analyzer::pop_value_range): Likewise.  Free the
	no longer needed value-range.

From-SVN: r273930
2019-07-31 10:55:27 +00:00
Martin Liska
f39b06395e Mark necessary 2nd and later args for delete op.
2019-07-31  Martin Liska  <mliska@suse.cz>

	* tree-ssa-dce.c (propagate_necessity): Delete operator can
	have size and (or) alignment as 2nd and later arguments.
	Mark all of them as necessary.

From-SVN: r273929
2019-07-31 10:02:30 +00:00
Richard Biener
0fbdb0c088 re PR tree-optimization/91178 (Infinite recursion in split_constant_offset in slp after r260289)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91178
	* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address):
	Use tail-recursion.

	* gcc.dg/torture/pr91178-2.c: New testcase.

From-SVN: r273928
2019-07-31 09:46:18 +00:00
Jakub Jelinek
1104467f39 re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR tree-optimization/91201
	* config/i386/sse.md (reduc_plus_scal_v16qi): New expander.
	(REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for
	TARGET_AVX512F.
	(reduc_plus_scal_<mode>): Improve formatting by introducing
	a temporary.

	* gcc.target/i386/sse2-pr91201.c: New test.
	* gcc.target/i386/avx2-pr91201.c: New test.
	* gcc.target/i386/avx512bw-pr91201.c: New test.

From-SVN: r273927
2019-07-31 11:22:48 +02:00
Sudakshina Das
89626179b6 [GCC, AArch64] Enable Transactional Memory Extension
This patch enables the new Transactional Memory Extension announced recently
as part of Arm's new architecture technologies.
We introduce a new optional extension "tme" to enable this. The following
instructions are part of the extension:
   * tstart <Xt>
   * ttest <Xt>
   * tcommit
   * tcancel #<imm>
We have also added ACLE intrinsics for the instructions.

*** gcc/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
	AARCH64_TME_BUILTIN_TSTART, AARCH64_TME_BUILTIN_TCOMMIT,
	AARCH64_TME_BUILTIN_TTEST and AARCH64_TME_BUILTIN_TCANCEL.
	(aarch64_init_tme_builtins): New.
	(aarch64_init_builtins): Call aarch64_init_tme_builtins.
	(aarch64_expand_builtin_tme): New.
	(aarch64_expand_builtin): Handle TME builtins.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_TME when enabled.
	* config/aarch64/aarch64-option-extensions.def: Add "tme".
	* config/aarch64/aarch64.h (AARCH64_FL_TME, AARCH64_ISA_TME): New.
	(TARGET_TME): New.
	* config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_TTEST.
	(define_c_enum "unspecv"): Add UNSPECV_TSTART, UNSPECV_TCOMMIT and
	UNSPECV_TCANCEL.
	(tstart, ttest, tcommit, tcancel): New instructions.
	* config/aarch64/arm_acle.h (__tstart, __tcommit): New.
	(__tcancel, __ttest): New.
	(_TMFAILURE_REASON, _TMFAILURE_RTRY, _TMFAILURE_CNCL): New macro.
	(_TMFAILURE_MEM, _TMFAILURE_IMP, _TMFAILURE_ERR): Likewise.
	(_TMFAILURE_SIZE, _TMFAILURE_NEST, _TMFAILURE_DBG): Likewise.
	(_TMFAILURE_INT, _TMFAILURE_TRIVIAL): Likewise.
	* config/arm/types.md: Add new tme type attr.
	* doc/invoke.texi: Document "tme".

*** gcc/testsuite/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/acle/tme.c: New test.
	* gcc.target/aarch64/pragma_cpp_predefs_2.c: New test.

From-SVN: r273926
2019-07-31 09:19:53 +00:00
Joel Hutton
f0efd92502 [Arm][CMSE]Add warn_unused_return attribute to cmse functions
At present it is possible to call the CMSE functions for checking
addresses (such as cmse_check_address_range) and  forget to check/use
the return value. This patch makes the interfaces more robust against
programmer error by marking these functions with the warn_unused_result
attribute. With this set, any use of these functions that does not use
the result will produce a warning.

This produces a warning on default warn levels when the result of the
cmse functions is not used.

For the following function:
void foo()
{
     int *data;
     cmse_check_address_range((int*)data, 0, 0);
}
The following warning is emitted:
warning: ignoring return value of 'cmse_check_address_range' declared
with attribute 'warn_unused_result' [-Wunused-result]
     6 |  cmse_check_address_range((int*)data, 0, 0);
        |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

gcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/arm_cmse.h (cmse_nonsecure_caller): Add
warn_unused_result attribute.
         (cmse_check_address_range): Add warn_unused_result attribute.

libgcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/cmse.c (cmse_check_address_range): Add
warn_unused_result attribute.

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * gcc.target/arm/cmse/cmse-17.c: New test.

From-SVN: r273924
2019-07-31 08:56:35 +00:00
Richard Biener
ce52e0ffb4 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* tree-vrp.c (union_ranges): Unify equality and less tests
	by using compare_values.  Re-order cheap tests first.

From-SVN: r273923
2019-07-31 07:53:11 +00:00
Jakub Jelinek
c3ac76aa40 re PR middle-end/91301 (ICE in omp_add_variable on random access iterator distribute parallel for private (iterator))
PR middle-end/91301
	* gimplify.c (gimplify_omp_for): If for class iterator on
	distribute parallel for there is no data sharing clause
	on inner_for_stmt, look for private clause on combined
	parallel too and if found, move it to inner_for_stmt.

	* testsuite/libgomp.c++/for-27.C: New test.

From-SVN: r273922
2019-07-31 09:49:56 +02:00
Richard Sandiford
a25f3e8efb Make lra use per-alternative earlyclobber info
lra_insn_reg and lra_operand_data have both a bitmask of earlyclobber
alternatives and an overall boolean.  The danger is that we then test
the overall boolean when really we should be testing for a particular
alternative.  This patch gets rid of the boolean and tests the mask
against zero when we really do need to test "any alternative might
be earlyclobber".  (I think the only instance of that is the
LRA_UNKNOWN_ALT handling in lra-lives.c:reg_early_clobber_p.)

This is needed (and tested) by an upcoming SVE patch.

2019-07-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* lra-int.h (lra_operand_data): Remove early_clobber field.
	(lra_insn_reg): Likewise.
	* lra.c (debug_operand_data): Update accordingly.
	(setup_operand_alternative): Likewise.
	(new_insn_reg): Likewise.  Remove early_clobber parameter.
	(collect_non_operand_hard_regs): Update call accordingly.
	Don't assign to lra_insn_reg::early_clobber.
	(add_regs_to_insn_regno_info): Remove early_clobber parameter
	and update calls to new_insn_reg.
	(lra_update_insn_regno_info): Update calls accordingly.
	* lra-constraints.c (update_and_check_small_class_inputs): Take the
	alternative number as a parameter and test whether the operand
	is earlyclobbered in that particular alternative.
	(process_alt_operands): Update call accordingly.  Use per-alternative
	checks for earyclobber here too.
	* lra-lives.c (reg_early_clobber_p): Check early_clobber_alts
	against zero for IRA_UNKNOWN_ALT.

From-SVN: r273921
2019-07-31 07:33:11 +00:00
GCC Administrator
68c86af248 Daily bump.
From-SVN: r273920
2019-07-31 00:16:23 +00:00
Martin Sebor
5df20b9095 PR testsuite/91258 - g++.dg/ubsan/vla-1.C and gcc.dg/strlenopt-70.c fail starting with r273783
gcc/testsuite/ChangeLog:
	* g++.dg/ubsan/vla-1.C: Suppress a valid warning.

From-SVN: r273915
2019-07-30 14:42:36 -06:00
Steven G. Kargl
f16be16d2d re PR fortran/91296 (ICE when passing complex number %re/%im as a procedure argument with -Waliasing.)
2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* interface.c (compare_actual_expr): When checking for aliasing, add
	a case to handle REF_INQUIRY (e.g., foo(x%re, x%im) do not alias).

2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* gfortran.dg/pr91296.f90: New test.

From-SVN: r273914
2019-07-30 20:02:27 +00:00
Uros Bizjak
5ec4a44296 alpha.c (alpha_option_override): Quote a C type.
* config/alpha/alpha.c (alpha_option_override): Quote a C type.

From-SVN: r273912
2019-07-30 18:24:59 +02:00
Wilco Dijkstra
cefbac6ec7 Adjust literal pool offset in Thumb-2 movsi patterns
My previous change to the Thumb-2 movsi patterns caused a codesize regression
with -Os in large functions.  Fix this by using the literal pool offset of the
16-bit literal load so that the literal pool is dumped earlier, reducing the
number of 32-bit literal loads.

Bootstrap & regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.

From-SVN: r273911
2019-07-30 15:27:04 +00:00
Martin Liska
d9c425fb65 Use edge->indirect_unknown_callee in cgraph_edge::make_direct (PR ipa/89330).
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR ipa/89330
	* cgraph.c (cgraph_edge::make_direct): Use
	edge->indirect_unknown_callee as edge->resolve_speculation can
	deallocate edge which is this pointer.

From-SVN: r273910
2019-07-30 14:52:29 +00:00
Richard Biener
0e5b369ef1 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.c (bitmap_ior_and_compl_into): Open-code.

From-SVN: r273909
2019-07-30 14:16:24 +00:00
Martin Liska
200b0e7e82 Deduce automatically number of cores for -flto option.
2019-07-30  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Document new behavior.
	* lto-wrapper.c (cpuset_popcount): New function
	is a copy of libgomp/config/linux/proc.c.
	(init_num_threads): Likewise.
	(run_gcc): Automatically detect core count for -flto.
	(jobserver_active_p): New function.

From-SVN: r273908
2019-07-30 13:45:11 +00:00
Richard Biener
029ca38849 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.h (bitmap_ior_into_and_free): Declare.
	* bitmap.c (bitmap_list_unlink_element): Add defaulted param
	whether to add the unliked element to the freelist.
	(bitmap_list_insert_element_after): Add defaulted param for
	an already allocated element.
	(bitmap_ior_into_and_free): New function.
	* tree-ssa-structalias.c (condense_visit): Reduce the
	ponts-to and edge bitmaps of the SCC members in a
	logarithmic fashion rather than all to one.

From-SVN: r273907
2019-07-30 12:13:01 +00:00
Martin Liska
1da8ab97a1 Mark 2nd argument of delete operator as needed (PR tree-optimization/91270).
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* tree-ssa-dce.c (propagate_necessity): Mark 2nd argument
	of delete operator as needed.
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* g++.dg/torture/pr91270.C: New test.

From-SVN: r273906
2019-07-30 11:00:35 +00:00
Richard Sandiford
c1b3d82783 Handle IFN_COND_MUL in tree-ssa-math-opts.c
This patch extends the FMA handling in tree-ssa-math-opts.c so
that it can cope with conditional multiplications as well as
unconditional multiplications.  The addition or subtraction must then
have the same condition as the multiplication (at least for now).

E.g. we can currently fold:

  (IFN_COND_ADD cond (mul x y) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

This patch also allows:

  (IFN_COND_ADD cond (IFN_COND_MUL cond x y <whatever>) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

2019-07-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-ssa-math-opts.c (convert_mult_to_fma): Add a mul_cond
	parameter.  When nonnull, make sure that the addition or subtraction
	has the same condition.
	(math_opts_dom_walker::after_dom_children): Try convert_mult_to_fma
	for CFN_COND_MUL too.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-7.c: New test.

From-SVN: r273905
2019-07-30 10:59:29 +00:00
Richard Biener
8c955a4b9c re PR tree-optimization/91291 (gcc.dg/20020312-2.c FAILs)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91291
	* tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Ignore
	constant values.

From-SVN: r273903
2019-07-30 08:57:35 +00:00
Jakub Jelinek
230e2efd78 re PR middle-end/91282 (gcc.dg/type-convert-var.c FAILs)
PR middle-end/91282
	* gcc.dg/type-convert-var.c: Add -fexcess-precision=fast to
	dg-additional-options.

From-SVN: r273899
2019-07-30 09:35:13 +02:00
Jakub Jelinek
03be2d2bb3 re PR middle-end/91216 (OpenMP ICE starting with r265930)
PR middle-end/91216
	* omp-low.c (global_nonaddressable_vars): New variable.
	(use_pointer_for_field): For global decls, if they are non-addressable,
	remember it in the global_nonaddressable_vars bitmap, if they are
	addressable and in the global_nonaddressable_vars bitmap, ignore their
	TREE_ADDRESSABLE bit.
	(omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of
	vars in global_nonaddressable_vars bitmap.
	(execute_lower_omp): Free global_nonaddressable_vars bitmap.

	* gcc.dg/gomp/pr91216.c: New test.

From-SVN: r273898
2019-07-30 09:28:22 +02:00
Jakub Jelinek
fa2987ed8d re PR target/91150 (wrong code with -O -mavx512vbmi due to wrong writemask)
PR target/91150
	* config/i386/i386-expand.c (expand_vec_perm_blend): Change mask type
	from unsigned to unsigned HOST_WIDE_INT.  For E_V64QImode cast
	comparison to unsigned HOST_WIDE_INT before shifting it left.

	* gcc.target/i386/avx512bw-pr91150.c: New test.

From-SVN: r273897
2019-07-30 09:13:04 +02:00
GCC Administrator
b867820937 Daily bump.
From-SVN: r273896
2019-07-30 00:16:16 +00:00
Uros Bizjak
82534f65d8 i386.md (movstrict<mode>): Use register_operand predicate for operand 0.
* config/i386/i386.md (movstrict<mode>): Use register_operand
	predicate for operand 0.  Add expander condition.  Assert that
	operand 0 is a SUBREG RTX.
	(*movstrict<mode>_1): Use register_operand predicate for operand 0.
	Update operand constraints and insn condition.
	(zero_extend<mode>si2_and): Do not call gen_movstrict<mode>.
	(zero_extendqihi2_and): Do not call gen_movstrictqi.
	(*setcc_qi_slp): Use register_operand predicate for operand 0.
	Update operand 0 constraints.
	(setcc_qi_slp splitters): Use register_operand predicate for operand 0.

From-SVN: r273891
2019-07-30 00:47:36 +02:00
Jozef Lawrynowicz
49c432df66 MSP430: Disallow use of code/data regions in the small memory model
gcc/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors
	when -m{code,data}-region are used without -mlarge.
	* config/msp430/msp430.c (msp430_option_override): Error when a
	non-default code or data region is used without -mlarge.
	(msp430_section_attr): Emit a warning and do not add upper/lower/either
	attributes when they are used without -mlarge.

gcc/testsuite/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/pr78818-data-region.c: Add -mlarge to dg-options.
	* gcc.target/msp430/region-misuse-code.c: New test.
	* gcc.target/msp430/region-misuse-data.c: Likewise.
	* gcc.target/msp430/region-misuse-code-data.c: Likewise.
	* gcc.target/msp430/region-attribute-misuse.c: Likewise.

From-SVN: r273884
2019-07-29 20:23:44 +00:00
Jozef Lawrynowicz
3781698890 Allow both upper and lower case 'r' in register names
2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* config/msp430/msp430.h: Define ADDITIONAL_REGISTER_NAMES.

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* gcc.target/msp430/asm-register-names-lower-case.c: New test.
	* gcc.target/msp430/asm-register-names-upper-case.c: Likewise.

From-SVN: r273883
2019-07-29 19:21:18 +00:00
Richard Sandiford
2c393dabda Add PR number
From-SVN: r273882
2019-07-29 18:52:37 +00:00
Richard Sandiford
5d5bb9bc26 Fix inchash handling of wide_ints (PR91242)
inchash:#️⃣:add_wide_int operated directly on the raw encoding
of the wide_int, including any redundant upper bits.  The problem
with that is that the upper bits are only defined for some wide-int
storage types (including wide_int itself).  wi::to_wide(tree) instead
returns a value that is extended according to the signedness of the
type (so that wi::to_widest can use the same encoding) while rtxes
have the awkward special case of BI, which can be zero-extended
rather than sign-extended.

In the PR, we computed a hash for a "normal" sign-extended wide_int
while the existing entries hashed wi::to_wide(tree).  This gives
different results for unsigned types that have the top bit set.

The patch fixes that by hashing the canonical sign-extended form even
if the raw encoding happens to be different.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* wide-int.h (generic_wide_int::sext_elt): New function.
	* inchash.h (hash::add_wide_int): Use it instead of elt.

From-SVN: r273881
2019-07-29 18:50:25 +00:00