Commit Graph

161920 Commits

Author SHA1 Message Date
Martin Liska 97a53d1d04 Support variables in expansion of -fprofile-generate option (PR gcov-profile/47618).
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* doc/invoke.texi: Document how -fprofile-dir format
        is extended.
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* libgcov-driver-system.c (replace_filename_variables): New
        function.
	(gcov_exit_open_gcda_file): Use it.

From-SVN: r261199
2018-06-05 12:10:22 +00:00
Jason Merrill 066c4268db PR c++/85731 - wrong error with qualified-id in template.
* semantics.c (finish_qualified_id_expr): build_qualified_name
	for unbound names in the current class.

From-SVN: r261196
2018-06-05 07:27:12 -04:00
Richard Biener b401e50fed tree-cfgcleanup.c (cleanup_control_flow_pre): For edge removal pretend DOM info isn't available so we do not update it and...
2018-06-05  Richard Biener  <rguenther@suse.de>

	* tree-cfgcleanup.c (cleanup_control_flow_pre): For edge
	removal pretend DOM info isn't available so we do not update
	it and only remove edges, not dominated blocks.  Actually free
	DOM info in case we removed something.  Remove unreachable blocks.
	(mfb_keep_latches): Work with either DOM info or marked backedges.
	(cleanup_tree_cfg_noloop): Do not remove unreachable blocks
	first.  Mark backedges if DOM info isn't available.
	(Re-)compute DOM info after cleanup_control_flow_pre.

From-SVN: r261195
2018-06-05 11:11:16 +00:00
Richard Biener 62761a0f88 tree-cfg.c (struct locus_discrim_map): Store line, not location.
2018-06-05  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (struct locus_discrim_map): Store line, not location.
	(locus_discrim_hasher::hash): Adjust.
	(locus_discrim_hasher::equal): Likewise.
	(next_discriminator_for_locus): Work on line directly.
	(same_line_p): Pass in expanded locus1 as well.
	(assign_discriminators): Avoid redundant location expansions.

From-SVN: r261194
2018-06-05 11:10:25 +00:00
Richard Biener fa385ff4d7 re PR c/86046 (ICE in execute_todo, at passes.c:2043)
2018-06-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/86046
	* tree-ssa.c (maybe_optimize_var): Clear DECL_GIMPLE_REG_P
	if required after clearing TREE_ADDRESSABLE.

	* gcc.dg/pr86046.c: New testcase.

From-SVN: r261193
2018-06-05 10:02:50 +00:00
Richard Biener d12fd774e0 re PR tree-optimization/86047 (ICE in for_each_index, at tree-ssa-loop.c:647)
2018-06-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/86047
	* tree-ssa-loop.c (for_each_index): Glob handling of all
	decls and constants and really handle all of them.

	* gcc.dg/pr86047.c: New testcase.

From-SVN: r261192
2018-06-05 10:01:49 +00:00
Kyrylo Tkachov 12b2b9103a [arm] PR target/81497: Fix arm_acle.h for C++
When trying to compile something with arm_acle.h using G++ we get a number of nasty errors:
arm_acle.h:48:49: error: invalid conversion from ‘const void*’ to ‘const int*’ [-fpermissive]
    return __builtin_arm_ldc (__coproc, __CRd, __p);

This is because the intrinsics that are supposed to be void return the "result" of their builtin,
which is void. C lets that slide but C++ complains.

After fixing that we run into further errors:
arm_acle.h:48:46: error: invalid conversion from 'const void*' to 'const int*' [-fpermissive]
    return __builtin_arm_ldc (__coproc, __CRd, __p);
                                               ^~~
Because the pointer arguments in these intrinsics are void pointers but the builtin
expects int pointers. So this patch introduces new qualifiers for void pointers and their
const-qualified versions and uses that in the specification of these intrinsics.

This gives us the opportunity of creating an arm subdirectory in g++.dg and inaugurates it
with the first arm-specific C++ tests (in that directory).


	PR target/81497
	* config/arm/arm-builtins.c (arm_type_qualifiers): Add
	qualifier_void_pointer and qualifier_const_void_pointer.
	(arm_ldc_qualifiers, arm_stc_qualifiers): Use the above.
	(arm_init_builtins): Handle the above.
	* config/arm/arm_acle.h (__arm_cdp, __arm_ldc, __arm_ldcl, __arm_stc,
	__arm_stcl, __arm_mcr, __arm_cdp2, __arm_ldc2, __arm_ldcl2, __arm_stc2,
	__arm_stcl2,__arm_mcr2, __arm_mcrr, __arm_mcrr2): Remove return for
	void intrinsics.

	* g++.target/arm/arm.exp: New file.
	* g++.target/arm/pr81497.C: Likewise.

From-SVN: r261191
2018-06-05 09:50:16 +00:00
Martin Liska 7f3577f528 Simplify gcov_histogram as it's used only for ARCS counters.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* auto-profile.c (read_autofdo_file): Do not use
	gcov_ctr_summary struct.
	(afdo_callsite_hot_enough_for_early_inline): Likewise.
	* coverage.c (struct counts_entry): Likewise.
	(read_counts_file): Read just single summary entry.
	(get_coverage_counts): Use gcov_summary struct.
	* coverage.h (get_coverage_counts): Likewise.
	* gcov-dump.c (dump_working_sets): Likewise.
	(tag_summary): Dump just single summary.
	* gcov-io.c (gcov_write_summary): Write just histogram
	summary.
	(gcov_read_summary): Read just single summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov-io.h (GCOV_TAG_SUMMARY_LENGTH): Remove usage
	of GCOV_COUNTERS_SUMMABLE.
	(GCOV_COUNTERS_SUMMABLE): Remove.
	(GCOV_FIRST_VALUE_COUNTER): Replace with
	GCOV_COUNTER_V_INTERVAL.
	(struct gcov_ctr_summary): Remove.
	(struct gcov_summary): Directly use fields of former
	gcov_ctr_summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov.c (read_count_file): Do not use ctrs fields.
	* lto-cgraph.c (merge_profile_summaries): Use gcov_summary
	struct.
	* lto-streamer.h (struct GTY): Make profile_info gcov_summary
	struct.
	* profile.c: Likewise.
	* profile.h: Likewise.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* libgcov-driver.c (gcov_compute_histogram): Remove usage
	of gcov_ctr_summary.
	(compute_summary): Do it just for a single summary.
	(merge_one_data): Likewise.
	(merge_summary): Simplify as we read just single summary.
	(dump_one_gcov): Pass proper argument.
	* libgcov-util.c (compute_one_gcov): Simplify as we have just
	single summary.
	(gcov_info_count_all_cold): Likewise.
	(calculate_overlap): Likewise.

From-SVN: r261189
2018-06-05 08:13:31 +00:00
Martin Liska 632b10e141 Print working directory only in intermediate format (PR gcov-profile/84846).
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/84846
	* gcov.c (output_lines): Print working directory only
	in intermediate format.

From-SVN: r261188
2018-06-05 08:11:52 +00:00
Jonathan Wakely d4b695e4b1 * include/std/type_traits: Fix comment typos.
From-SVN: r261186
2018-06-05 08:37:36 +01:00
Jonathan Wakely ce6efef870 Mark some Filesystem tests as XFAIL for mingw
Symlinks are not supported on mingw.

	* testsuite/27_io/filesystem/operations/read_symlink.cc: XFAIL for
	mingw* targets.
	* testsuite/27_io/filesystem/operations/symlink_status.cc: Likewise.
	* testsuite/experimental/filesystem/operations/read_symlink.cc:
	Likewise.

From-SVN: r261185
2018-06-05 08:37:30 +01:00
Andreas Krebbel 51e00a122f S/390: Fix __builtin_tbeginc signature
The builtin was accidentally defined to have an integer return value.
Fixed with the attached patch.

gcc/ChangeLog:

2018-06-05  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390-builtin-types.def: Add void function type.
	* config/s390/s390-builtins.def: Use the function type for the
	tbeginc builtin.

gcc/testsuite/ChangeLog:

2018-06-05  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/htm-builtins-compile-4.c: New test.

From-SVN: r261183
2018-06-05 07:22:24 +00:00
François Dumont d31238cfde 2018-06-05 François Dumont <fdumont@gcc.gnu.org>
* include/bits/stl_tempbuf.h
	(_Temporary_buffer(_FwdIte, _FwdIte)): Delete, replaced by...
	(_Temporary_buffer(_FwdIte, size_type)): ...this, new.
	* include/ext/memory (temporary_buffer<>(_FwdIte, _FwdIte)): Adapt.
	* include/bits/stl_algo.h (__stable_partition): Adapt.
	(__inplace_merge): Adapt.
	(__stable_sort): Adapt.

From-SVN: r261181
2018-06-05 05:47:44 +00:00
GCC Administrator ca6f2936cc Daily bump.
From-SVN: r261180
2018-06-05 00:16:35 +00:00
Jim Wilson fd1e52dc25 RISC-V: Don't clobber retval when __builtin_eh_return called.
gcc/
	* config/riscv/riscv-protos.h (riscv_expand_epilogue): Change bool arg
	to int.
	* config/riscv/riscv.c (riscv_for_each_saved_reg): New args epilogue
	and maybe_eh_return.  Change regno to unsigned int.  Use new args to
	handle EH_RETURN_DATA_REGNO registers properly.
	(riscv_expand_prologue): Pass new args to riscv_for_each_saved_reg.
	(riscv_expand_epilogue): Update comment.  Change argument name and
	type.  Update code to use new name and type.  Pass new args to
	riscv_for_each_saved_reg.  Only use EH_RETURN_STACKADJ_RTX when
	EXCEPTION_RETURN.
	* config/riscv/riscv.md (NORMAL_RETURN): New.
	(SIBCALL_RETURN, EXCEPTION_RETURN): New.
	(epilogue, sibcall_epilogue): Update riscv_expand_epilogue arg.
	(eh_return): Call gen_eh_return_internal and emit barrier.
	(eh_return_internal): Call riscv_expand_epilogue.

From-SVN: r261176
2018-06-04 16:44:43 -07:00
Eric Botcazou 7f5a398246 gimple-ssa-store-merging.c (struct merged_store_group): Move up bit_insertion field and declare can_be_merged_into method.
* gimple-ssa-store-merging.c (struct merged_store_group): Move up
	bit_insertion field and declare can_be_merged_into method.
	(merged_store_group::can_be_merged_into): New method.
	(imm_store_chain_info::coalesce_immediate): Call it to decide whether
	consecutive non-overlapping stores can be merged.  Turn MEM_REF stores
	into BIT_INSERT_EXPR stores if the group contains a non-MEM_REF store.

From-SVN: r261173
2018-06-04 22:12:51 +00:00
Jonathan Wakely d552d8190d PR libstdc++/85930 fix misplaced alignment-specifier
PR libstdc++/85930
	* include/bits/shared_ptr_base.h [!__cpp_rtti]: Include <typeinfo>
	unconditionally. Remove redundant declaration.
	[!__cpp_rtti] (_Sp_make_shared_tag::_S_ti): Fix location of
	alignment-specifier.

From-SVN: r261172
2018-06-04 22:38:42 +01:00
Ian Lance Taylor f0ebf6e322 compiler: fix crashes on cyclic var/type references
This patch fixes type traversal to avoid compiler crashes for test
    cases where a type T includes an expression that refers back to the
    type without actually explicitly mentioning T. Examples include
    
      var x [uintptr(unsafe.Sizeof(&x))]byte
      var a [len(a)]int
    
    The fix involves expanding the set of types that the traversal code
    "remembers" (to avoid cycles) to include array types, and introducing an
    additional guard in Builtin_call_expression::do_is_constant to catch
    cyclic type constructs.
    
    Fixes golang/go#25299
    Fixes golang/go#25679
    Fixes golang/go#25315
    Fixes golang/go#25680
    
    Reviewed-on: https://go-review.googlesource.com/115796

From-SVN: r261168
2018-06-04 19:10:05 +00:00
Martin Liska e68086c432 Add myself as gcov maintainer.
2018-06-04  Martin Liska  <mliska@suse.cz>

	* MAINTAINERS: Add myself as gcov maintainer.

From-SVN: r261167
2018-06-04 18:55:10 +00:00
Richard Biener 1b17b99482 re PR middle-end/85955 (ICE in fold_convert_loc, at fold-const.c:2408)
2018-06-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/85955
	* builtins.c (fold_builtin_sincos): Convert pointers to
	destination to appropriate type before dereferencing.

	* gcc.dg/pr85955.c: New testcase.

From-SVN: r261165
2018-06-04 18:03:24 +00:00
Jason Merrill 6088d4c498 * g++.dg/warn/string1.C: Prune extra warning with -std=c++17.
From-SVN: r261164
2018-06-04 13:46:17 -04:00
Joseph Myers 9be918859e * es.po, fr.po: Update.
From-SVN: r261159
2018-06-04 17:41:25 +01:00
Segher Boessenkool 7638d8b640 rs6000: Fix absif2
Without this patch absif2 always FAILs.  There is no testcase for
that, nor do we see it during bootstrap, but it is obvious.


	* config/rs6000/rs6000.md (abs<mode>2 for FLOAT128): Handle IFmode.

From-SVN: r261158
2018-06-04 18:36:24 +02:00
Jonathan Wakely 389f775789 Define std::fpos special members as defaulted
* include/bits/postypes.h (fpos): Define special members as defaulted.

From-SVN: r261156
2018-06-04 17:07:55 +01:00
Jonathan Wakely dbda636dee PR libstdc++/85930 fix misaligned reference
PR libstdc++/85930
	* include/bits/shared_ptr_base.h (_Sp_make_shared_tag::_S_ti): Align
	the static variable correctly.

From-SVN: r261155
2018-06-04 17:07:35 +01:00
Steven G. Kargl 20ce6adefb re PR fortran/85981 (ICE in gfc_trans_string_copy, at fortran/trans-expr.c:6539)
2018-06-04  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/85981
	* resolve.c (resolve_allocate_deallocate): Check errmsg is default
	character kind.

2018-06-04  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/85981
	* gfortran.dg/allocate_alloc_opt_14.f90: New test.
	* gfortran.dg/allocate_alloc_opt_1.f90: Update error string.
	* gfortran.dg/allocate_stat_2.f90: Ditto.
	* gfortran.dg/deallocate_alloc_opt_1.f90: Ditto.

From-SVN: r261154
2018-06-04 15:54:48 +00:00
Matthew Fortune 37cca345b4 [MAINTAINERS] Update email address
* MAINTAINERS: Update my email address.

From-SVN: r261153
2018-06-04 15:38:08 +00:00
Jason Merrill ae177d3529 PR c++/61806 - missed SFINAE with partial specialization.
* cp-tree.h (deferring_access_check_sentinel): Add deferring_kind
	parameter to constructor.
	* pt.c (instantiate_class_template_1): Enable access checking
	before call to most_specialized_partial_spec.

From-SVN: r261151
2018-06-04 11:16:00 -04:00
Richard Sandiford 8566678b9d Fix expand_expr_real_1 handling of BLKmode bitfield references
The handling of bitfield references in expand_expr_real_1 includes:

            machine_mode ext_mode = mode;

            if (ext_mode == BLKmode
                && ! (target != 0 && MEM_P (op0)
                      && MEM_P (target)
                      && multiple_p (bitpos, BITS_PER_UNIT)))
              ext_mode = int_mode_for_size (bitsize, 1).else_blk ();

            if (ext_mode == BLKmode)
              {
                [...]
                gcc_assert (MEM_P (op0)

Here "mode" is the TYPE_MODE of the result, so when mode == BLKmode,
the target must be a MEM if nonnull, since no other rtl objects can
have BLKmode.  But there's no guarantee that the source value op0 is also
BLKmode and thus also a MEM: we can reach the assert for any source if
the bitsize being extracted is larger than the largest integer mode
(or larger than MAX_FIXED_MODE_SIZE).

This triggered for SVE with -msve-vector-bits=512, where we could
sometimes try to extract a BLKmode value from a 512-bit vector,
and where int_mode_for_size would rightly fail for large bitsizes.

The patch reuses the existing:

	/* Otherwise, if this is a constant or the object is not in memory
	   and need be, put it there.  */
	else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
	  {
	    memloc = assign_temp (TREE_TYPE (tem), 1, 1);
	    emit_move_insn (memloc, op0);
	    op0 = memloc;
	    clear_mem_expr = true;
	  }

to handle this case.

2018-05-29  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* expr.c (expand_expr_real_1): Force the operand into memory if
	its TYPE_MODE is BLKmode and if there is no integer mode for
	the number of bits being extracted.

gcc/testsuite/
	* gcc.target/aarch64/sve/extract_5.c: New test.

From-SVN: r261150
2018-06-04 15:02:07 +00:00
Jakub Jelinek 1fc9aa543f re PR target/85832 ([AVX512] possible shorter code when comparing with vector of zeros)
PR target/85832
	PR target/86036
	* config/i386/sse.md (<avx512>_eq<mode>3<mask_scalar_merge_name>_1):
	Use vptestnm rather than vptestm in (=Yc,v,C) variant.

	* gcc.target/i386/avx512f-pr85832.c: Expect vptestnm rather than
	vptestm.
	* gcc.target/i386/avx512vl-pr85832.c: Likewise.
	* gcc.target/i386/avx512vlbw-pr85832.c: Likewise.
	* gcc.target/i386/avx512bw-pr85832.c: Likewise.
	* gcc.target/i386/avx512bw-pr86036.c: New test.

From-SVN: r261148
2018-06-04 15:49:55 +02:00
Jason Merrill 92a38cfd77 PR c++/85765 - SFINAE and non-type default template arg.
* pt.c (type_unification_real): Do full semantic processing if
	substituting a partial args list replaces all template parms.

From-SVN: r261146
2018-06-04 09:22:52 -04:00
Richard Biener 1ccaa21f0c tree-cfgcleanup.c (cleanup_tree_cfg_1): Fold into...
2018-06-04  Richard Biener  <rguenther@suse.de>

	* tree-cfgcleanup.c (cleanup_tree_cfg_1): Fold into...
	(cleanup_tree_cfg_noloop): ... single caller.  Do
	start_recording_case_labels later.

From-SVN: r261145
2018-06-04 11:38:38 +00:00
Sebastian Peryt 5a6e3d7925 cldemoteintrin.h: Change define from _X86INTRIN_H_INCLUDED to _IMMINTRIN_H_INCLUDED.
2018-06-04  Sebastian Peryt  <sebastian.peryt@intel.com>

        * config/i386/cldemoteintrin.h: Change define from _X86INTRIN_H_INCLUDED
        to _IMMINTRIN_H_INCLUDED.
        * config/i386/pconfigintrin.h: Ditto.
        * config/i386/waitpkgintrin.h: Ditto.
        * config/i386/immintrin.h: Add includes for sgxintrin.h,
        pconfigintrin.h, waitpkgintrin.h and cldemoteintrin.h.
        * config/i386/x86intrin.h: Remove includes for mintrin.h, xmmintrin.h,
        emmintrin.h, pmmintrin.h, tmmintrin.h, smmintrin.h, wmmintrin.h,
        bmiintrin.h, bmi2intrin.h, lzcntintrin.h, sgxintrin.h, pconfigintrin.h,
        waitpkgintrin.h and cldemoteintrin.h.

From-SVN: r261144
2018-06-04 13:08:40 +02:00
Tom de Vries 7438668070 [MAINTAINERS] Remove redundant write-after-approval entries
2018-06-04  Tom de Vries  <tdevries@suse.de>

	* MAINTAINERS: Remove write-after-approval entries for component
	maintainers.

From-SVN: r261143
2018-06-04 09:30:44 +00:00
Richard Biener c77bb67446 re PR tree-optimization/86038 (ICE in to_reg_br_prob_base, at profile-count.h:242)
2018-06-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/86038
	* tracer.c (find_best_successor): Check probability for
	being initialized, bail out if not.

	* gcc.dg/pr86038.c: New testcase.

From-SVN: r261142
2018-06-04 09:28:22 +00:00
Richard Earnshaw 34a1d5c2c7 [arm] PR target/86003 build failures with --with-cpu=xscale
The XScale cpu configuration in GCC has always been somewhat
non-conforming.  Although XScale isn't an architecture (it's simply an
implementation of ARMv5te), we do by tradition emit a specific
pre-define for it.  We achieve this effect by adding an additional
feature bit to the xscale CPU definition that isn't part of the base
architecture.

When I restructured the options last year I overlooked this oddity and
the result, of course, is that this configuration now fails to build
as intended.

What happens is that the driver (correctly) constructs an architecture
for the xscale cpu name (as armv5te) and passes it in addition to the
CPU name.  The backend code, on finding both a cpu and an architecture
specifies attempts to correlate the two and finds a difference due to
the additional feature bit and reports an inconsistency (fatally if
-werror is specified).

I think the best fix to this is to treat the xscale feature bit using
the same mechanism that we use for other 'quirks' in CPU
implementations and simply filter it out before comparing the
capabilities.  It has the additional benefit that it's also the
simplest fix.

	PR target/86003
	* config/arm/arm-cpus.in (ALL_QUIRKS): Add xscale feature to the list
	of bits to ignore when comparing architectures.

From-SVN: r261140
2018-06-04 08:41:45 +00:00
Jakub Jelinek 261ef15d46 re PR tree-optimization/69615 (0 to limit signed range checks don't always use unsigned compare)
PR tree-optimization/69615
	* fold-const.c (merge_ranges): If range1 is - [x, x] and x is the
	maximum or minimum of the type, try to merge it also as if
	range1 is + [-, x - 1] or + [x + 1, -].

	* gcc.dg/pr69615.c: New test.

From-SVN: r261139
2018-06-04 09:37:56 +02:00
Jakub Jelinek 20b11fd41a re PR c++/86025 (ICE with -Wduplicated-branches and OpenMP critical)
PR c++/86025
	* tree.c (inchash::add_expr): Handle IDENTIFIER_NODE.

	* c-c++-common/gomp/pr86025.c: New test.

From-SVN: r261137
2018-06-04 09:27:52 +02:00
GCC Administrator ea4767995f Daily bump.
From-SVN: r261136
2018-06-04 00:16:42 +00:00
Andreas Schwab a194d25bbd * gcc.target/powerpc/altivec-7.c: Remove extra brace.
From-SVN: r261130
2018-06-03 17:50:29 +00:00
Jason Merrill c5f50290c7 PR c++/85739 - ICE with pointer to member template parm.
* cvt.c (perform_qualification_conversions): Use cp_fold_convert.

From-SVN: r261129
2018-06-03 08:37:03 -04:00
Eric Botcazou c14add82fa re PR tree-optimization/86034 (wrong code for bit-field manipulation at -Os)
PR tree-optimization/86034
	* gimple-ssa-store-merging.c (output_merged_store): Convert the RHS to
	the unsigned bitfield type in a bit insertion sequence if it does not
	have a larger precision than the bitfield size.
	(process_store): Also bypass widening conversions for BIT_INSERT_EXPR.

From-SVN: r261128
2018-06-03 11:51:10 +00:00
Paul Thomas 5b9a3332c2 re PR fortran/36497 (USE association, cray pointers and error checking)
2018-06-03  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/36497
	* decl.c (variable_decl): Use gfc_add_type for cray pointees.

2018-06-03  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/36497
	* gfortran.dg/cray_pointer_12.f90: New test.

From-SVN: r261127
2018-06-03 11:14:51 +00:00
Steven G. Kargl 12193bf1b0 re PR fortran/85938 (Spurious assert failure for matmul with reshaped array)
2018-06-02  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/85938
	* gfortran.dg/pr85938.f90: Fixed by revision r261081

From-SVN: r261125
2018-06-03 05:23:59 +00:00
Kito Cheng 432e70af3e [NDS32] Implement peephole2 patterns for tuning code size.
gcc/
	* config/nds32/nds32-peephole2.md: Add new patterns for code size.

From-SVN: r261124
2018-06-03 03:46:32 +00:00
Chung-Ju Wu 37d8f61108 [NDS32] Add -march=v3j.
gcc/
	* config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3J.
	* config/nds32/nds32.c (nds32_option_override): Consider ARCH_V3J.
	* config/nds32/nds32.h (TARGET_ISA_V3): Add ARCH_V3J checking.
	* config/nds32/nds32.opt (march): Add enum value Value(ARCH_V3J).

From-SVN: r261123
2018-06-03 03:26:56 +00:00
Chung-Ju Wu 1cc5910847 [NDS32] Disable -fdelete-null-pointer-checks by default for nds32*-*-elf.
gcc/
	* common/config/nds32/nds32-common.c (nds32_option_optimization_table):
	Disable -fdelete-null-pointer-checks for ELF toolchain.

From-SVN: r261122
2018-06-03 03:17:40 +00:00
Jason Merrill 57ea03ad4a PR c++/85761 - ICE with ill-formed use of const outer variable.
* expr.c (mark_use): Handle location wrappers.

From-SVN: r261121
2018-06-02 21:01:47 -04:00
GCC Administrator dd39af4425 Daily bump.
From-SVN: r261120
2018-06-03 00:16:36 +00:00
Chung-Ju Wu cf3cd43d5a [NDS32] Support Linux target for nds32.
gcc/
	* config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt.
	(nds32le-*-*, nds32be-*-*): Integrate checking process.
	(nds32*-*-*): Add glibc and uclibc conditions.
	* common/config/nds32/nds32-common.c (nds32_except_unwind_info): New.
	(TARGET_EXCEPT_UNWIND_INFO): Define.
	* config/nds32/elf.h: New file.
	* config/nds32/linux.h: New file.
	* config/nds32/nds32-elf.opt: New file.
	* config/nds32/nds32-linux.opt: New file.
	* config/nds32/nds32-fp-as-gp.c
	(pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.c (nds32_conditional_register_usage): Consider
	TARGET_LINUX_ABI.
	(nds32_asm_file_end): Ditto.
	(nds32_print_operand): Ditto.
	(nds32_insert_attributes): Ditto.
	(nds32_init_libfuncs): New function.
	(TARGET_HAVE_TLS): Define.
	(TARGET_INIT_LIBFUNCS): Define.
	* config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax
	spec content.
	(TARGET_ELF): Apply different mcmodel setting.
	(LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has
	been migrated into elf.h and linux.h files.
	* config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI.
	(mcmodel): The content has been migrated into nds32-elf.opt and
	nds32-linux.opt files.
	* config/nds32/t-elf: New file.
	* config/nds32/t-linux: New file.

libgcc/
	* config.host (nds32*-linux*): New.
	* config/nds32/linux-atomic.c: New file.
	* config/nds32/linux-unwind.h: New file.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r261116
2018-06-02 14:22:12 +00:00