164224 Commits

Author SHA1 Message Date
Jeff Law
cd1bef27d2 Updated stack-clash implementation supporting 64k probes.
This patch implements the use of the stack clash mitigation for aarch64.
In Aarch64 we expect both the probing interval and the guard size to be 64KB
and we enforce them to always be equal.

We also probe up by 1024 bytes in the general case when a probe is required.

AArch64 has the following probing conditions:

 1a) Any initial adjustment less than 63KB requires no probing.  An ABI defined
     safe buffer of 1Kbytes is used and a page size of 64k is assumed.

  b) Any final adjustment residual requires a probe at SP + 1KB.
     We know this to be safe since you would have done at least one page worth
     of allocations already to get to that point.

  c) Any final adjustment more than remainder (total allocation amount) larger
     than 1K - LR offset requires a probe at SP.


  safe buffer mentioned in 1a is maintained by the storing of FP/LR.
  In the case of -fomit-frame-pointer we can still count on LR being stored
  if the function makes a call, even if it's a tail call.  The AArch64 frame
  layout code guarantees this and tests have been added to check against
  this particular case.

 2) Any allocations larger than 1 page size, is done in increments of page size
    and probed up by 1KB leaving the residuals.

 3a) Any residual for initial adjustment that is less than guard-size - 1KB
     requires no probing.  Essentially this is a sliding window.  The probing
     range determines the ABI safe buffer, and the amount to be probed up.

Incrementally allocating less than the probing thresholds, e.g. recursive functions will
not be an issue as the storing of LR counts as a probe.


                            +-------------------+                                    
                            |  ABI SAFE REGION  |                                    
                  +------------------------------                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
 maximum amount   |         |                   |                                    
 not needing a    |         |                   |                                    
 probe            |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |                                    
                  |         |                   |        Probe offset when           
                  |         ---------------------------- probe is required           
                  |         |                   |                                    
                  +-------- +-------------------+ --------  Point of first probe     
                            |  ABI SAFE REGION  |                                    
                            ---------------------                                    
                            |                   |                                    
                            |                   |                                    
                            |                   |                                         

Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Target was tested with stack clash on and off by default.

GLIBC testsuite also ran with stack clash on by default and no new
regressions.


Co-Authored-By: Richard Sandiford <richard.sandiford@linaro.org>
Co-Authored-By: Tamar Christina <tamar.christina@arm.com>

From-SVN: r264747
2018-10-01 12:49:35 +00:00
Tamar Christina
041bfa6f07 Fix caching of tests for multiple variant runs and update existing target-supports tests.
Currently some target supports checks such as vect_int cache their
results in a manner that would cause them not to be rechecked when
running the same tests against a different variant in a multi variant
run.  This causes tests to be skipped or run when they shouldn't be.

there is already an existing caching mechanism in place that does the
caching correctly, but presumably these weren't used because some of these
tests originally only contained static data. e.g. only checked if the target is
aarch64*-*-* etc.

This patch changes every function that needs to do any caching at all to use
check_cached_effective_target which will cache per variant instead of globally.

For those tests that already parameterize over et_index I have created
check_cached_effective_target_indexed to handle this common case by creating a list
containing the property name and the current value of et_index.

These changes result in a much simpler implementation for most tests and a large
reduction in lines for target-supports.exp.

Regtested on
  aarch64-none-elf
  x86_64-pc-linux-gnu
  powerpc64-unknown-linux-gnu
  arm-none-eabi

and no testsuite errors. Difference would depend on your site.exp.
On arm we get about 4500 new testcases and on aarch64 the low 10s.
On PowerPC and x86_64 no changes as expected since the default exp for these
just test the default configuration.

What this means for new target checks is that they should always use either
check_cached_effective_target or check_cached_effective_target_indexed if the
result of the check is to be cached.

As an example the new vect_int looks like

proc check_effective_target_vect_int { } {
    return [check_cached_effective_target_indexed <name> {
      expr {
         <condition>
	}}]
}

The debug information that was once there is now all hidden in
check_cached_effective_target, (called from check_cached_effective_target_indexed)
and so the only thing you are required to do is give it a unique cache name and a condition.

The condition doesn't need to be an if statement so simple boolean expressions are enough here:

         [istarget i?86-*-*] || [istarget x86_64-*-*]
         || ([istarget powerpc*-*-*]
	     && ![istarget powerpc-*-linux*paired*])
         || ...

From-SVN: r264745
2018-10-01 12:34:05 +00:00
MCC CS
03cc70b5f1 re PR tree-optimization/87261 (Optimize bool expressions)
2018-10-01  MCC CS <deswurstes@users.noreply.github.com>

	PR tree-optimization/87261
	* match.pd: Remove trailing whitespace.
	Add (x & y) | ~(x | y) -> ~(x ^ y),
	(~x | y) ^ (x ^ y) -> x | ~y and (x ^ y) | ~(x | y) -> ~(x & y)

	* gcc.dg/pr87261.c: New test.

From-SVN: r264744
2018-10-01 11:25:45 +00:00
Eric Botcazou
6cc430c19a c-ada-spec.c (get_underlying_decl): Get to the main type variant.
* c-ada-spec.c (get_underlying_decl): Get to the main type variant.
	(dump_ada_node): Add const keyword.

From-SVN: r264738
2018-10-01 09:39:28 +00:00
Claudiu Zissulescu
e04108c727 [ARC] Avoid specific constants to end in limm field.
Avoid constants to end up in the limm field for particular
instructions when compiling for size.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (*add_n): Clean up pattern, update instruction
	constraints.
	(ashlsi3_insn): Update instruction constraints.
	(ashrsi3_insn): Likewise.
	(rotrsi3): Likewise.
	(add_shift): Likewise.
	* config/arc/constraints.md (Csz): New 32 bit constraint. It
	avoids placing in the limm field small constants which, otherwise,
	could end into a small instruction.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/tph_addx.c: New test.

From-SVN: r264737
2018-10-01 11:37:46 +02:00
Claudiu Zissulescu
97e1d32c5e [ARC] Check for odd-even register when emitting double mac ops.
gcc/
	Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (maddsidi4_split): Don't use dmac if the
	destination register is not odd-even.
	(umaddsidi4_split): Likewise.

gcc/testsuite/
	Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/tmac-3.c: New file.

From-SVN: r264736
2018-10-01 11:37:33 +02:00
Richard Biener
796a2bb274 tree-inline.c (expand_call_inline): Store origin of fn in BLOCK_ABSTRACT_ORIGIN for the inline BLOCK.
2018-10-01  Richard Biener  <rguenther@suse.de>

	* tree-inline.c (expand_call_inline): Store origin of fn
	in BLOCK_ABSTRACT_ORIGIN for the inline BLOCK.
	* tree.c (block_ultimate_origin): Simplify and do some
	checking.

From-SVN: r264734
2018-10-01 07:48:51 +00:00
Alexandre Oliva
cb8c960e44 [Ada] use -gnatd_A to disable .ali on -fcompare-debug recompile
for  gcc/ada/ChangeLog

	* gcc-interface/lang-specs.h (default_compilers): When given
	fcompare-debug-second, adjust auxbase like cc1, and pass
	gnatd_A.
	* gcc-interface/misc.c (flag_compare_debug): Remove variable.
	(gnat_post_options): Do not set it.
	* lib-writ.adb (flag_compare_debug): Remove import.
	(Write_ALI): Do not test it.

From-SVN: r264732
2018-10-01 00:27:45 +00:00
GCC Administrator
f89d27f2c3 Daily bump.
From-SVN: r264731
2018-10-01 00:16:42 +00:00
Uros Bizjak
b38ab29fe9 mmx.md (EMMS): New int iterator.
* config/i386/mmx.md (EMMS): New int iterator.
	(emms): New int attribute.
	(mmx_<emms>): Macroize insn from *mmx_emms and *mmx_femms using
	EMMS int iterator.  Explicitly declare clobbers.
	(mmx_emms): Remove expander.
	(mmx_femms): Ditto.
	* config/i386/predicates.md (emms_operation): Remove predicate.
	(vzeroall_pattern): New predicate.
	(vzeroupper_pattern): Rename from vzeroupper_operation.
	* config/i386/i386.c (ix86_avx_u128_mode_after): Use
	vzeroupper_pattern and vzeroall_pattern predicates.

From-SVN: r264727
2018-10-01 00:13:36 +02:00
Peter Bergner
0df92803a9 re PR rtl-optimization/86939 (IRA incorrectly creates an interference between a pseudo register and a hard register)
gcc/
	PR rtl-optimization/86939
	* ira-lives.c (make_hard_regno_born): Rename from this...
	(make_hard_regno_live): ... to this.  Remove update to conflict
	information.  Update function comment.
	(make_hard_regno_dead): Add conflict information update.  Update
	function comment.
	(make_object_born): Rename from this...
	(make_object_live): ... to this.  Remove update to conflict information.
	Update function comment.
	(make_object_dead):  Add conflict information update.  Update function
	comment.
	(mark_pseudo_regno_live): Call make_object_live.
	(mark_pseudo_regno_subword_live): Likewise.
	(mark_hard_reg_dead): Update function comment.
	(mark_hard_reg_live): Call make_hard_regno_live.
	(process_bb_node_lives): Likewise.
	* lra-lives.c (make_hard_regno_born): Rename from this...
	(make_hard_regno_live): ... to this.  Remove update to conflict
	information.  Remove now uneeded check_pic_pseudo_p argument.
	Update function comment.
	(make_hard_regno_dead): Add check_pic_pseudo_p argument and add update
	to conflict information.  Update function comment.
	(mark_pseudo_live): Remove update to conflict information.  Update
	function comment.
	(mark_pseudo_dead): Add conflict information update.
	(mark_regno_live): Call make_hard_regno_live.
	(mark_regno_dead): Call make_hard_regno_dead with new arguement.
	(process_bb_lives): Call make_hard_regno_live and make_hard_regno_dead.

From-SVN: r264726
2018-09-30 15:03:14 -05:00
Paul Thomas
a086078b8f re PR fortran/87359 (pointer being freed was not allocated)
2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/87359
	* trans-array.c (gfc_is_reallocatable_lhs): Correct the problem
	introduced by r264358, which prevented components of associate
	names from being reallocated on assignment.


2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/87359
	* gfortran.dg/associate_40.f90 : New test.

From-SVN: r264725
2018-09-30 13:52:55 +00:00
Paul Thomas
ba08c70a0c re PR fortran/70752 (Incorrect LEN for ALLOCATABLE CHARACTER)
2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/70752
	PR fortran/72709
	* trans-array.c (gfc_conv_scalarized_array_ref): If this is a
	deferred type and the info->descriptor is present, use the
	info->descriptor
	(gfc_conv_array_ref): Is the se expr is a descriptor type, pass
	it as 'decl' rather than the symbol backend_decl.
	(gfc_array_allocate): If the se string_length is a component
	reference, fix it and use it for the expression string length
	if the latter is not a variable type. If it is a variable do
	an assignment. Make use of component ref string lengths to set
	the descriptor 'span'.
	(gfc_conv_expr_descriptor): For pointer assignment, do not set
	the span field if gfc_get_array_span returns zero.
	* trans.c (get_array_span): If the upper bound a character type
	is zero, use the descriptor span if available.


2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/70752
	PR fortran/72709
	* gfortran.dg/deferred_character_25.f90 : New test.
	* gfortran.dg/deferred_character_26.f90 : New test.
	* gfortran.dg/deferred_character_27.f90 : New test to verify
	that PR82617 remains fixed.

From-SVN: r264724
2018-09-30 12:22:07 +00:00
Gerald Pfeifer
f1525dd4b4 messages.xml: Switch link to www.oracle.com to https.
* doc/xml/manual/messages.xml: Switch link to www.oracle.com
	to https.

From-SVN: r264723
2018-09-30 11:41:31 +00:00
Gerald Pfeifer
8b3f158946 policy_data_structures_biblio.xml: Update link to Microsoft Component Model Object Technologies.
* doc/xml/manual/policy_data_structures_biblio.xml: Update
	link to Microsoft Component Model Object Technologies.

From-SVN: r264722
2018-09-30 10:53:14 +00:00
Paul Thomas
8ba60ec434 re PR fortran/70149 ([F08] Character pointer initialization causes ICE)
2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/70149
	* trans-decl.c (gfc_get_symbol_decl): A deferred character
	length pointer that is initialized needs the string length to
	be initialized as well.

2018-09-30  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/70149
	* gfortran.dg/deferred_character_24.f90 : New test.

From-SVN: r264721
2018-09-30 07:02:49 +00:00
GCC Administrator
5e8b5d90ca Daily bump.
From-SVN: r264720
2018-09-30 00:16:20 +00:00
H.J. Lu
bdfbaa72c5 i386: Use TImode for BLKmode values in 2 integer registers
When passing and returning BLKmode values in 2 integer registers, use
1 TImode register instead of 2 DImode registers. Otherwise, V1TImode
may be used to move and store such BLKmode values, which prevent RTL
optimizations.

gcc/

	PR target/87370
	* config/i386/i386.c (construct_container): Use TImode for
	BLKmode values in 2 integer registers.

gcc/testsuite/

	PR target/87370
	* gcc.target/i386/pr87370.c: New test.

From-SVN: r264716
2018-09-29 14:59:59 -07:00
Paul Thomas
29a94bf97d re PR fortran/65677 (Incomplete assignment on deferred-length character variable)
2018-09-29  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/65667
	* trans-expr.c (gfc_trans_assignment_1): If there is dependency
	fix the rse stringlength.

2018-09-29  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/65667
	* gfortran.dg/dependency_52.f90 : New test.

From-SVN: r264715
2018-09-29 17:17:09 +00:00
Jeff Law
7d583f4259 builtins.c (unterminated_array): Pass in c_strlen_data * to c_strlen rather than just a tree *.
* builtins.c (unterminated_array): Pass in c_strlen_data * to
	c_strlen rather than just a tree *.
	(c_strlen): Change NONSTR argument to a c_strlen_data pointer.
	Update recursive calls appropriately.  If caller did not provide a
	suitable data pointer, create a local one.  When a non-terminated
	string is discovered, bubble up information about the string via the
	c_strlen_data object.
	* builtins.h (c_strlen): Update prototype.
	(c_strlen_data): New structure.
	* gimple-fold.c (get_range_strlen): Update calls to c_strlen.
	For a type 2 call, if c_strlen indicates a non-terminated string
	use the length of the non-terminated string.
	(gimple_fold_builtin_stpcpy): Update calls to c_strlen.

From-SVN: r264712
2018-09-29 10:06:09 -06:00
Jakub Jelinek
23bce99cbe re PR target/87467 (Incorrect function parameter for _mm512_abs_pd in include/avx512fintrin.h)
PR target/87467
	* config/i386/avx512fintrin.h (_mm512_abs_pd, _mm512_mask_abs_pd): Use
	__m512d type for __A argument rather than __m512.

	* gcc.target/i386/avx512f-abspd-1.c (SIZE): Divide by two.
	(CALC): Use double instead of float.
	(TEST): Adjust to test _mm512_abs_pd and _mm512_mask_abs_pd rather than
	_mm512_abs_ps and _mm512_mask_abs_ps.

From-SVN: r264711
2018-09-29 18:04:09 +02:00
Gerald Pfeifer
15f8a37755 fdl-1.3.xml: The Free Software Foundation web site now uses https.
* doc/xml/gnu/fdl-1.3.xml: The Free Software Foundation web
	site now uses https. Also omit the unnecessary trailing slash.
	* doc/xml/gnu/gpl-3.0.xml: Ditto.

From-SVN: r264710
2018-09-29 11:25:57 +00:00
GCC Administrator
26b0a30641 Daily bump.
From-SVN: r264709
2018-09-29 00:16:19 +00:00
John David Anglin
400bc5261e match.pd (simple_comparison): Don't optimize if either operand is a function pointer when...
* match.pd (simple_comparison): Don't optimize if either operand is
	a function pointer when target needs function pointer canonicalization.

From-SVN: r264705
2018-09-28 23:13:10 +00:00
Segher Boessenkool
68cf2892df rs5000: Delete all specific asm_cpu_* and ASM_CPU_*_SPEC
Now that e.g. ASM_CPU_POWER5_SPEC is always "-mpower5" it is clearer and
easier to just write that directly.


	* config/rs6000/driver-rs6000.c (asm_names): Adjust the entries for
	power5 .. power9 to remove indirection.
	* config/rs6000/rs6000.h (ASM_CPU_POWER5_SPEC, ASM_CPU_POWER6_SPEC,
	ASM_CPU_POWER7_SPEC, ASM_CPU_POWER8_SPEC, ASM_CPU_POWER9_SPEC,
	ASM_CPU_476_SPEC): Delete.
	(ASM_CPU_SPEC): Adjust.
	(EXTRA_SPECS): Delete asm_cpu_power5, asm_cpu_power6, asm_cpu_power7,
	asm_cpu_power8, asm_cpu_power9, asm_cpu_476.

From-SVN: r264704
2018-09-29 00:30:45 +02:00
Segher Boessenkool
f0ca30bf14 rs6000: Delete HAVE_AS_DCI
Every supported assembler supports these instructions.  Committing.


	* config.in: Delete HAVE_AS_DCI.
	* config/powerpcspe/powerpcspe.h: Treat HAVE_AS_DCI as always true.
	* config/rs6000/rs6000.h: Ditto.
	* configure.ac: Delete HAVE_AS_DCI.
	* configure: Regenerate.

From-SVN: r264703
2018-09-29 00:02:17 +02:00
Segher Boessenkool
2660fecc0c rs6000: Delete HAVE_AS_LWSYNC and TARGET_LWSYNC_INSTRUCTION
All supported assemblers know lwsync, so we never need to generate this
instruction using the .long escape hatch.


	* config.in (HAVE_AS_LWSYNC): Delete.
	* config/powerpcspe/powerpcspe.h (TARGET_LWSYNC_INSTRUCTION): Delete.
	* config/powerpcspe/sync.md (*lwsync): Always generate lwsync, never
	do it as a .long .
	* config/rs6000/rs6000.h (TARGET_LWSYNC_INSTRUCTION): Delete.
	* config/rs6000/sync.md (*lwsync): Always generate lwsync, never do it
	as a .long .
	* configure.ac: Delete HAVE_AS_LWSYNC.
	* configure: Regenerate.

From-SVN: r264702
2018-09-28 23:50:34 +02:00
Eric Botcazou
44662f681e calls.c (expand_call): Try to do a tail call for thunks at -O0 too.
* calls.c (expand_call): Try to do a tail call for thunks at -O0 too.
	* cgraph.h (struct cgraph_thunk_info): Add indirect_offset.
	(cgraph_node::create_thunk): Add indirect_offset parameter.
	(thunk_adjust): Likewise.
	* cgraph.c (cgraph_node::create_thunk): Add indirect_offset parameter
	and initialize the corresponding field with it.
	(cgraph_node::dump): Dump indirect_offset field.
	* cgraphclones.c (duplicate_thunk_for_node): Deal with indirect_offset.
	* cgraphunit.c (cgraph_node::analyze): Be prepared for external thunks.
	(thunk_adjust): Add indirect_offset parameter and deal with it.
	(cgraph_node::expand_thunk): Deal with the indirect_offset field and
	pass it to thunk_adjust.  Do not call the target hook if it's non-zero
	or if the thunk is external or local.  Fix formatting.  Do not chain
	the RESULT_DECL to BLOCK_VARS.  Pass the static chain to the target,
	if any, in the GIMPLE representation.
	* ipa-icf.c (sem_function::equals_wpa): Deal with indirect_offset.
	* lto-cgraph.c (lto_output_node): Write indirect_offset field.
	(input_node): Read indirect_offset field.
	* tree-inline.c (expand_call_inline): Pass indirect_offset field in the
	call to thunk_adjust.
	* tree-nested.c (struct nesting_info): Add thunk_p field.
	(create_nesting_tree): Set it.
	(convert_all_function_calls): Copy static chain from targets to thunks.
	(finalize_nesting_tree_1): Return early for thunks.
	(unnest_nesting_tree_1): Do not finalize thunks.
	(gimplify_all_functions): Do not gimplify thunks.
cp/
	* method.c (use_thunk): Adjust call to cgraph_node::create_thunk.
ada/
	* gcc-interface/decl.c (is_cplusplus_method): Do not require C++
	convention on Interfaces.
	* gcc-interface/trans.c (Subprogram_Body_to_gnu): Try to create a
	bona-fide thunk and hand it over to the middle-end.
	(get_controlling_type): New function.
	(use_alias_for_thunk_p): Likewise.
	(thunk_labelno): New static variable.
	(make_covariant_thunk): New function.
	(maybe_make_gnu_thunk): Likewise.
	* gcc-interface/utils.c (finish_subprog_decl): Set DECL_CONTEXT of the
	result DECL here instead of...
	(end_subprog_body): ...here.

Co-Authored-By: Pierre-Marie de Rodat <derodat@adacore.com>

From-SVN: r264701
2018-09-28 21:20:53 +00:00
François Dumont
5c441345a3 functions.h (__foreign_iterator_aux3(const _Safe_iterator<>&, const _InputeIter&, const _InputIter&, __true_type)): Use empty() rather than begin() == end().
2018-09-28  François Dumont  <fdumont@gcc.gnu.org>

	* include/debug/functions.h
	(__foreign_iterator_aux3(const _Safe_iterator<>&, const _InputeIter&,
	const _InputIter&, __true_type)): Use empty() rather than begin() ==
	end().

From-SVN: r264699
2018-09-28 20:26:29 +00:00
David Malcolm
a0bdbb09bb opt-suggestions.c: fix minor memory leak
gcc/ChangeLog:
	* opt-suggestions.c (option_proposer::build_option_suggestions):
	Release "option_values".

From-SVN: r264698
2018-09-28 17:49:48 +00:00
David Malcolm
ed2d9d3720 dumpfile.c: use prefixes other than 'note: ' for MSG_{OPTIMIZED_LOCATIONS|MISSED_OPTIMIZATION}
As noted at Cauldron, dumpfile.c currently emits "note: " for all kinds
of dump message, so that (after filtering) there's no distinction between
MSG_OPTIMIZED_LOCATIONS vs MSG_NOTE vs MSG_MISSED_OPTIMIZATION in the
textual output.

This patch changes dumpfile.c so that the "note: " varies to show
which MSG_* was used, with the string prefix matching that used for
filtering in -fopt-info, hence e.g.
  directive_unroll_3.f90:24:0: optimized: loop unrolled 7 times
and:
  pr19210-1.c:24:3: missed: missed loop optimization: niters analysis ends up with assumptions.

The patch adds "dg-optimized" and "dg-missed" directives for use
in the testsuite for matching these (with -fopt-info on stderr; they
don't help for dumpfile output).

The patch also converts the various problem-reporting dump messages
in coverage.c:get_coverage_counts to use MSG_MISSED_OPTIMIZATION
rather than MSG_OPTIMIZED_LOCATIONS, as the docs call out "optimized"
as
  "information when an optimization is successfully applied",
whereas "missed" is for
  "information about missed optimizations",
and problems with profile data seem to me to fall much more into the
latter category than the former.  Doing so requires converting a few
tests from using "-fopt-info" (which is implicitly
"-fopt-info-optimized-optall") to getting the "missed" optimizations.
Changing them to "-fopt-info-missed" added lots of noise from the
vectorizer, so I changed these tests to use "-fopt-info-missed-ipa".

gcc/ChangeLog:
	* coverage.c (get_coverage_counts): Convert problem-reporting dump
	messages from MSG_OPTIMIZED_LOCATIONS to MSG_MISSED_OPTIMIZATION.
	* dumpfile.c (kind_as_string): New function.
	(dump_loc): Rather than a hardcoded prefix of "note: ", use
	kind_as_string to vary the prefix based on dump_kind.
	(selftest::test_capture_of_dump_calls): Update for above.

gcc/testsuite/ChangeLog:
	* c-c++-common/unroll-1.c: Update expected output from "note" to
	"optimized".
	* c-c++-common/unroll-2.c: Likewise.
	* c-c++-common/unroll-3.c: Likewise.
	* g++.dg/tree-ssa/dom-invalid.C: Update expected output from
	dg-message to dg-missed.  Convert param from -fopt-info to
	-fopt-info-missed-ipa.
	* g++.dg/tree-ssa/pr81408.C: Update expected output from
	dg-message to dg-missed.
	* g++.dg/vect/slp-pr56812.cc: Update expected output from
	dg-message to dg-optimized.
	* gcc.dg/pr26570.c: Update expected output from dg-message to
	dg-missed.  Convert param from -fopt-info to
	-fopt-info-missed-ipa.
	* gcc.dg/pr32773.c: Likewise.
	* gcc.dg/tree-ssa/pr19210-1.c: Update expected output from
	dg-message to dg-missed.
	* gcc.dg/unroll-2.c: Update expected output from dg-message to
	dg-optimized.
	* gcc.dg/vect/nodump-vect-opt-info-1.c: Likewise.  Convert param
	from -fopt-info to -fopt-info-vec.
	* gfortran.dg/directive_unroll_1.f90: Update expected output from
	"note" to "optimized".
	* gfortran.dg/directive_unroll_2.f90: Likewise.
	* gfortran.dg/directive_unroll_3.f90: Likewise.
	* gnat.dg/unroll4.adb: Likewise.
	* lib/gcc-dg.exp (dg-optimized): New procedure.
	(dg-missed): New procedure.

From-SVN: r264697
2018-09-28 17:40:04 +00:00
Joseph Myers
5718d9d95f Fix gcc.dg/torture/fp-int-convert.h for excess precision after PR c/87390.
As reported in
<https://gcc.gnu.org/ml/gcc-patches/2018-09/msg01684.html>, some
fp-int-convert tests fail after my fix for PR c/87390, in Arm /
AArch64 configurations where _Float16 uses excess precision by
default.  The issue is comparisons of the results of a conversion by
assignment (compile-time or run-time) from integer to floating-point
with the original integer value; previously this would compare against
an implicit compile-time conversion to the target type, but now, for
C11 and later, it compares against an implicit compile-time conversion
to a possibly wider evaluation format.  This is fixed by adding casts
to the test so that the comparison is with a value converted
explicitly to the target type at compile time, without any use of a
wider evaluation format.

	PR c/87390
	* gcc.dg/torture/fp-int-convert.h (TEST_I_F_VAL): Convert integer
	values explicitly to target type for comparison.

From-SVN: r264696
2018-09-28 16:45:51 +01:00
Uros Bizjak
02469d3a1d i386.h (SSE_REGNO): Fix check for FIRST_REX_SSE_REG.
* config/i386/i386.h (SSE_REGNO): Fix check for FIRST_REX_SSE_REG.
	(GET_SSE_REGNO): Rename from SSE_REGNO.  Update all uses for rename.

From-SVN: r264695
2018-09-28 17:30:46 +02:00
Uros Bizjak
adb67ffba8 i386.h (CC_REGNO): Remove FPSR_REGS.
* config/i386/i386.h (CC_REGNO): Remove FPSR_REGS.
	* config/i386/i386.c (ix86_fixed_condition_code_regs): Use
	INVALID_REGNUM instead of FPSR_REG.
	(ix86_md_asm_adjust): Do not clobber FPSR_REG.
	* config/i386/i386.md: Update comment of FP compares.
	(fldenv): Do not clobber FPSR_REG.

From-SVN: r264694
2018-09-28 17:15:57 +02:00
Steve Ellcey
713e9ce2c7 Fix date in ChangeLog file.
From-SVN: r264693
2018-09-28 14:46:21 +00:00
Steve Ellcey
a8b4e6c45a re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and gcc.target/aarch64/ashltidisi.c tests fail after combine two to two instruction patch on aarch64)
2018-09-28  Steve Ellcey  <sellcey@cavium.com>

	PR testsuite/87433
	* gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
	instead of 4.

From-SVN: r264692
2018-09-28 14:44:15 +00:00
Steve Ellcey
259cd78a20 re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and gcc.target/aarch64/ashltidisi.c tests fail after combine two to two instruction patch on aarch64)
2018-09-28  Steve Ellcey  <sellcey@cavium.com>

	PR testsuite/87433
	* gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.

From-SVN: r264691
2018-09-28 14:41:45 +00:00
Ian Lance Taylor
20a73a1947 compiler: fix parsing issue with non-ASCII first package char
Fix a bug in the parser code that decides whether a given name should
    be considered exported or not. The function Lex::is_exported_name
    (which assumes that its input is a mangled name) was being called on
    non-mangled (raw utf-8) names in various places. For the bug in
    question this caused an imported package to be registered under the
    wrong name. To fix the issue, rename 'Lex::is_exported_name' to
    'Lex::is_exported_mangled_name', and add a new 'Lex::is_exported_name'
    that works on utf-8 strings.
    
    Fixes golang/go#27836.
    
    Reviewed-on: https://go-review.googlesource.com/137736

From-SVN: r264690
2018-09-28 13:50:44 +00:00
Richard Biener
dc16b00717 tree.h (BLOCK_ORIGIN): New.
2018-09-28  Richard Biener  <rguenther@suse.de>

	* tree.h (BLOCK_ORIGIN): New.
	* omp-expand.c (grid_expand_target_grid_body): Assign
	BLOCK_ORIGIN to BLOCK_ABSTRACT_ORIGIN.
	* tree-inline.c (remap_block): Likewise.

	* auto-profile.c (get_function_decl_from_block): Simplify
	by eliding the BLOCK_ABSTRACT_ORIGIN chasing.
	* langhooks.c (lhd_print_error_function): Likewise.
	* optinfo-emit-json.cc (optrecord_json_writer::inlining_chain_to):
	Likewise.
	* tree-ssa-live.c (remove_unused_scope_block_p): Likewise.
	* tree.c (block_nonartificial_location): Likewise.
	(block_ultimate_origin): Likewise.
	* tree-pretty-print.c (percent_K_format): Likewise.  Remove
	no longer needed LTO case.

	cp/
	* error.c (cp_print_error_function): Simplify by eliding
	the BLOCK_ABSTRACT_ORIGIN chasing.

From-SVN: r264689
2018-09-28 11:33:29 +00:00
Andrew Stubbs
2bd4ca7ad5 Simplify vec_merge according to the mask.
This patch was part of the original patch we acquired from Honza and Martin.

It simplifies nested vec_merge operations using the same mask.

Self-tests are included.

2018-09-28  Andrew Stubbs  <ams@codesourcery.com>
	    Jan Hubicka  <jh@suse.cz>
	    Martin Jambor  <mjambor@suse.cz>

	* simplify-rtx.c (simplify_merge_mask): New function.
	(simplify_ternary_operation): Use it, also see if VEC_MERGEs with the
	same masks are used in op1 or op2.
	(test_vec_merge): New function.
	(test_vector_ops): Call test_vec_merge.

Co-Authored-By: Jan Hubicka <jh@suse.cz>
Co-Authored-By: Martin Jambor <mjambor@suse.cz>

From-SVN: r264688
2018-09-28 10:54:34 +00:00
Eric Botcazou
227efe8700 sparc-protos.h (sparc_branch_cost): Declare.
* config/sparc/sparc-protos.h (sparc_branch_cost): Declare.
	* config/sparc/sparc.h (BRANCH_COST): Call sparc_branch_cost.
	* config/sparc/sparc.c (struct processor_costs): Add branch_cost field.
	(cypress_costs): Set it.
	(supersparc_costs): Likewise.
	(hypersparc_costs): Likewise.
	(leon_cost): Likewise.
	(leon3_costs): Likewise.
	(sparclet_costs): Likewise.
	(ultrasparc_costs): Likewise.
	(ultrasparc_costs): Likewise.
	(niagara_costs): Likewise.
	(niagara2_costs): Likewise.
	(niagara3_costs): Likewise.
	(niagara4_costs): Likewise.
	(niagara7_costs): Likewise.
	(m8_costs): Likewise.
	(TARGET_CAN_FOLLOW_JUMP): Define.
	(pass_work_around_errata::gate): Minor tweak.
	(sparc_option_override): Remove MASK_FSMULD mask for V7 processors.
	Do not set both MASK_VIS4 and MASK_VIS4B for M8 processor.
	Automaitcally clear MASK_FSMULD mask for V7 processors.
	(sparc_can_follow_jump): New static function.
	(output_ubranch): Deal with CROSSING_JUMP_P.
	(sparc_use_sched_lookahead): Rewrite using switch statement.
	(sparc_issue_rate): Reorder.
	(sparc_branch_cost): New function.

From-SVN: r264687
2018-09-28 08:47:20 +00:00
GCC Administrator
7847bfcbb8 Daily bump.
From-SVN: r264685
2018-09-28 00:16:43 +00:00
Segher Boessenkool
c057b53a37 rs6000: Fix one more vec_splat case
This fixes the one remaining case where the stricter vec_splat checking
complains in the testsuite.


	* g++.dg/ext/altivec-6.C: Change the vec_splat second argument to a
	valid value, in the "vector bool int" case.

From-SVN: r264681
2018-09-28 00:56:37 +02:00
Martin Sebor
73ca9fb5df tree.h (tree_to_shwi): Add attribute nonnull and pure.
gcc/ChangeLog:

	* tree.h (tree_to_shwi): Add attribute nonnull and pure.
	(tree_to_poly_int64, tree_to_uhwi, tree_to_poly_uint64): Same.
	(int_fits_type_p): Same.

gcc/ada/ChangeLog:

	* gcc-interface/utils.c (make_packable_type): Introduce a temporary
	to avoid -Wnonnull.
	(unchecked_convert): Same.

From-SVN: r264680
2018-09-27 16:55:23 -06:00
Jinsong Ji
f20ac63787 mmintrin.h (_mm_unpackhi_pi8): Change __int128_t to __int128.
2018-09-27  Jinsong Ji  <jji@us.ibm.com>
	    Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Change __int128_t
	to __int128.
	(_mm_unpacklo_pi8): Likewise.
	(_mm_add_pi8): Likewise.
	(_mm_add_pi16): Likewise.
	(_mm_add_pi32): Likewise.
	(_mm_sub_pi8): Likewise.
	(_mm_sub_pi16): Likewise.
	(_mm_sub_pi32): Likewise.
	(_mm_cmpgt_pi8): Likewise.
	(_mm_cmpeq_pi16): Likewise.
	(_mm_cmpgt_pi16): Likewise.
	(_mm_cmpeq_pi32): Likewise.
	(_mm_cmpgt_pi32): Likewise.
	(_mm_adds_pi8): Likewise.
	(_mm_adds_pi16): Likewise.
	(_mm_adds_pu8): Likewise.
	(_mm_adds_pu16): Likewise.
	(_mm_subs_pi8): Likewise.
	(_mm_subs_pi16): Likewise.
	(_mm_subs_pu8): Likewise.
	(_mm_subs_pu16): Likewise.
	(_mm_madd_pi16): Likewise.
	(_mm_mulhi_pi16): Likewise.
	(_mm_mullo_pi16): Likewise.
	(_mm_sll_pi16): Likewise.
	(_mm_sra_pi16): Likewise.
	(_mm_srl_pi16): Likewise.
	(_mm_set1_pi16): Likewise.
	(_mm_set1_pi8): Likewise.
	* config/rs6000/xmmintrin.h (_mm_max_pi16): Likewise.
	(_mm_max_pu8): Likewise.
	(_mm_min_pi16): Likewise.
	(_mm_min_pu8): Likewise.

From-SVN: r264678
2018-09-27 20:48:53 +00:00
Uros Bizjak
f3f518f2d8 i386.md (UNSPEC_FLDCW): Remove.
* config/i386/i386.md (UNSPEC_FLDCW): Remove.

From-SVN: r264677
2018-09-27 22:21:06 +02:00
Uros Bizjak
eaa17c21ba i386.md (FPSR_REG): Remove.
* config/i386/i386.md (FPSR_REG): Remove.
	(x86_fnstcw_1): Use (const_int 0) instead of FPCR_REG.
	(x86_fldcw_1): Remove insn pattern.
	(fnstenv): Do not clobber FPCR_REG.
	(fldenv): Ditto.
	* config/i386/i386.h (FIXED_REGISTERS) Remove fpsr register.
	(CALL_USED_REGISTERS): Ditto.
	(REG_ALLOC_ORDER): Ditto.
	(REG_CLASS_CONTENTS): Ditto.
	(HI_REGISTER_NAMES): Ditto.
	(ADDITIONAL_REGISTER_NAMES): Use defines instead
	of numerical constants.
	* config/i386/i386.c (regclass_map): Remove fpsr register.
	(dbx_register_map): Ditto.
	(dbx64_register_map): Ditto.
	(svr4_dbx_register_map): Ditto.
	(print_reg): Do not handle FPCR_REG.

testsuite/ChangeLog:

	* gcc.dg/rtl/x86_64/dfinit.c: Update scan-rtl-dump string.
	* gcc.dg/rtl/x86_64/times-two.c.before-df.c: Ditto.
	* gcc.target/i386/pr79804.c (foo): Use register "19", not "20".

From-SVN: r264676
2018-09-27 22:04:15 +02:00
Segher Boessenkool
24676f1215 rs6000: Delete many HAVE_AS_* (PR87149)
This deletes most HAVE_AS_* that determine if the assembler supports
some ISA level (and also HAVE_AS_MFPGPR and HAVE_AS_DFP).

These are not useful: we will only generate an instruction that requires
some newer ISA if the user specifically asked for it (with -mcpu=, say).
If the assembler cannot handle that, it is fine if it gives an error.

They also hurt: it increases the number of possible situations that all
need handling and all need testing.  We do not handle all cases, and
obviously do not test all either.

This patch removes:

HAVE_AS_POPCNTB (power5,  2.02)
HAVE_AS_FPRND   (power5+, 2.04)
HAVE_AS_CMPB    (power6,  2.05)
HAVE_AS_POPCNTD (power7,  2.06)
HAVE_AS_POWER8  (power8,  2.07)
HAVE_AS_POWER9  (power9,  3.0)

HAVE_AS_DFP     (power6,  2.05, server)
HAVE_AS_MFPGPR  (power6x but not later, not arch)


	PR target/87149
	* config.in (HAVE_AS_CMPB, HAVE_AS_DFP, HAVE_AS_FPRND, HAVE_AS_MFPGPR,
	HAVE_AS_POPCNTB, HAVE_AS_POPCNTD, HAVE_AS_POWER8, HAVE_AS_POWER9):
	Delete, always treat as true.
	* config/powerpcspe/powerpcspe.c (rs6000_option_override_internal):
	Ditto.  Simplify remaining code.
	* config/powerpcspe/powerpcspe.h: Ditto.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Ditto.
	Simplify remaining code.
	(rs6000_expand_builtin): Ditto.
	* config/rs6000/rs6000.h: Ditto.
	* configure.ac: Ditto.
	* configure: Regenerate.

From-SVN: r264675
2018-09-27 21:54:09 +02:00
Martin Liska
8830704064 coverage.c (get_coverage_counts): Revert the formatting of missing profile opt info.
2018-09-27  Martin Liska  <mliska@suse.cz>

	* coverage.c (get_coverage_counts): Revert the formatting
	of missing profile opt info.

	* g++.dg/pr60518.C: Add -Wno-missing-profile.
	* g++.dg/torture/pr59265.C: Likewise.
	* g++.dg/tree-prof/morefunc.C: Likewise.
	* g++.dg/tree-ssa/dom-invalid.C: Likewise.
	* gcc.dg/pr26570.c: Likewise.
	* gcc.dg/pr32773.c: Likewise.
	* gcc.dg/pr40209.c: Likewise.
	* gcc.dg/pr51957-1.c: Likewise.
	* gcc.dg/pr80747.c: Likewise.
	* gcc.target/aarch64/pr62262.c: Likewise.

From-SVN: r264669
2018-09-27 14:53:35 +00:00
Richard Biener
b88da9bbd8 re PR debug/87451 (FAIL: gcc.dg/debug/dwarf2/inline5.c)
2018-09-27  Richard Biener  <rguenther@suse.de>

	PR testsuite/87451
	* gcc.dg/debug/dwarf2/inline5.c: Deal with different comment characters.

From-SVN: r264668
2018-09-27 14:17:52 +00:00