2011-08-11 Richard Guenther <rguenther@suse.de>
PR middle-end/50040
* gimplify.c (gimplify_modify_expr_complex_part): Mark the
load of the other piece with TREE_NO_WARNING.
* tree-flow.h (warn_uninit): Adjust prototype.
* tree-ssa.c (warn_uninit): Take uninitialized SSA name,
the base variable and the expression that is used separately.
Properly query all TREE_NO_WARNING flags.
(struct walk_data): Remove.
(warn_uninitialized_var): Likewise.
(warn_uninitialized_vars): Do not walk gimple pieces but simply
look at all SSA uses of the statement. Handle unused memory
separately.
* tree-ssa-uninit.c (warn_uninitialized_phi): Adjust.
* g++.dg/warn/unit-1.C: Un-XFAIL.
* gcc.dg/uninit-I.c: Likewise.
From-SVN: r177667
* config/rx/rx.md (movsicc): Allow register to register
transfers.
(*movsicc): Likewise.
(*stcc): Restrict this pattern to EQ and NE compares.
(*stcc_reg): New pattern. Works for any comparison but only for
register transfers.
From-SVN: r177665
2011-08-11 Sergey Grechanik <mouseentity@ispras.ru>
* sel-sched-ir.c (get_seqno_of_a_pred): Rename to
get_seqno_for_a_jump. Update the caller.
(get_seqno_by_succs): New. Use it ...
(get_seqno_for_a_jump): ... here to find a seqno if looking at
predecessors was not sufficient.
(get_seqno_by_preds): Include head in iteration range, exclude insn.
From-SVN: r177660
2011-08-11 Sergey Grechanik <mouseentity@ispras.ru>
* sel-sched-ir.c (has_dependence_note_reg_use): Call ds_full_merge
only if producer writes to the register given by regno.
From-SVN: r177658
2011-08-11 Sergey Grechanik <mouseentity@ispras.ru>
Alexander Monakov <amonakov@ispras.ru>
* sched-deps.c (sched_get_condition_with_rev): Rename to ...
(sched_get_condition_with_rev_uncached): ... this. Factor out
condition caching logic into ...
(sched_get_condition_with_rev): ... this. Reimplement. Do not
attempt to use cache for instructions with zero luid.
(sched_analyze_insn): Use INSN_CACHED_COND instead of INSN_COND.
* sched-int.h (INSN_COND): Rename to INSN_CACHED_COND.
Co-Authored-By: Alexander Monakov <amonakov@ispras.ru>
From-SVN: r177657
2011-08-11 Sergey Grechanik <mouseentity@ispras.ru>
* sel-sched-ir.c (get_seqno_of_a_pred): Rename to
get_seqno_for_a_jump. Update the caller.
(get_seqno_by_succs): New. Use it ...
(get_seqno_for_a_jump): ... here to find a seqno if looking at
predecessors was not sufficient.
(get_seqno_by_preds): Include head in iteration range, exclude insn.
From-SVN: r177656
gcc/
* doc/md.texi (define_bypass): Say that the instruction names can
be filename-style globs.
* Makefile.in (FNMATCH_H): Define.
(build/genattrtab.o, build/genautomata.o): Depend on $(FNMATCH_H).
* genattrtab.c: Include fnmatch.h.
(bypass_list): Change field name from "insn" to "pattern".
(gen_bypass_1): Update accordingly.
(process_bypasses): Use fnmatch to check for matches between
insn reservations and define_bypasses.
* genautomata.c: Include fnmatch.h.
(bypass_decl): Rename in_insn_name and out_insn_name to in_pattern
and out_pattern respectively.
(gen_bypass, insert_bypass): Update accordingly.
(for_each_matching_insn, process_bypass_2, process_bypass_1)
(process_bypass): New functions.
(process_decls): Use process_bypass. Update after field name changes.
From-SVN: r177649
PR target/49687
* config/avr/avr.md (smulqi3_highpart): New insn.
(umulqi3_highpart): New insn.
(*subqi3.ashiftrt7): New insn.
(smulhi3_highpart): New expander.
(umulhi3_highpart): Nex expander.
(*smulhi3_highpart_call): New insn.
(*umulhi3_highpart_call): New insn.
(extend_u): New code attribute.
(extend_prefix): Rename code attribute to extend_su.
* config/avr/avr.c (avr_rtx_costs): Report costs of highpart of
widening QI/HI multiply.
From-SVN: r177648
2011-08-10 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/sse4_1-blendps-2.c: Include <stdlib.h>.
(sse4_1_test): Initialize src3 with random value.
From-SVN: r177628
2011-08-10 Artjoms Sinkarovs <artyom.shinakroff@gmail.com>
* c-typeck.c (scalar_to_vector): New function. Try scalar to
vector conversion.
(stv_conv): New enum for scalar_to_vector return type.
(build_binary_op): Adjust.
* doc/extend.texi: Description of scalar to vector expansion.
c-family/
* c-common.c (unsafe_conversion_p): New function. Check if it is
unsafe to convert an expression to the type.
(conversion_warning): Adjust, use unsafe_conversion_p.
* c-common.h (unsafe_conversion_p): New function declaration.
testsuite/
* gcc.c-torture/execute/scal-to-vec1.c: New test.
* gcc.c-torture/execute/scal-to-vec2.c: New test.
* gcc.c-torture/execute/scal-to-vec3.c: New test.
* gcc.dg/scal-to-vec1.c: New test.
* gcc.dg/scal-to-vec2.c: New test.
From-SVN: r177622
PR target/29560
* config/avr/avr.md (*ashlhiqi3): New insn-and-split.
(*ashl<extend_prefix>qihiqi3): New insn-and-splits.
(*ashl<extend_prefix>qihiqi3.mem): New insn-and-splits.
Add peephole2 to map ashlhi3 to ashlqi3 if high part of
shift target is unused.
From-SVN: r177616
* config/i386/i386.c (ix86_emit_i387_round): New function.
* config/i386/i386-protos.h (ix86_emit_i387_round): Declare.
* config/i386/i386.md (round<mode>2): Use X87MODEF mode iterator.
Use ix86_emit_i387_round to expand round function for i387 math.
(lround<X87MODEF:mode><SWI248x:mode>2): Use X87MODEF mode iterator.
Use ix86_emit_i387_round to expand {l,ll}round function for i387 math.
From-SVN: r177605
2011-08-09 Richard Guenther <rguenther@suse.de>
* tree-vrp.c (zero_nonzero_bits_from_vr): Also return precise
information for ranges with only negative values.
(extract_range_from_binary_expr_1): Adjust BIT_IOR_EXPR and
BIT_AND_EXPR handling to handle ranges with negative values.
* gcc.dg/tree-ssa/vrp57.c: Disable CCP.
* gcc.dg/tree-ssa/vrp60.c: New testcase.
* gcc.dg/tree-ssa/vrp61.c: Likewise.
* gcc.dg/tree-ssa/vrp62.c: Likewise.
From-SVN: r177597
