PR libstdc++/78273
* include/bits/stl_map.h (map::count<_Kt>(const _Kt&)): Don't assume
the heterogeneous comparison can only find one match.
* include/bits/stl_set.h (set::count<_Kt>(const _Kt&)): Likewise.
* testsuite/23_containers/map/operations/2.cc: Test count works with
comparison function that just partitions rather than sorting.
* testsuite/23_containers/set/operations/2.cc: Likewise.
From-SVN: r244317
The files arm-cores.def, arm-fpus.def and arm-arches.def are parsed and
used in several places and the format is slightly awkward to maintain
as they must be parsable in C and by certain scripts. Furthermore,
changes to the content that affects every entry is particularly awkward for
dealing with merges.
This patch replaces all three files with a single file that specifies all
the command-line related definitions in a new format that allows for better
checking for consistency as well as (hopefully) easier to merge changes.
The awk script used to parse it is relatively complicated, but should be
pretty portable. It works by parsing in all the data and then operating
one of a number of possible sub-commands to generate the desired output.
The new method picked up one error. The CPU descriptions referred to an
architecture ARMv5tej which was not supported by -march. This has been
fixed by adding the relevant entry to the architecture list.
gcc:
* config.gcc: Use new awk script to check CPU, FPU and architecture
parameters for --with-... options.
* config/arm/parsecpu.awk: New file
* config/arm/arm-cpus.in: New file.
* config/arm/arm-opts.h: Include arm-cpu.h instead of processing .def
files.
* config/arm/arm.c: Include arm-cpu-data.h instead of processing .def
files.
* config/arm/t-arm: Update dependency rules.
* common/config/arm/arm-common.c: Include arm-cpu-cdata.h instead
of processing .def files.
* config/arm/genopt.sh: Deleted.
* config/arm/gentune.sh: Deleted.
* config/arm/arm-cores.def: Deleted.
* config/arm/arm-arches.def: Deleted.
* config/arm/arm-fpus.def: Deleted.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-cpu.h: New generated file.
* config/arm/arm-cpu-data.h: New generated file.
* config/arm/arm-cpu-cdata.h: New generated file.
Contrib:
* gcc_update: Adjust touch list.
From-SVN: r244316
PR rtl-optimization/79032
* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
the alignment of the adjusted memory reference against that of MODE,
instead of the alignment of the original memory reference.
From-SVN: r244311
Reduce the size of variant, it doesn't need an index of
type size_t internally.
* include/std/variant (parse_numbers.h): New include.
(__select_index): New.
(_Variant_storage<false, _Types...>::_M_reset_impl): Use
_index_type for comparison with variant_npos.
(_Variant_storage<false, _Types...>::__index_type): New.
(_Variant_storage<false, _Types...>::_M_index): Change the
type from size_t to __index_type.
(_Variant_storage<true, _Types...>::__index_type): New.
(_Variant_storage<true, _Types...>::_M_index): Change the
type from size_t to __index_type.
(_Variant_base::_M_valid): Use _Storage::__index_type
for comparison with variant_npos.
(variant::index): Use _Base::_Storage::__index_type
for comparison with variant_npos.
* testsuite/20_util/variant/index_type.cc: New.
From-SVN: r244309
2017-01-11 Richard Biener <rguenther@suse.de>
* tree-vrp.c (evrp_dom_walker::before_dom_children): Also
set range/nonnull info for PHI results. Do not set it on
stmts marked for removal.
* gcc.dg/tree-ssa/pr61743-1.c: Adjust.
From-SVN: r244305
* expr.c (store_field): In the bitfield case, fetch the return value
from the registers before applying a single big-endian adjustment.
Always do a final load for a BLKmode value not larger than a word.
From-SVN: r244299
PR c++/77949 identifies an ICE when the C++ frontend attempts to emit a
fix-it hint inserting a missing semicolon at column 4097 of a source file.
This column value exceeds LINE_MAP_MAX_COLUMN_NUMBER and hence isn't
representable using a location_t.
Attempting to do so leads to these problems, which this patch fixes:
(a) when encountering a column number > LINE_MAP_MAX_COLUMN_NUMBER we
create a new linemap with m_column_and_range_bits == 0, but
linemap_position_for_column doesn't check for this, and hence can emit
a bogus location_t value that's calculated relative to the previous
linemap start, but which will be decoded relative to the new linemap,
leading to very large incorrect line values.
(b) when encountering a column number that can't be represented, and
for which the linemap was pre-existing, the code would hit this assertion:
if (linemap_assert_fails (column < (1u << map->m_column_and_range_bits)))
around a bail-out condition. The patch replaces this assertion with a
simple conditional, to stop the ICE when this occurs, and fixes the
bit count (effective column bits, vs column+range bits)
(c) the C++ frontend wasn't checking for failure of
linemap_position_for_loc_and_offset when considering emitting the fix-it
hint. The patch adds a conditional, so that no fix-it hint is emitted
if the location is bogus.
gcc/cp/ChangeLog:
PR c++/77949
* parser.c (cp_parser_class_specifier_1): Only suggest inserting
a missing semicolon if we have a valid insertion location for
the fix-it hint.
gcc/ChangeLog:
PR c++/77949
* input.c (selftest::test_accessing_ordinary_linemaps): Verify
that we correctly handle column numbers greater than
LINE_MAP_MAX_COLUMN_NUMBER.
gcc/testsuite/ChangeLog:
PR c++/77949
* g++.dg/diagnostic/pr77949.C: New test case.
libcpp/ChangeLog:
PR c++/77949
* line-map.c (linemap_position_for_column): When calling
linemap_start_line, detect if a new linemap was created with
0 column bits, and bail out early if this is the case.
(linemap_position_for_loc_and_offset): Replace overzealous
linemap_assert_fails with a simple conditional; use correct
bit count.
From-SVN: r244292
I looked at a diff of proc.go between Go 1.7 and gccgo, and copied
over all the easy stuff.
Reviewed-on: https://go-review.googlesource.com/35090
From-SVN: r244291
2017-01-10 Joe Seymour <joe.s@somniumtech.com>
* config/msp430/driver-msp430.c (msp430_mcu_data): Sync with data
from TI's devices.csv file as of September 2016.
* config/msp430/msp430.c (msp430_mcu_data): Likewise.
From-SVN: r244289
2016-01-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/79034
* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
Propagate out degenerate PHIs in the joiner.
* g++.dg/torture/pr79034.C: New testcase.
From-SVN: r244274
Call _M_extract_* functions family through temporary int objects, so
it doesn't convert from lvalue to rvalue through a temporary in AVR
because of the incompatible types used in AVR-Libc.
This fixes compilation errors with AVR-Libc while compiling libstdc++
for AVR target.
2017-01-10 Felipe Magno de Almeida <felipe@expertisesolutions.com.br>
* include/bits/locale_facets_nonio.tcc
(time_get::_M_extract_via_format): Avoid compilation errors with
non-standard struct tm.
From-SVN: r244271
2017-01-10 François Dumont <fdumont@gcc.gnu.org>
Jonathan Wakely <jwakely@redhat.com>
* python/libstdcxx/v6/printers.py (_versioned_namespace): Define.
(is_specialization, strip_versioned_namespace): New helpers functions
to work with symbols in the versioned namespace.
(Printer.add_version): Add second name using versioned namespace.
(add_one_template_type_printer, add_one_type_printer): Add second
type printers using versioned namespace.
(register_type_printers): Add template type printer for basic_string.
(build_libstdcxx_dictionary): Remove dead code.
* python/libstdcxx/v6/xmethods.py: Make all matchers look for
versioned namespace.
* testsuite/libstdc++-prettyprinters/48362.cc: Adjust expected
results.
* testsuite/libstdc++-prettyprinters/whatis.cc: Likewise.
Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r244262
Drop the size arguments for the hash/equal functions stored in type
descriptors. Types know what size they are. To make this work,
generate hash/equal functions for types that can use an identity
comparison but are not a standard size and alignment.
Drop the multiplications by 33 in the generated hash code and the
reflect package hash code. They are not necessary since we started
passing a seed value around, as the seed includes the hash of the
earlier values.
Copy the algorithms for standard types from the Go 1.7 runtime,
replacing the C functions.
Reviewed-on: https://go-review.googlesource.com/34983
From-SVN: r244256
* expr.c (store_field): In the bitfield case, if the value comes from
a function call and is of an aggregate type returned in registers, do
not modify the field mode; extract the value in all cases if the mode
is BLKmode and the size is not larger than a word.
From-SVN: r244249
PR tree-optimization/79007
PR tree-optimization/67955
* tree-ssa-alias.c (same_addr_size_stores_p): Only need to be
conservative for pt.null when flag_non_call_exceptions is on.
From-SVN: r244247
PR tree-optimization/78899
* tree-if-conv.c (version_loop_for_if_conversion): Instead of
returning bool return struct loop *, NULL for failure and the new
loop on success.
(versionable_outer_loop_p): Don't version outer loop if it has
dont_vectorized bit set.
(tree_if_conversion): When versioning outer loop, ensure
tree_if_conversion is performed also on the inner loop of the
non-vectorizable outer loop copy.
* tree-vectorizer.c (set_uid_loop_bbs): Formatting fix. Fold
LOOP_VECTORIZED in inner loop of the scalar outer loop and
prevent vectorization of it.
(vectorize_loops): For outer + inner LOOP_VECTORIZED, ensure
the outer loop vectorization of the non-scalar version is attempted
before vectorization of the inner loop in scalar version. If
outer LOOP_VECTORIZED guarded loop is not vectorized, prevent
vectorization of its inner loop.
* tree-vect-loop-manip.c (rename_variables_in_bb): If outer_loop
has 2 inner loops, rename also on edges from bb whose single pred
is outer_loop->header. Fix typo in function comment.
* gcc.target/i386/pr78899.c: New test.
* gcc.dg/pr71077.c: New test.
From-SVN: r244238
