Commit Graph

159074 Commits

Author SHA1 Message Date
Bill Schmidt b50e164942 rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps.
[gcc]

2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
	-mspeculate-indirect-jumps.
	* config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
	for -mno-speculate-indirect-jumps.
	(*call_indirect_elfv2<mode>_nospec): New define_insn.
	(*call_value_indirect_elfv2<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_value_indirect_elfv2<mode>_nospec): New define_insn.
	(indirect_jump): Emit different RTL for
	-mno-speculate-indirect-jumps.
	(*indirect_jump<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*indirect_jump<mode>_nospec): New define_insn.
	(tablejump): Emit different RTL for
	-mno-speculate-indirect-jumps.
	(tablejumpsi): Disable for -mno-speculate-indirect-jumps.
	(tablejumpsi_nospec): New define_expand.
	(tablejumpdi): Disable for -mno-speculate-indirect-jumps.
	(tablejumpdi_nospec): New define_expand.
	(*tablejump<mode>_internal1): Disable for
	-mno-speculate-indirect-jumps.
	(*tablejump<mode>_internal1_nospec): New define_insn.
	* config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
	option.

[gcc/testsuite]

2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/safe-indirect-jump-1.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-2.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-3.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-4.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-5.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-6.c: New file.

From-SVN: r256753
2018-01-16 16:49:39 +00:00
Artyom Skrobov 8fc0c8fae0 caller-save.c (insert_save): Drop unnecessary parameter.
* caller-save.c (insert_save): Drop unnecessary parameter.  All
	callers updated.

From-SVN: r256751
2018-01-16 09:28:36 -07:00
Jakub Jelinek 47c268c4b2 re PR libgomp/83590 ([nvptx] openacc reduction C regressions)
PR libgomp/83590
	* gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
	return early, inline manually is_gimple_sizepos.  Make sure if we
	call gimplify_expr we don't end up with a gimple constant.
	* tree.c (variably_modified_type_p): Don't return true for
	is_gimple_constant (_t).  Inline manually is_gimple_sizepos.
	* gimplify.h (is_gimple_sizepos): Remove.

Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r256748
2018-01-16 16:18:24 +01:00
Richard Sandiford fb2f98bb6c Two fixes for live-out SLP inductions (PR 83857)
vect_analyze_loop_operations was calling vectorizable_live_operation
for all live-out phis, which led to a bogus ncopies calculation in
the pure SLP case.  I think v_a_l_o should only be passing phis
that are vectorised using normal loop vectorisation, since
vect_slp_analyze_node_operations handles the SLP side (and knows
the correct slp_index and slp_node arguments to pass in, via
vect_analyze_stmt).

With that fixed we hit an older bug that vectorizable_live_operation
didn't handle live-out SLP inductions.  Fixed by using gimple_phi_result
rather than gimple_get_lhs for phis.

2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	PR tree-optimization/83857
	* tree-vect-loop.c (vect_analyze_loop_operations): Don't call
	vectorizable_live_operation for pure SLP statements.
	(vectorizable_live_operation): Handle PHIs.

gcc/testsuite/
	PR tree-optimization/83857
	* gcc.dg/vect/pr83857.c: New test.

From-SVN: r256747
2018-01-16 15:13:32 +00:00
Richard Biener e57d9a8299 re PR tree-optimization/83867 (ICE: Segmentation fault in nested_in_vect_loop_p)
2018-01-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/83867
	* tree-vect-stmts.c (vect_transform_stmt): Precompute
	nested_in_vect_loop_p since the scalar stmt may get invalidated.

	* gcc.dg/vect/pr83867.c: New testcase.

From-SVN: r256746
2018-01-16 15:13:05 +00:00
Jakub Jelinek 38943500ba re PR c/83844 (ICE with warn_if_not_aligned attribute)
PR c/83844
	* stor-layout.c (handle_warn_if_not_align): Use byte_position and
	multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
	If off is not INTEGER_CST, issue a may not be aligned warning
	rather than isn't aligned.  Use isn%'t rather than isn't.
	* fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
	into MULT_EXPR.
	<case MULT_EXPR>: Improve the case when bottom and one of the
	MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
	operand, in that case check if the other operand is multiple of
	bottom divided by the INTEGER_CST operand.

	* gcc.dg/pr83844.c: New test.

From-SVN: r256745
2018-01-16 16:08:32 +01:00
Richard Sandiford 42b394ff00 Move pa.h FUNCTION_ARG_SIZE to pa.c (PR83858)
The port-local FUNCTION_ARG_SIZE:

  ((((MODE) != BLKmode \
     ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
     : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

is used by code in pa.c and by ASM_DECLARE_FUNCTION_NAME in som.h.
Treating GET_MODE_SIZE as a constant is OK for the former but not
the latter, which is used in target-independent code.  This caused
a build failure on hppa2.0w-hp-hpux11.11.

2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	PR target/83858
	* config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
	* config/pa/pa-protos.h (pa_function_arg_size): Declare.
	* config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
	pa_function_arg_size instead of FUNCTION_ARG_SIZE.
	* config/pa/pa.c (pa_function_arg_advance): Likewise.
	(pa_function_arg, pa_arg_partial_bytes): Likewise.
	(pa_function_arg_size): New function.

From-SVN: r256744
2018-01-16 14:47:49 +00:00
Segher Boessenkool 859116618e Fix whitespace in changelog
From-SVN: r256743
2018-01-16 14:42:46 +01:00
Richard Sandiford 0dffe6b829 Fix changelog
From-SVN: r256741
2018-01-16 12:49:24 +00:00
Richard Sandiford 3c869ac305 Avoid GCC 4.1 build failure in fold-const.c
We had:

	      tree t = fold_vec_perm (type, arg1, arg2,
				      vec_perm_indices (sel, 2, nelts));

where fold_vec_perm takes a const vec_perm_indices &.  GCC 4.1 apparently
required a public copy constructor:

gcc/vec-perm-indices.h:85: error: 'vec_perm_indices::vec_perm_indices(const vec_perm_indices&)' is private
gcc/fold-const.c:11410: error: within this context

even though no copy should be made here.  This patch tries to work
around that by constructing the vec_perm_indices separately.

2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
	in a separate statement.

From-SVN: r256740
2018-01-16 12:44:37 +00:00
Jonathan Wakely cce6078d2b PR libstdc++/83834 replace wildcard pattern in linker script
PR libstdc++/83834
	* config/abi/pre/gnu.ver (GLIBCXX_3.4): Replace std::c[a-g]* wildcard
	pattern with exact match for std::cerr.

From-SVN: r256739
2018-01-16 12:43:08 +00:00
Sebastian Perta 182f27e352 * MAINTAINERS (write after approval): Add myself.
From-SVN: r256738
2018-01-16 12:23:39 +00:00
Richard Sandiford 82279a515e Don't group gather loads (PR83847)
In the testcase we were trying to group two gather loads, even though
that isn't supported.  Fixed by explicitly disallowing grouping of
gathers and scatters.

This problem didn't show up on SVE because there we convert to
IFN_GATHER_LOAD/IFN_SCATTER_STORE pattern statements, which fail
the can_group_stmts_p check.

2018-01-16  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-data-refs.c (vect_analyze_data_ref_accesses):

gcc/testsuite/
	* gcc.dg/torture/pr83847.c: New test.

From-SVN: r256730
2018-01-16 09:28:26 +00:00
Jakub Jelinek 9064759767 re PR rtl-optimization/83620 (ICE: in assign_by_spills, at lra-assigns.c:1470: unable to find a register to spill with -flive-range-shrinkage --param=max-sched-ready-insns=0)
PR rtl-optimization/86620
	* params.def (max-sched-ready-insns): Bump minimum value to 1.

	* gcc.dg/pr64935-2.c: Use --param=max-sched-ready-insns=1
	instead of --param=max-sched-ready-insns=0.
	* gcc.target/i386/pr83620.c: New test.
	* gcc.dg/pr83620.c: New test.

From-SVN: r256729
2018-01-16 09:55:14 +01:00
Jakub Jelinek 6ce065b607 re PR rtl-optimization/83213 (peephole bug with -O2)
PR rtl-optimization/83213
	* recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
	to last if both are JUMP_INSNs.

From-SVN: r256728
2018-01-16 09:54:03 +01:00
Jakub Jelinek be52ac73d1 re PR tree-optimization/83843 (wrong code at -O2)
PR tree-optimization/83843
	* gimple-ssa-store-merging.c
	(imm_store_chain_info::output_merged_store): Handle bit_not_p on
	store_immediate_info for bswap/nop orig_stores.

	* gcc.dg/store_merging_18.c: New test.

From-SVN: r256727
2018-01-16 09:53:09 +01:00
Jakub Jelinek 2bbc5c34e4 re PR c++/83817 (internal compiler error: tree check: expected call_expr, have aggr_init_expr in tsubst_copy_and_build, at cp/pt.c:17822)
PR c++/83817
	* pt.c (tsubst_copy_and_build) <case CALL_EXPR>: If function
	is AGGR_INIT_EXPR rather than CALL_EXPR, set AGGR_INIT_FROM_THUNK_P
	instead of CALL_FROM_THUNK_P.

	* g++.dg/cpp1y/pr83817.C: New test.

From-SVN: r256726
2018-01-16 09:44:48 +01:00
Jakub Jelinek 774ae645c0 re PR c++/83825 (ICE on invalid C++ code with shadowed identifiers: in operator[], at vec.h:826)
PR c++/83825
	* name-lookup.c (member_vec_dedup): Return early if len is 0.
	(resort_type_member_vec, set_class_bindings,
	insert_late_enum_def_bindings): Use vec qsort method instead of
	calling qsort directly.

	* g++.dg/template/pr83825.C: New test.

From-SVN: r256725
2018-01-16 09:43:31 +01:00
Richard Biener 206c8300ca pr83435.c: Restrict to target pthread.
2018-01-16  Richard Biener  <rguenther@suse.de>

	* gcc.dg/graphite/pr83435.c: Restrict to target pthread.

From-SVN: r256724
2018-01-16 08:08:35 +00:00
Richard Biener 453ec1ad7a re PR testsuite/82132 (FAIL: gcc.dg/vect/vect-tail-nomask-1.c (test for excess errors) due to missing posix_memalign)
2018-01-16  Richard Biener  <rguenther@suse.de>

	PR testsuite/82132
	* gcc.dg/vect/vect-tail-nomask-1.c: Copy posix_memalign boiler-plate
	from gcc.dg/torture/pr60092.c.

From-SVN: r256723
2018-01-16 08:04:28 +00:00
Andrew Waterman ff3cc569b2 RISC-V: Increase mult/div cost if not implemented in hardware.
2018-01-15  Andrew Waterman  <andrew@sifive.com>
	gcc/
	* config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
	!TARGET_MUL.
	<UDIV>: Increase cost if !TARGET_DIV.

From-SVN: r256722
2018-01-15 19:03:09 -08:00
Martin Sebor 66a366a05a PR c++/83588 - struct with two flexible arrays causes an internal compiler error
gcc/cp/ChangeLog:

	PR c++/83588
	* class.c (find_flexarrays): Make a record of multiple flexible array
	members.

gcc/testsuite/ChangeLog:

	PR c++/83588
	* g++.dg/ext/flexary28.C: New test.

From-SVN: r256721
2018-01-15 20:02:34 -07:00
Louis Krupp 75a3c61ae4 re PR fortran/82257 (f951: Internal compiler error segmentation fault)
2018-01-15  Louis Krupp  <louis.krupp@zoho.com>

	PR fortran/82257
	* interface.c (compare_rank): Don't try to retrieve CLASS_DATA
	from symbol marked unlimited polymorphic.
	* resolve.c (resolve_structure_cons): Likewise.
	* misc.c (gfc_typename): Don't dereference derived->components
	if it's NULL.

2018-01-15  Louis Krupp  <louis.krupp@zoho.com>

	PR fortran/82257
	* gfortran.dg/unlimited_polymorphic_28.f90: New test.

From-SVN: r256720
2018-01-16 01:09:11 +00:00
GCC Administrator c662b64cf9 Daily bump.
From-SVN: r256719
2018-01-16 00:16:24 +00:00
Segher Boessenkool 34ef07452f rs6000: Delete "delayed_cr" insn type
"delayed_cr" is just "cr_logical" with the second source operand not
equal to the destination operand.  This patch changes it to be
expressed as type "cr_logical", with a new boolean attribute
"cr_logical_3op" added.  This simplifies code.


	* config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
	(define_attr "cr_logical_3op"): New.
	(cceq_ior_compare): Adjust.
	(cceq_ior_compare_complement): Adjust.
	(*cceq_rev_compare): Adjust.
	* config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
	(is_cracked_insn): Adjust.
	(insn_must_be_first_in_group): Adjust.
	* config/rs6000/40x.md: Adjust.
	* config/rs6000/440.md: Adjust.
	* config/rs6000/476.md: Adjust.
	* config/rs6000/601.md: Adjust.
	* config/rs6000/603.md: Adjust.
	* config/rs6000/6xx.md: Adjust.
	* config/rs6000/7450.md: Adjust.
	* config/rs6000/7xx.md: Adjust.
	* config/rs6000/8540.md: Adjust.
	* config/rs6000/cell.md: Adjust.
	* config/rs6000/e300c2c3.md: Adjust.
	* config/rs6000/e500mc.md: Adjust.
	* config/rs6000/e500mc64.md: Adjust.
	* config/rs6000/e5500.md: Adjust.
	* config/rs6000/e6500.md: Adjust.
	* config/rs6000/mpc.md: Adjust.
	* config/rs6000/power4.md: Adjust.
	* config/rs6000/power5.md: Adjust.
	* config/rs6000/power6.md: Adjust.
	* config/rs6000/power7.md: Adjust.
	* config/rs6000/power8.md: Adjust.
	* config/rs6000/power9.md: Adjust.
	* config/rs6000/rs64.md: Adjust.
	* config/rs6000/titan.md: Adjust.

From-SVN: r256716
2018-01-16 00:02:03 +01:00
H.J. Lu 894c144ca2 i386: Rewrite indirect_branch_operand logic
* config/i386/predicates.md (indirect_branch_operand): Rewrite
	ix86_indirect_branch_register logic.

From-SVN: r256715
2018-01-15 14:36:42 -08:00
H.J. Lu 4a5a0497ba Don't check ix86_indirect_branch_register for GOT operand
Since GOT_memory_operand and GOT32_symbol_operand are simple pattern
matches, don't check ix86_indirect_branch_register here.  If needed,
-mindirect-branch= will convert indirect branch via GOT slot to a call
and return thunk.

	* config/i386/constraints.md (Bs): Update
	ix86_indirect_branch_register check.  Don't check
	ix86_indirect_branch_register with GOT_memory_operand.
	(Bw): Likewise.
	* config/i386/predicates.md (GOT_memory_operand): Don't check
	ix86_indirect_branch_register here.
	(GOT32_symbol_operand): Likewise.

From-SVN: r256714
2018-01-15 14:35:36 -08:00
H.J. Lu 5ca876c398 i386: Rewrite ix86_indirect_branch_register logic
Rewrite ix86_indirect_branch_register logic with

(and (not (match_test "ix86_indirect_branch_register"))
     (original condition before r256662))

	* config/i386/predicates.md (constant_call_address_operand):
	Rewrite ix86_indirect_branch_register logic.
	(sibcall_insn_operand): Likewise.

From-SVN: r256713
2018-01-15 14:32:37 -08:00
H.J. Lu e71cf74a5d i386: Rename to ix86_indirect_branch_register
Rename the variable for -mindirect-branch-register to
ix86_indirect_branch_register to match the command-line option name.

	* config/i386/constraints.md (Bs): Replace
	ix86_indirect_branch_thunk_register with
	ix86_indirect_branch_register.
	(Bw): Likewise.
	* config/i386/i386.md (indirect_jump): Likewise.
	(tablejump): Likewise.
	(*sibcall_memory): Likewise.
	(*sibcall_value_memory): Likewise.
	Peepholes of indirect call and jump via memory: Likewise.
	* config/i386/i386.opt: Likewise.
	* config/i386/predicates.md (indirect_branch_operand): Likewise.
	(GOT_memory_operand): Likewise.
	(call_insn_operand): Likewise.
	(sibcall_insn_operand): Likewise.
	(GOT32_symbol_operand): Likewise.

From-SVN: r256712
2018-01-15 14:29:41 -08:00
Jakub Jelinek b4e47472c9 re PR middle-end/83837 (libgomp.fortran/pointer[12].f90 FAIL)
PR middle-end/83837
	* omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
	type rather than type addr's type points to.
	(expand_omp_atomic_mutex): Likewise.
	(expand_omp_atomic): Likewise.

From-SVN: r256710
2018-01-15 22:47:11 +01:00
Martin Sebor 732ed80aa3 PR testsuite/83869 - c-c++-common/attr-nonstring-3.c fails starting with r256683
testsuite/CHangeLog:
	* c-c++-common/attr-nonstring-3.c: Work around bug c++/74762.

From-SVN: r256709
2018-01-15 14:45:06 -07:00
Jonathan Wakely 8b3085e7e8 PR libstdc++/83833 fix chi_squared_distribution::param(const param&)
PR libstdc++/83833
	* include/bits/random.h (chi_squared_distribution::param): Update
	gamma distribution parameter.
	* testsuite/26_numerics/random/chi_squared_distribution/83833.cc: New
	test.

From-SVN: r256708
2018-01-15 19:58:22 +00:00
Ian Lance Taylor 97a78e3396 compiler: reclaim memory of escape analysis Nodes
Reclaim the memory of escape analysis Nodes before kicking off
    the backend, as they are not needed in get_backend.
    
    Reviewed-on: https://go-review.googlesource.com/86243

From-SVN: r256707
2018-01-15 19:35:44 +00:00
Ian Lance Taylor 7c3bc15e4a compiler: make sure variables captured by defer closure live
Local variables captured by the deferred closure need to be live
    until the function finishes, especially when the deferred
    function runs. In Function::build, for function that has a defer,
    we wrap the function body in a try block. So the backend sees
    the local variables only live in the try block, without knowing
    that they are needed also in the finally block where we invoke
    the deferred function. Fix this by creating top-level
    declarations for non-escaping address-taken locals when there
    is a defer.
    
    An example of miscompilation without this CL:
    
    func F(fn func()) {
            didPanic := true
            defer func() {
                    println(didPanic)
            }()
            fn()
            didPanic = false
    }
    
    With escape analysis turned on, at optimization level -O1 or -O2,
    the store "didPanic = false" is elided by the backend's
    optimizer, presumably because it thinks "didPanic" is not live
    after the store, so the store is useless.
    
    Reviewed-on: https://go-review.googlesource.com/86241

From-SVN: r256706
2018-01-15 19:13:47 +00:00
Thomas Koenig 64b1806b2d re PR fortran/54613 ([F08] Add FINDLOC plus support MAXLOC/MINLOC with KIND=/BACK=)
2018-01-15  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/54613
	* gfortran.h (gfc_check_f): Rename f4ml to f5ml.
	(gfc_logical_4_kind): New macro
	* intrinsic.h (gfc_simplify_minloc): Add a gfc_expr *argument.
	(gfc_simplify_maxloc): Likewise.
	(gfc_resolve_maxloc): Likewise.
	(gfc_resolve_minloc): Likewise.
	* check.c (gfc_check_minloc_maxloc): Add checking for "back"
	argument; also raise error if it is used (for now). Add it
	if it isn't present.
	* intrinsic.c (add_sym_4ml): Rename to
	(add_sym_5ml), adjust for extra argument.
	(add_functions): Add "back" constant. Adjust maxloc and minloc
	for back argument.
	* iresolve.c (gfc_resolve_maxloc): Add back argument. If back is
	not of gfc_logical_4_kind, convert.
	(gfc_resolve_minloc): Likewise.
	* simplify.c (gfc_simplify_minloc): Add back argument.
	(gfc_simplify_maxloc): Likewise.
	* trans-intinsic.c (gfc_conv_intrinsic_minmaxloc): Rename last
	argument to %VAL to ensure passing by value.
	(gfc_conv_intrinsic_function): Call gfc_conv_intrinsic_minmaxloc
	also for library calls.

2018-01-15  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/54613
	* m4/iparm.m4: Add back_arg macro if in minloc or maxloc.
	* m4/iforeach-s.m4: Add optional argument back with back_arg
	macro. Improve m4 quoting. If HAVE_BACK_ARG is defined, assert
	that back is non-true.
	* m4/iforeach.m4: Likewise.
	* m4/ifunction-s.m4: Likewise.
	* m4/ifunction.m4: Likewise.
	* m4/maxloc0.m4: Include assert.h
	* m4/minloc0.m4: Likewise.
	* m4/maxloc0s.m4: #define HAVE_BACK_ARG.
	* m4/minloc0s.m4: Likewise.
	* m4/maxloc1s.m4: Likewise.
	* m4/minloc1s.m4: Likewise.
	* m4/maxloc1.m4: Include assert.h, #define HAVE_BACK_ARG.
	* m4/minloc1.m4: Likewise.
	* m4/maxloc2s.m4: Add assert.h, add back_arg, assert that
	back is non-true.
	* m4/minloc2s.m4: Likewise.
	* generated/iall_i1.c: Regenerated.
	* generated/iall_i16.c: Regenerated.
	* generated/iall_i2.c: Regenerated.
	* generated/iall_i4.c: Regenerated.
	* generated/iall_i8.c: Regenerated.
	* generated/iany_i1.c: Regenerated.
	* generated/iany_i16.c: Regenerated.
	* generated/iany_i2.c: Regenerated.
	* generated/iany_i4.c: Regenerated.
	* generated/iany_i8.c: Regenerated.
	* generated/iparity_i1.c: Regenerated.
	* generated/iparity_i16.c: Regenerated.
	* generated/iparity_i2.c: Regenerated.
	* generated/iparity_i4.c: Regenerated.
	* generated/iparity_i8.c: Regenerated.
	* generated/maxloc0_16_i1.c: Regenerated.
	* generated/maxloc0_16_i16.c: Regenerated.
	* generated/maxloc0_16_i2.c: Regenerated.
	* generated/maxloc0_16_i4.c: Regenerated.
	* generated/maxloc0_16_i8.c: Regenerated.
	* generated/maxloc0_16_r10.c: Regenerated.
	* generated/maxloc0_16_r16.c: Regenerated.
	* generated/maxloc0_16_r4.c: Regenerated.
	* generated/maxloc0_16_r8.c: Regenerated.
	* generated/maxloc0_16_s1.c: Regenerated.
	* generated/maxloc0_16_s4.c: Regenerated.
	* generated/maxloc0_4_i1.c: Regenerated.
	* generated/maxloc0_4_i16.c: Regenerated.
	* generated/maxloc0_4_i2.c: Regenerated.
	* generated/maxloc0_4_i4.c: Regenerated.
	* generated/maxloc0_4_i8.c: Regenerated.
	* generated/maxloc0_4_r10.c: Regenerated.
	* generated/maxloc0_4_r16.c: Regenerated.
	* generated/maxloc0_4_r4.c: Regenerated.
	* generated/maxloc0_4_r8.c: Regenerated.
	* generated/maxloc0_4_s1.c: Regenerated.
	* generated/maxloc0_4_s4.c: Regenerated.
	* generated/maxloc0_8_i1.c: Regenerated.
	* generated/maxloc0_8_i16.c: Regenerated.
	* generated/maxloc0_8_i2.c: Regenerated.
	* generated/maxloc0_8_i4.c: Regenerated.
	* generated/maxloc0_8_i8.c: Regenerated.
	* generated/maxloc0_8_r10.c: Regenerated.
	* generated/maxloc0_8_r16.c: Regenerated.
	* generated/maxloc0_8_r4.c: Regenerated.
	* generated/maxloc0_8_r8.c: Regenerated.
	* generated/maxloc0_8_s1.c: Regenerated.
	* generated/maxloc0_8_s4.c: Regenerated.
	* generated/maxloc1_16_i1.c: Regenerated.
	* generated/maxloc1_16_i16.c: Regenerated.
	* generated/maxloc1_16_i2.c: Regenerated.
	* generated/maxloc1_16_i4.c: Regenerated.
	* generated/maxloc1_16_i8.c: Regenerated.
	* generated/maxloc1_16_r10.c: Regenerated.
	* generated/maxloc1_16_r16.c: Regenerated.
	* generated/maxloc1_16_r4.c: Regenerated.
	* generated/maxloc1_16_r8.c: Regenerated.
	* generated/maxloc1_16_s1.c: Regenerated.
	* generated/maxloc1_16_s4.c: Regenerated.
	* generated/maxloc1_4_i1.c: Regenerated.
	* generated/maxloc1_4_i16.c: Regenerated.
	* generated/maxloc1_4_i2.c: Regenerated.
	* generated/maxloc1_4_i4.c: Regenerated.
	* generated/maxloc1_4_i8.c: Regenerated.
	* generated/maxloc1_4_r10.c: Regenerated.
	* generated/maxloc1_4_r16.c: Regenerated.
	* generated/maxloc1_4_r4.c: Regenerated.
	* generated/maxloc1_4_r8.c: Regenerated.
	* generated/maxloc1_4_s1.c: Regenerated.
	* generated/maxloc1_4_s4.c: Regenerated.
	* generated/maxloc1_8_i1.c: Regenerated.
	* generated/maxloc1_8_i16.c: Regenerated.
	* generated/maxloc1_8_i2.c: Regenerated.
	* generated/maxloc1_8_i4.c: Regenerated.
	* generated/maxloc1_8_i8.c: Regenerated.
	* generated/maxloc1_8_r10.c: Regenerated.
	* generated/maxloc1_8_r16.c: Regenerated.
	* generated/maxloc1_8_r4.c: Regenerated.
	* generated/maxloc1_8_r8.c: Regenerated.
	* generated/maxloc1_8_s1.c: Regenerated.
	* generated/maxloc1_8_s4.c: Regenerated.
	* generated/maxval_i1.c: Regenerated.
	* generated/maxval_i16.c: Regenerated.
	* generated/maxval_i2.c: Regenerated.
	* generated/maxval_i4.c: Regenerated.
	* generated/maxval_i8.c: Regenerated.
	* generated/maxval_r10.c: Regenerated.
	* generated/maxval_r16.c: Regenerated.
	* generated/maxval_r4.c: Regenerated.
	* generated/maxval_r8.c: Regenerated.
	* generated/minloc0_16_i1.c: Regenerated.
	* generated/minloc0_16_i16.c: Regenerated.
	* generated/minloc0_16_i2.c: Regenerated.
	* generated/minloc0_16_i4.c: Regenerated.
	* generated/minloc0_16_i8.c: Regenerated.
	* generated/minloc0_16_r10.c: Regenerated.
	* generated/minloc0_16_r16.c: Regenerated.
	* generated/minloc0_16_r4.c: Regenerated.
	* generated/minloc0_16_r8.c: Regenerated.
	* generated/minloc0_16_s1.c: Regenerated.
	* generated/minloc0_16_s4.c: Regenerated.
	* generated/minloc0_4_i1.c: Regenerated.
	* generated/minloc0_4_i16.c: Regenerated.
	* generated/minloc0_4_i2.c: Regenerated.
	* generated/minloc0_4_i4.c: Regenerated.
	* generated/minloc0_4_i8.c: Regenerated.
	* generated/minloc0_4_r10.c: Regenerated.
	* generated/minloc0_4_r16.c: Regenerated.
	* generated/minloc0_4_r4.c: Regenerated.
	* generated/minloc0_4_r8.c: Regenerated.
	* generated/minloc0_4_s1.c: Regenerated.
	* generated/minloc0_4_s4.c: Regenerated.
	* generated/minloc0_8_i1.c: Regenerated.
	* generated/minloc0_8_i16.c: Regenerated.
	* generated/minloc0_8_i2.c: Regenerated.
	* generated/minloc0_8_i4.c: Regenerated.
	* generated/minloc0_8_i8.c: Regenerated.
	* generated/minloc0_8_r10.c: Regenerated.
	* generated/minloc0_8_r16.c: Regenerated.
	* generated/minloc0_8_r4.c: Regenerated.
	* generated/minloc0_8_r8.c: Regenerated.
	* generated/minloc0_8_s1.c: Regenerated.
	* generated/minloc0_8_s4.c: Regenerated.
	* generated/minloc1_16_i1.c: Regenerated.
	* generated/minloc1_16_i16.c: Regenerated.
	* generated/minloc1_16_i2.c: Regenerated.
	* generated/minloc1_16_i4.c: Regenerated.
	* generated/minloc1_16_i8.c: Regenerated.
	* generated/minloc1_16_r10.c: Regenerated.
	* generated/minloc1_16_r16.c: Regenerated.
	* generated/minloc1_16_r4.c: Regenerated.
	* generated/minloc1_16_r8.c: Regenerated.
	* generated/minloc1_16_s1.c: Regenerated.
	* generated/minloc1_16_s4.c: Regenerated.
	* generated/minloc1_4_i1.c: Regenerated.
	* generated/minloc1_4_i16.c: Regenerated.
	* generated/minloc1_4_i2.c: Regenerated.
	* generated/minloc1_4_i4.c: Regenerated.
	* generated/minloc1_4_i8.c: Regenerated.
	* generated/minloc1_4_r10.c: Regenerated.
	* generated/minloc1_4_r16.c: Regenerated.
	* generated/minloc1_4_r4.c: Regenerated.
	* generated/minloc1_4_r8.c: Regenerated.
	* generated/minloc1_4_s1.c: Regenerated.
	* generated/minloc1_4_s4.c: Regenerated.
	* generated/minloc1_8_i1.c: Regenerated.
	* generated/minloc1_8_i16.c: Regenerated.
	* generated/minloc1_8_i2.c: Regenerated.
	* generated/minloc1_8_i4.c: Regenerated.
	* generated/minloc1_8_i8.c: Regenerated.
	* generated/minloc1_8_r10.c: Regenerated.
	* generated/minloc1_8_r16.c: Regenerated.
	* generated/minloc1_8_r4.c: Regenerated.
	* generated/minloc1_8_r8.c: Regenerated.
	* generated/minloc1_8_s1.c: Regenerated.
	* generated/minloc1_8_s4.c: Regenerated.
	* generated/minval_i1.c: Regenerated.
	* generated/minval_i16.c: Regenerated.
	* generated/minval_i2.c: Regenerated.
	* generated/minval_i4.c: Regenerated.
	* generated/minval_i8.c: Regenerated.
	* generated/minval_r10.c: Regenerated.
	* generated/minval_r16.c: Regenerated.
	* generated/minval_r4.c: Regenerated.
	* generated/minval_r8.c: Regenerated.
	* generated/norm2_r10.c: Regenerated.
	* generated/norm2_r16.c: Regenerated.
	* generated/norm2_r4.c: Regenerated.
	* generated/norm2_r8.c: Regenerated.
	* generated/parity_l1.c: Regenerated.
	* generated/parity_l16.c: Regenerated.
	* generated/parity_l2.c: Regenerated.
	* generated/parity_l4.c: Regenerated.
	* generated/parity_l8.c: Regenerated.
	* generated/product_c10.c: Regenerated.
	* generated/product_c16.c: Regenerated.
	* generated/product_c4.c: Regenerated.
	* generated/product_c8.c: Regenerated.
	* generated/product_i1.c: Regenerated.
	* generated/product_i16.c: Regenerated.
	* generated/product_i2.c: Regenerated.
	* generated/product_i4.c: Regenerated.
	* generated/product_i8.c: Regenerated.
	* generated/product_r10.c: Regenerated.
	* generated/product_r16.c: Regenerated.
	* generated/product_r4.c: Regenerated.
	* generated/product_r8.c: Regenerated.
	* generated/sum_c10.c: Regenerated.
	* generated/sum_c16.c: Regenerated.
	* generated/sum_c4.c: Regenerated.
	* generated/sum_c8.c: Regenerated.
	* generated/sum_i1.c: Regenerated.
	* generated/sum_i16.c: Regenerated.
	* generated/sum_i2.c: Regenerated.
	* generated/sum_i4.c: Regenerated.
	* generated/sum_i8.c: Regenerated.
	* generated/sum_r10.c: Regenerated.
	* generated/sum_r16.c: Regenerated.
	* generated/sum_r4.c: Regenerated.
	* generated/sum_r8.c: Regenerated.

2018-01-15  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/54613
	* gfortran.dg/minmaxloc_9.f90: New test.
	* gfortran.dg/minmaxloc_10.f90: New test.
	* gfortran.dg/minmaxloc_11.f90: New test.

From-SVN: r256705
2018-01-15 18:35:13 +00:00
H.J. Lu 650d669bb4 i386: Don't use ASM_OUTPUT_DEF for TARGET_MACHO
ASM_OUTPUT_DEF isn't defined for TARGET_MACHO.  Use ASM_OUTPUT_LABEL to
generate the __x86_return_thunk label, instead of the set directive.
Update testcase to remove the __x86_return_thunk label check.  Since
-fno-pic is ignored on Darwin, update testcases to scan or "push" only
on Linux.

gcc/

	PR target/83839
	* config/i386/i386.c (output_indirect_thunk_function): Use
	ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
	for  __x86_return_thunk.

gcc/testsuite/

	PR target/83839
	* gcc.target/i386/indirect-thunk-1.c: Scan for "push" only on
	Linux.
	* gcc.target/i386/indirect-thunk-2.c: Likewise.
	* gcc.target/i386/indirect-thunk-3.c: Likewise.
	* gcc.target/i386/indirect-thunk-4.c: Likewise.
	* gcc.target/i386/indirect-thunk-7.c: Likewise.
	* gcc.target/i386/indirect-thunk-attr-1.c: Likewise.
	* gcc.target/i386/indirect-thunk-attr-2.c: Likewise.
	* gcc.target/i386/indirect-thunk-attr-5.c: Likewise.
	* gcc.target/i386/indirect-thunk-attr-6.c: Likewise.
	* gcc.target/i386/indirect-thunk-attr-7.c: Likewise.
	* gcc.target/i386/indirect-thunk-extern-1.c: Likewise.
	* gcc.target/i386/indirect-thunk-extern-2.c: Likewise.
	* gcc.target/i386/indirect-thunk-extern-3.c: Likewise.
	* gcc.target/i386/indirect-thunk-extern-4.c: Likewise.
	* gcc.target/i386/indirect-thunk-extern-7.c: Likewise.
	* gcc.target/i386/indirect-thunk-register-1.c: Likewise.
	* gcc.target/i386/indirect-thunk-register-3.c: Likewise.
	* gcc.target/i386/indirect-thunk-register-4.c: Likewise.
	* gcc.target/i386/ret-thunk-10.c: Likewise.
	* gcc.target/i386/ret-thunk-11.c: Likewise.
	* gcc.target/i386/ret-thunk-12.c: Likewise.
	* gcc.target/i386/ret-thunk-13.c: Likewise.
	* gcc.target/i386/ret-thunk-14.c: Likewise.
	* gcc.target/i386/ret-thunk-15.c: Likewise.
	* gcc.target/i386/ret-thunk-9.c: Don't check the
	__x86_return_thunk label.
	Scan for "push" only for Linux.

From-SVN: r256704
2018-01-15 10:16:01 -08:00
Jonathan Wakely b0e63d9483 PR libstdc++/83830 Define std::has_unique_object_representations_v
PR libstdc++/83830
	* include/std/type_traits (has_unique_object_representations_v): Add
	variable template.
	* testsuite/20_util/has_unique_object_representations/value.cc: Check
	variable template.

From-SVN: r256701
2018-01-15 15:02:01 +00:00
Richard Biener e8f3b70ddb re PR target/83850 (Spills on vector extract, gcc.target/i386/pr80846-1.c FAILs)
2018-01-15  Richard Biener  <rguenther@suse.de>

	PR middle-end/83850
	* expmed.c (extract_bit_field_1): Fix typo.

From-SVN: r256700
2018-01-15 14:43:52 +00:00
Richard Sandiford fc58f4ae9a Missing vect_double in gcc.dg/vect/pr79920.c (PR83836)
2018-01-15  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
	PR testsuite/79920
	* gcc.dg/vect/pr79920.c: Restrict reduction test to vect_double

From-SVN: r256698
2018-01-15 12:38:55 +00:00
Kyrylo Tkachov d0b6b5a7b4 [arm] PR target/83687: Fix invalid combination of VSUB + VABS into VABD
In this wrong-code bug we combine a VSUB.I8 and a VABS.S8
into a VABD.S8 instruction . This combination is not valid
for integer operands because in the VABD instruction the semantics
are that the difference is computed in notionally infinite precision
and the absolute difference is computed on that, whereas for a
VSUB.I8 + VABS.S8 sequence the VSUB operation will perform any
wrapping that's needed for the 8-bit signed type before the VABS
gets its hands on it.

This leads to the wrong-code in the PR where the expected
sequence from the intrinsics:
VSUB + VABS of two vectors {-100, -100, -100...}, {100, 100, 100...}
gives a result of {56, 56, 56...} (-100 - 100)

but GCC optimises it into a single
VABD of {-100, -100, -100...}, {100, 100, 100...}
which produces a result of {200, 200, 200...}

The transformation is still valid for floating-point operands,
which is why it was added in the first place I believe (r178817)
but this patch disables it for integer operands.
The HFmode variants though only exist for TARGET_NEON_FP16INST, so
this patch adds the appropriate guards to the new mode iterator

Bootstrapped and tested on arm-none-linux-gnueabihf.

	PR target/83687
	* config/arm/iterators.md (VF): New mode iterator.
	* config/arm/neon.md (neon_vabd<mode>_2): Use the above.
	Remove integer-related logic from pattern.
	(neon_vabd<mode>_3): Likewise.

	* gcc.target/arm/neon-combine-sub-abs-into-vabd.c: Delete integer
	tests.
	* gcc.target/arm/pr83687.c: New test.

From-SVN: r256696
2018-01-15 11:56:03 +00:00
Ville Voutilainen c89f2d2468 Make optional conditionally trivially_{copy,move}_{constructible,assignable}
* include/std/optional (_Optional_payload): Fix the comment in
the class head and turn into a primary and one specialization.
(_Optional_payload::_M_engaged): Strike the NSDMI.
(_Optional_payload<_Tp, false>::operator=(const _Optional_payload&)):
New.
(_Optional_payload<_Tp, false>::operator=(_Optional_payload&&)):
Likewise.
(_Optional_payload<_Tp, false>::_M_get): Likewise.
(_Optional_payload<_Tp, false>::_M_reset): Likewise.
(_Optional_base_impl): Likewise.
(_Optional_base): Turn into a primary and three specializations.
(optional(nullopt)): Change the base init.
* testsuite/20_util/optional/assignment/8.cc: New.
* testsuite/20_util/optional/cons/trivial.cc: Likewise.
* testsuite/20_util/optional/cons/value_neg.cc: Adjust.

From-SVN: r256694
2018-01-15 13:32:24 +02:00
Georg-Johann Lay 1759d1167a Adjust tests to AVR_TINY.
* gcc.target/avr/progmem.h (pgm_read_char): Handle AVR_TINY.
	* gcc.target/avr/pr52472.c: Add "! avr_tiny" target filter.
	* gcc.target/avr/pr71627.c: Same.
	* gcc.target/avr/torture/addr-space-1-0.c: Same.
	* gcc.target/avr/torture/addr-space-1-1.c: Same.
	* gcc.target/avr/torture/addr-space-1-x.c: Same.
	* gcc.target/avr/torture/addr-space-2-0.c: Same.
	* gcc.target/avr/torture/addr-space-2-1.c: Same.
	* gcc.target/avr/torture/addr-space-2-x.c: Same.
	* gcc.target/avr/torture/sat-hr-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-k-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-llk-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-r-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-uhr-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-uk-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-ullk-plus-minus.c: Same.
	* gcc.target/avr/torture/sat-ur-plus-minus.c: Same.
	* gcc.target/avr/torture/pr61055.c: Same.
	* gcc.target/avr/torture/builtins-3-absfx.c: Only use __flash if
	available.
	* gcc.target/avr/torture/int24-mul.c: Same.
	* gcc.target/avr/torture/pr51782-1.c: Same.
	* gcc.target/avr/torture/pr61443.c: Same.
	* gcc.target/avr/torture/builtins-2.c: Factor out addr-space stuff...
	* gcc.target/avr/torture/builtins-2-flash.c: ...to this new test.

From-SVN: r256690
2018-01-15 11:18:18 +00:00
Jonathan Wakely bab0a26de5 PR libstdc++/80276 fix template argument handling in type printers
PR libstdc++/80276
	* python/libstdcxx/v6/printers.py (strip_inline_namespaces): New.
	(get_template_arg_list): New.
	(StdVariantPrinter._template_args): Remove, use get_template_arg_list
	instead.
	(TemplateTypePrinter): Rewrite to work with gdb.Type objects instead
	of strings and regular expressions.
	(add_one_template_type_printer): Adapt to new TemplateTypePrinter.
	(FilteringTypePrinter): Add docstring. Match using startswith. Use
	strip_inline_namespaces instead of strip_versioned_namespace.
	(add_one_type_printer): Prepend namespace to match argument.
	(register_type_printers): Add type printers for char16_t and char32_t
	string types and for types using cxx11 ABI. Update calls to
	add_one_template_type_printer to provide default argument dicts.
	* testsuite/libstdc++-prettyprinters/80276.cc: New test.
	* testsuite/libstdc++-prettyprinters/whatis.cc: Remove tests for
	basic_string<unsigned char> and basic_string<signed char>.
	* testsuite/libstdc++-prettyprinters/whatis2.cc: Duplicate whatis.cc
	to test local variables, without overriding _GLIBCXX_USE_CXX11_ABI.

From-SVN: r256689
2018-01-15 11:13:53 +00:00
Juraj Oršulić ed99ae13bb Correct earlier ChangeLog entry
Add Juraj Oršulić as original patch author.

From-SVN: r256688
2018-01-15 11:13:49 +00:00
Georg-Johann Lay 93c74e5970 re PR c/83801 ([avr] String constant in __flash not put into .progmem)
PR c/83801
	PR c/83729
	* gcc.target/avr/torture/pr83729.c: New test.
	* gcc.target/avr/torture/pr83801.c: New test.

From-SVN: r256687
2018-01-15 10:04:32 +00:00
Jakub Jelinek 3fccbb9ece re PR middle-end/82694 (Linux kernel miscompiled since r250765)
PR middle-end/82694
	* common.opt (fstrict-overflow): No longer an alias.
	(fwrapv-pointer): New option.
	* tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
	also for pointer types based on flag_wrapv_pointer.
	* opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
	opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
	opts->x_flag_wrapv got set.
	* fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
	changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
	POINTER_TYPE_OVERFLOW_UNDEFINED.
	* match.pd: Likewise in address comparison pattern.
	* doc/invoke.texi: Document -fwrapv and -fstrict-overflow.

	* gcc.dg/no-strict-overflow-7.c: Revert 2017-08-01 changes.
	* gcc.dg/tree-ssa/pr81388-1.c: Likewise.

From-SVN: r256686
2018-01-15 10:05:59 +01:00
Richard Biener 2aa89839f5 re PR lto/83804 ([meta] LTO memory consumption)
2018-01-15  Richard Biener  <rguenther@suse.de>

	PR lto/83804
	* tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
	from TYPE_FIELDS.  Free TYPE_BINFO if not used by devirtualization.
	Reset type names to their identifier if their TYPE_DECL doesn't
	have linkage (and thus is used for ODR and devirt).
	(save_debug_info_for_decl): Remove.
	(save_debug_info_for_type): Likewise.
	(add_tree_to_fld_list): Adjust.
	* tree-pretty-print.c (dump_generic_node): Make dumping of
	type names more robust.

From-SVN: r256685
2018-01-15 08:57:28 +00:00
Richard Biener a55e8b53d0 BASE-VER: Bump to 8.0.1.
2018-01-15  Richard Biener  <rguenther@suse.de>

	* BASE-VER: Bump to 8.0.1.

From-SVN: r256684
2018-01-15 08:28:13 +00:00
Martin Sebor e0676e2e71 re PR other/83508 ([arm] c-c++-common/Wrestrict.c fails since r255836)
PR other/83508
	* builtins.c (check_access): Avoid warning when the no-warning bit
	is set.

	PR other/83508
	* gcc.dg/Wstringop-overflow-2.c: New test.

From-SVN: r256683
2018-01-14 23:15:09 -07:00
Cory Fields 5804f62712 tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
* tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
	* ira-color (allocno_hard_regs_compare): Likewise.

From-SVN: r256682
2018-01-14 23:05:50 -07:00