Commit Graph

173416 Commits

Author SHA1 Message Date
Thomas Schwinge c5578b56b6 [OpenACC] Consolidate 'async'/'wait' code in 'libgomp/oacc-async.c'
libgomp/
	* oacc-parallel.c (GOACC_wait, goacc_wait): Move...
	* oacc-async.c: ... here.
	* oacc-int.h (goacc_wait): Declare.
	* libgomp_g.h: Update

From-SVN: r279232
2019-12-11 17:49:08 +01:00
Thomas Schwinge 3d1b5e710e [PR92854] Add 'libgomp.oacc-c-c++-common/acc_map_data-device_already-*.c', 'libgomp.oacc-c-c++-common/acc_map_data-host_already-*.c'
... to document the status quo.

	libgomp/
	PR libgomp/92854
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-device_already-1.c:
	New file.
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-device_already-2.c:
	Likewise.
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-device_already-3.c:
	Likewise.
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-host_already-1.c:
	Likewise.
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-host_already-2.c:
	Likewise.
	* testsuite/libgomp.oacc-c-c++-common/acc_map_data-host_already-3.c:
	Likewise.

From-SVN: r279231
2019-12-11 17:48:59 +01:00
Thomas Schwinge 5e93943822 [OpenACC] Initialize 'dynamic_refcount' whenever we initialize 'refcount'
Cases missed in r261813 "Update OpenACC data clause semantics to the 2.5
behavior".

	libgomp/
	* target.c (gomp_load_image_to_device, omp_target_associate_ptr):
	Initialize 'dynamic_refcount' whenever we initialize 'refcount'.

Co-Authored-By: Julian Brown <julian@codesourcery.com>

From-SVN: r279230
2019-12-11 17:48:44 +01:00
Jason Merrill 7c0a61870e PR c++/92859 - ADL and bit-field.
We also need unlowered_expr_type when considering associated types for ADL.

	* name-lookup.c: Use unlowered_expr_type.

From-SVN: r279229
2019-12-11 11:48:44 -05:00
Jason Merrill 3e7a892cc5 PR c++/92446 - deduction of class NTTP.
Another place we need to look through the VIEW_CONVERT_EXPR we add to make a
use of a class NTTP have const type.

	* pt.c (deducible_expression): Look through VIEW_CONVERT_EXPR.

From-SVN: r279228
2019-12-11 11:48:22 -05:00
Martin Sebor 0a22f99639 PR middle-end/79221 - missing -Wstringop-overflow= on a strcat overflow
gcc/testsuite/ChangeLog:
	* gcc.dg/Wstringop-overflow-26.c: New test.

From-SVN: r279227
2019-12-11 08:59:55 -07:00
Lewis Hyatt ddd0fd173a Adds multibyte awareness to pretty-print.c
2019-12-11  Lewis Hyatt  <lhyatt@gmail.com>

	PR 91853
	* pretty-print.c (pp_quoted_string): Avoid hex-escaping valid
	multibyte input.  Fix off-by-one-bug printing the last byte before a
	hex-escaped output.
	(pp_character): Don't apply line wrapping in the middle of multibyte
	characters.
	(test_utf8): New test.
	(pretty_print_c_tests): Call the new test.

From-SVN: r279226
2019-12-11 14:52:31 +00:00
Andre Vieira 0dc4e690ce [testsuite][arm] Remove xfail for vect-epilogues test
gcc/testsuite/ChangeLog:
2019-12-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc.dg/vect/vect-epilogues.c: Remove xfail for arm.

From-SVN: r279225
2019-12-11 14:21:48 +00:00
Jonathan Wakely 554c02a590 libstdc++: Fix whitepace in changelog
From-SVN: r279220
2019-12-11 13:19:18 +00:00
Richard Earnshaw fd9058b6fc arm: Fix an incorrect warning when -mcpu=cortex-a55 is used with -mfloat-abi=soft
When a CPU such as cortex-a55 is used with the soft-float ABI variant,
the compiler is incorrectly issuing a warning about a mismatch between
the architecture (generated internally) and the CPU.  This is not
expected or intended.

The problem stems from the fact that we generate (correctly) an
architecture for a soft-float compilation, but then try to compare it
against the one recorded for the CPU.  Normally we strip out the
floating point information before doing that comparison, but we
currently only do that for the features that can be affected by the
-mfpu option.  For a soft-float environment we also need to strip out
any bits that depend on having floating-point present.

So this patch implements that and does a bit of housekeeping at the
same time:

- in arm-cpus.in it is not necessary for a CPU to specify both
  +dotprod and +simd in its architecture specification, since +dotprod
  implies +simd.

- I've refactored the ALL_SIMD fgroup in arm-cpus.in to create a new
  subgroup ALL_SIMD_EXTERNAL and containing the bits that were
  previously added directly to ALL_SIMD.  Similarly, I've added an
  ALL_FPU_EXTERNAL subgroup.

- in arm.c rename fpu_bitlist and all_fpubits to fpu_bitlist_internal
  and all_fpubits_internal for consistency with the fgroup bits which
  they contain.

	* config/arm/arm-cpus.in (ALL_SIMD_EXTERNAL): New fgroup.
	(ALL_SIMD): Use it.
	(ALL_FPU_EXTERNAL): New fgroup.
	(ALL_FP): Use it.
	(cortex-a55, cortex-a75, cortex-a76, cortex-a76ae): Remove redundant
	+simd from architecture specification.
	(cortex-a77, neoverse-n1, cortex-a75.cortex-a55): Likewise.
	* config/arm/arm.c (isa_all_fpubits, fpu_bitlist): Rename to ...
	(isa_all_fpubits_internal, fpu_bitlist_internal): ... these.
	(isa_all_fpbits): New bitmap.
	(arm_option_override): Initialize it.
	(arm_configure_build_target): If the target isa does not have any
	FP enabled, do not warn about mismatches in FP-related feature bits.

From-SVN: r279219
2019-12-11 11:59:04 +00:00
Tobias Burnus 93d9021987 libgomp – spelling fixes, incl. omp_lib.h.in
* omp_lib.h.in: Fix spelling of function declaration
        omp_get_cancell(l)ation.
        * libgomp.texi (acc_is_present, acc_async_test, acc_async_test_all):
        Fix typos.
        * env.c: Fix comment typos.
        * oacc-host.c: Likewise.
        * ordered.c: Likewise.
        * task.c: Likewise.
        * team.c: Likewise.
        * config/gcn/task.c: Likewise.
        * config/gcn/team.c: Likewise.
        * config/nvptx/task.c: Likewise.
        * config/nvptx/team.c: Likewise.
        * plugin/plugin-gcn.c: Likewise.
        * testsuite/libgomp.fortran/jacobi.f: Likewise.
        * testsuite/libgomp.hsa.c/tiling-2.c: Likewise.
        * testsuite/libgomp.oacc-c-c++-common/enter_exit-lib.c: Likewise.

From-SVN: r279218
2019-12-11 12:45:49 +01:00
Tobias Burnus a0221aeebd [OpenMP/OpenACC/Fortran] Fix mapping of optional (present|absent) arguments
* testsuite/libgomp.oacc-fortran/optional-cache.f95: Add 'dg-do run'.
        * testsuite/libgomp.oacc-fortran/optional-reduction.f90: Remove
        unnecessary 'dg-additional-options "-w"'.

From-SVN: r279217
2019-12-11 11:40:11 +01:00
Stam Markianos-Wright d5ffd47e9a Add ARM-specific Bfloat format support to middle-end
2019-12-11  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	* real.c (struct arm_bfloat_half_format,
	encode_arm_bfloat_half, decode_arm_bfloat_half): New.
	* real.h (arm_bfloat_half_format): New.

From-SVN: r279216
2019-12-11 10:27:30 +00:00
Frederik Harwath e6c90dba73 Fix PR92901: Change test expectation for C++ in OpenACC test clause-locations.c
The columns of the clause locations that are reported for C and C++ are
different and hence we need separate test expectations for both languages.

2019-12-11  Frederik Harwath  <frederik@codesourcery.com>

	PR other/92901
	/gcc/testsuite/
	* c-c++-common/clause-locations.c: Adjust test expectation for C++.

From-SVN: r279215
2019-12-11 08:26:18 +00:00
Hongtao Liu a8654147f1 Fix unrecognizable insn of pr92865.
gcc/
    PR target/92865
    * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Enable
    integer mask cmov when available even with TARGET_XOP.

gcc/testsuite
    * gcc.target/i386/pr92865-1.c: New test.

From-SVN: r279214
2019-12-11 08:06:06 +00:00
Thomas Rodgers 2aae713bb4 Restore enable_if lost during original import of pstl
* include/pstl/glue_numeric_defs.h: Restore enable_if lost
        during original import of pstl.
        * include/pstl/glue_numeric_impl.h: Likewise.

From-SVN: r279212
2019-12-11 03:38:24 +00:00
GCC Administrator 03e5f213ee Daily bump.
From-SVN: r279210
2019-12-11 00:16:21 +00:00
Ian Lance Taylor 1e2b400bbb compiler: generate type descriptor for pointer to alias defined in another package
When a type descriptor is needed (for e.g. interface conversion),
    if the type is a pointer to a named type defined in another
    package, we don't generate the definition of the type descriptor
    because it is generated in the package where the type is defined.
    However, if the named type is an alias to an unnamed type, its
    descriptor is not generated in the other package, and we need to
    generate it.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/210787

From-SVN: r279207
2019-12-11 00:15:53 +00:00
Jonathan Wakely cff87282f4 libstdc++: Correct noexcept-specifiers on span constructors
As discussed at https://github.com/cplusplus/draft/issues/3534 two
std::span constructors specify incorrect conditions for throwing
exceptions. This patch makes those constructors have correct
noexcept-specifiers that accurately reflect what can actually throw.

	(span(ContiguousIterator, Sentinel)): Add conditional noexcept.
	* include/std/span (span(ContiguousIterator, size_type)): Change
	noexcept to be unconditionally true.
	* testsuite/23_containers/span/nothrow_cons.cc: New test.

From-SVN: r279206
2019-12-10 23:50:26 +00:00
Jakub Jelinek a6ae300f9a re PR tree-optimization/92891 (ice in decompose, at wide-int.h:984)
PR tree-optimization/92891
	* builtins.c (gimple_call_alloc_size): Convert size to sizetype
	before returning it.

	* gcc.c-torture/compile/pr92891.c: New test.

From-SVN: r279205
2019-12-11 00:49:40 +01:00
Vladimir Makarov 7436a1c675 re PR rtl-optimization/92796 (ICE in lra_assign, at lra-assigns.c:1646 on powerpc64le-linux-gnu)
2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/92796
	* lra-int.h (lra_risky_transformations_p): Rename to
	check_and_force_assignment_correctness_p.
	* lra-assigns.c: Ditto.
	(lra_assign): Reset check_and_force_assignment_correctness_p.
	* lra-constraints.c (lra_risky_transformations_p): Rename to
	check_and_force_assignment_correctness_p.
	(lra_constraints): Set up check_and_force_assignment_correctness_p
	only for the 1st sub-pass.
	* lra-eliminations.c (process_insn_for_elimination): Set up
	check_and_force_assignment_correctness_p if the insn chnaged its
	code.

2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/92796
	* gcc.target/powerpc/pr92796.c: New test.

From-SVN: r279204
2019-12-10 22:07:57 +00:00
Thomas Koenig 0cc063af32 re PR fortran/91643 (ICE in gfc_trans_create_temp_array, at fortran/trans-array.c:1265)
2019-12-10  Thomas Koenig  <tkoenig@gcc.gnu.org>

    PR fortran/91643
    * trans-array.c (gfc_conv_array_parameter): Do not repack
    an assumed rank dummy argument.

2019-12-10  Thomas Koenig  <tkoenig@gcc.gnu.org>

    PR fortran/91643
    * gfortran.dg/assumed_rank_18.f90: New test.

From-SVN: r279203
2019-12-10 21:59:09 +00:00
François Dumont 6004c17b4d libstdc++: Rework std::copy/copy_backward/move/move_backward/fill/fill_n algos
Enhance those algos overloads to generalize existing optimization for
__gnu_debug::_Safe_iterator w/o _GLIBCXX_DEBUG mode and for std::deque
 iterators.

Also extend __copy_move_a2 ostreambuf_iterator overloads to std::vector and
std::deque iterators.

	* include/bits/stl_algobase.h
	(__copy_move_a1<>(_II, _II, _OI)): New.
	(__copy_move_a1<>(_Deque_iterator<>, _Deque_iterator<>, _OI)): New.
	(__copy_move_a1<>(_Deque_iterator<>, _Deque_iterator<>,
	_Deque_iterator<>)): New.
	(__copy_move_a1<>(_II, _II, _Deque_iterator<>)): New.
	(__copy_move_a<>(_II, _II, _OI)): Adapt, call __copy_move_a1<>.
	(__copy_move_a<>(const _Safe_iterator<>&, const _Safe_iterator<>&,
	_OI)): New.
	(__copy_move_a<>(const _Safe_iterator<>&, const _Safe_iterator<>&,
	 const _Safe_iterator<>&)): New.
	(__copy_move_a<>(_II, _II, const _Safe_iterator<>&)): New.
	(copy, move): Adapt, call __copy_move_a.
	(__copy_move_backward_a1<>(_II, _II, _OI)): New,
	call __copy_move_backward_a2.
	(__copy_move_backward_a1<>(_Deque_iterator<>, _Deque_iterator<>, _OI)): New.
	(__copy_move_backward_a1<>(_Deque_iterator<>, _Deque_iterator<>,
	_Deque_iterator<>)): New.
	(__copy_move_backward_a1<>(_II, _II, _Deque_iterator<>)): New.
	(__copy_move_backward_a<>(_II, _II, _OI)): Adapt, call
	__copy_move_backward_a1<>.
	(__copy_move_backward_a<>(const _Safe_iterator<>&, const _Safe_iterator<>&,
	_OI)): New.
	(__copy_move_backward_a<>(const _Safe_iterator<>&, const _Safe_iterator<>&,
	 const _Safe_iterator<>&)): New.
	(__copy_move_backward_a<>(_II, _II, const _Safe_iterator<>&)): New.
	(copy_backward, move_backward): Adapt, call __copy_move_backward_a<>.
	(__fill_a): Rename into...
	(__fill_a1): ... this.
	(__fill_a1(__normal_iterator<>, __normal_iterator<>, const _Tp&)): New.
	(__fill_a1(const _Deque_iterator<>&, const _Deque_iterator<>&, _VTp)):
	New.
	(__fill_a(_FIte, _FIte, const _Tp&)): New, call __fill_a1.
	(__fill_a(const _Safe_iterator<>&, const _Safe_iterator<>&,
	const _Tp&)): New.
	(fill): Adapt, remove __niter_base usage.
	(__fill_n_a): Rename into...
	(__fill_n_a1): ...this.
	(__fill_n_a(const _Safe_iterator<>&, _Size, const _Tp&,
	input_iterator_tag)): New.
	(__fill_n_a(_OI, _Size, const _Tp&, output_iterator_tag)): New, call
	__fill_n_a1.
	(__fill_n_a(_OI, _Size, const _Tp&, random_access_iterator_tag)): New,
	call __fill_a.
	(__equal_aux): Rename into...
	(__equal_aux1): ...this.
	(__equal_aux1(_Deque_iterator<>, _Deque_iterator<>, _OI)): New.
	(__equal_aux1(_Deque_iterator<>, _Deque_iterator<>,
	_Deque_iterator<>)): New.
	(__equal_aux1(_II, _II, _Deque_iterator<>)): New.
	(__equal_aux(_II1, _II1, _II2)): New, call __equal_aux1.
	(__equal_aux(const _Safe_iterator<>&, const _Safe_iterator<>&,
	_OI)): New.
	(__equal_aux(const _Safe_iterator<>&, const _Safe_iterator<>&,
	 const _Safe_iterator<>&)): New.
	(__equal_aux(_II, _II, const _Safe_iterator<>&)): New.
	(equal(_II1, _II1, _II2)): Adapt.
	* include/bits/stl_deque.h
	(fill, copy, copy_backward, move, move_backward): Remove.
	* include/bits/deque.tcc: Include <bits/stl_algobase.h>.
	(__fill_a1): New.
	(__copy_move_dit): New.
	(__copy_move_a1): New, use latter.
	(__copy_move_a1(_II, _II, _Deque_iterator<>)): New.
	(__copy_move_backward_dit): New.
	(__copy_move_backward_a1): New, use latter.
	(__copy_move_backward_a1(_II, _II, _Deque_iterator<>)): New.
	(__equal_dit): New.
	(__equal_aux1): New, use latter.
	(__equal_aux1(_II, _II, _Deque_iterator<>)): New.
	* include/std/numeric (__is_random_access_iter): Move...
	* include/bits/stl_iterator_base_types.h (__is_random_access_iter): ...
	here. Provide pre-C++11 definition.
	* include/debug/debug.h (_Safe_iterator<>): New declaration.
	* include/debug/safe_iterator.h (_Safe_iterator<>::_M_can_advance): Add
	__strict parameter.
	* include/debug/safe_iterator.tcc: Include <bits/stl_algobase.h>.
	(_Safe_iterator<>::_M_can_advance): Adapt.
	(std::__copy_move_a, std::__copy_move_backward_a, __fill_a): New.
	(__fill_n_a, __equal_aux): New.
	* include/debug/stl_iterator.h (__niter_base): Remove.
	* include/debug/vector (__niter_base): Remove.
	* testsuite/performance/25_algorithms/copy_backward_deque_iterators.cc:
	Include <vector> and <list>. Add benches.
	* testsuite/performance/25_algorithms/copy_deque_iterators.cc: Likewise.
	* testsuite/performance/25_algorithms/equal_deque_iterators.cc: Likewise.
	* testsuite/25_algorithms/copy/debug/1_neg.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/2.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/31.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/32.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/33.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/41.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/42.cc: New.
	* testsuite/25_algorithms/copy/deque_iterators/43.cc: New.
	* testsuite/25_algorithms/copy/streambuf_iterators/char/4.cc (test02):
	New.
	* testsuite/25_algorithms/copy_backward/deque_iterators/2.cc: New.
	* testsuite/25_algorithms/equal/deque_iterators/1.cc: New.
	* testsuite/25_algorithms/fill/deque_iterators/1.cc: New.
	* testsuite/25_algorithms/move/deque_iterators/2.cc: New.
	* testsuite/25_algorithms/move_backward/deque_iterators/2.cc: New.

From-SVN: r279201
2019-12-10 21:49:55 +00:00
Jakub Jelinek 5e72bcc1dd re PR rtl-optimization/92882 (ICE in regstat_bb_compute_calls_crossed, at regstat.c:327 since r279124)
PR rtl-optimization/92882
	* regstat.c (regstat_bb_compute_calls_crossed): Don't check
	INSN_UID against DF_INSN_SIZE or use DF_INSN_INFO_GET unless
	NONDEBUG_INSN_P.

	* gfortran.dg/pr92882.f: New test.

From-SVN: r279196
2019-12-10 22:05:59 +01:00
Jakub Jelinek 27f418b8ec re PR ipa/92883 (ICE in compare_values_warnv)
PR ipa/92883
	* ipa-cp.c (propagate_vr_across_jump_function): Pass jvr rather
	than *jfunc->m_vr to intersect.  Formatting fix.

	* gcc.dg/ipa/pr92883.c: New test.

From-SVN: r279194
2019-12-10 22:04:57 +01:00
Jakub Jelinek 6b24e342cb re PR middle-end/92825 (Unnecesary stack protection in Firefox's LightPixel.)
PR middle-end/92825
	* cfgexpand.c (add_stack_protection_conflicts): Change return type
	from void to bool, return true if at least one stack_vars[i].decl
	is addressable.
	(record_or_union_type_has_array_p, stack_protect_decl_p): Remove.
	(expand_used_vars): Don't call stack_protect_decl_p, instead for
	-fstack-protector-strong set gen_stack_protect_signal to true
	if add_stack_protection_conflicts returned true.  Formatting fixes.
	* doc/invoke.texi (-fstack-protector-strong): Clarify that optimized
	out variables or variables not living on the stack don't count.
	(-fstack-protector): Likewise.  Clarify it affects >= 8 byte arrays
	rather than > 8 byte.

	* gcc.target/i386/pr92825.c: New test.

From-SVN: r279193
2019-12-10 22:04:08 +01:00
Jakub Jelinek 6b6a80654c * ipa-param-manipulation.c
(ipa_param_body_adjustments::register_replacement): Fix comment typo
	- accross -> across.
	* ipa-sra.c (propagate_used_across_scc_edge, ipa_sra_analysis):
	Likewise.
	(param_splitting_across_edge): Fix typo in dump message - accross
	-> across.

From-SVN: r279188
2019-12-10 21:35:30 +01:00
Jason Merrill eff66cd2aa PR c++/92847 - C++20 comparison ambiguity with class template.
This testcase demonstrates that looking at cand->template_decl is not a good
starting place for finding the most general template, as it is only set for
primary templates.

	* call.c (cand_parms_match): Handle all templated functions.

From-SVN: r279185
2019-12-10 15:12:50 -05:00
Jason Merrill 09b661cea1 Fix C++20 structural type vs. private base.
In my patch to implement C++20 "structural type" I tried to set the access
flags on the artificial base fields appropriately, but failed.  I was
copying TREE_PRIVATE from the binfo, but TREE_PRIVATE on binfo is just a
temporary cache for dfs_access_in_type; we really need to get the
inheritance access information from BINFO_BASE_ACCESSES.

	* class.c (build_base_field_1): Take access parameter.
	(build_base_field): Likewise.
	(build_base_fields, layout_virtual_bases): Pass it.
	* tree.c (structural_type_p): Improve private base diagnostic.

From-SVN: r279184
2019-12-10 15:10:59 -05:00
Jason Merrill 1fb81d83a8 PR c++/92560 - ICE with decltype and rewritten operator.
A call as the immediate operand of decltype is handled differently; we don't
create an object of the return type as we do normally.  But in the case of a
rewritten operator, we're adding another call as a wrapper, so the inner
call doesn't get the special handling.

	* call.c (build_new_op_1): Clear tf_decltype on inner call.

From-SVN: r279183
2019-12-10 15:06:58 -05:00
Martin Liska 42aed35797 Bail out in gfc_dep_compare_expr for a NULL argument.
2019-12-10  Martin Liska  <mliska@suse.cz>

	PR fortran/92874
	* dependency.c (gfc_dep_compare_expr): Bail out
	when one of the arguments is null.
2019-12-10  Martin Liska  <mliska@suse.cz>

	PR fortran/92874
	* gfortran.dg/pr92874.f90: New test.

From-SVN: r279181
2019-12-10 18:57:30 +00:00
Thomas Koenig f812dfe8e0 re PR fortran/92863 (ICE in gfc_typename)
2019-12-10  Thomas Koenig  <tkoenig@gcc.gnu.org>

    PR fortran/92863
    * misc.c (gfc_typename): If derived component is NULL for
    derived or class, return "invalid type" or "invalid class",
    respectively.

2019-12-10  Thomas Koenig  <tkoenig@gcc.gnu.org>

    PR fortran/92863
    * gfortran.dg/interface_45.f90: New test.

From-SVN: r279180
2019-12-10 18:31:33 +00:00
Jan Hubicka 940317b75c cgraph.c (cgraph_node::verify_node): Verify tp_first_run.
* cgraph.c (cgraph_node::verify_node): Verify tp_first_run.
	* cgraph.h (cgrpah_node): Turn tp_first_run back to int.
	* cgraphunit.c (tp_first_run_node_cmp): Do not watch for overflows.
	(expand_all_functions): First expand ordered section and then
	unordered.
	* profile.c (compute_value_histograms): Error on out of range
	tp_first_runs.

From-SVN: r279179
2019-12-10 17:59:43 +00:00
Jan Hubicka 59c7b29e9a Turn tp_first_run counts back to 32bit values.
* cgraph.c (cgraph_node::verify_node): Verify tp_first_run.
	* cgraph.h (cgrpah_node): Turn tp_first_run back to int.
	* cgraphunit.c (tp_first_run_node_cmp): Do not watch for overflows.
	(expand_all_functions): First expand ordered section and then
	unordered.
	* lto-partition.c (lto_balanced_map): Fix printing of tp_first_run.
	* profile.c (compute_value_histograms): Error on out of range
	tp_first_runs.

From-SVN: r279178
2019-12-10 17:54:41 +00:00
Jan Hubicka 0665642700 predict.c (compute_function_frequency): Check for presence of IPA profile.
* predict.c (compute_function_frequency): Check for presence of IPA
	profile.

From-SVN: r279177
2019-12-10 17:47:28 +00:00
Jan Hubicka 12651dc6dc varasm.c (default_function_section): Fix confused tests for tp_first_run reordering.
* varasm.c (default_function_section): Fix confused tests for
	tp_first_run reordering.

From-SVN: r279176
2019-12-10 17:46:33 +00:00
Jonathan Wakely 91fd16a7bd libstdc++: Fix description of std::ios::trunc (PR 92886)
PR libstdc++/92886
	* include/bits/ios_base.h (std::ios_base::trunc): Fix comment.

From-SVN: r279175
2019-12-10 17:35:42 +00:00
Richard Sandiford aa1a27950a [AArch64] Don't allow partial SVE modes in GPRs
With -msve-vector-bits=N, the payload of some partial SVE modes can
be 16 bytes or smaller, which makes them small enough to fit in a
pair of GPRs.  We specifically don't want that, because the payload
is distributed evenly across the SVE register rather than collected
at one end.  Marshalling it into a GPR via register operations would
be expensive.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Don't
	allow SVE modes in GPRs.

gcc/testsuite/
	* gcc.target/aarch64/sve/mixed_size_7.c: New test.

From-SVN: r279174
2019-12-10 16:46:05 +00:00
Richard Sandiford 30f8bf3d6c [AArch64] Fix INDEX patterns for partial VNx2 modes
The INDEX patterns handle partial modes by choosing the container
size rather than the element size, so that the number of lanes
(and thus number of additions) matches the mode.  This means that
all VNx4 modes use .s and all VNx2 modes use .d, etc.

When adding this, I'd forgotten that the choice between Wn and Xn
registers would need to be updated to use the container size too.
For partial VNx2s, we were using .d containers with Wn rather than
Xn source registers.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (vccore): New iterator.
	* config/aarch64/aarch64-sve.md (vec_series<mode>): Use it instead
	of vwcore.
	(*vec_series<mode>_plus): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/sve/mixed_size_6.c: New test.

From-SVN: r279173
2019-12-10 16:32:40 +00:00
Jonathan Wakely 393283b8ef libstdc++: Define __cpp_lib_constexpr_complex macro
This is LWG issue 3349.

	* include/std/complex (__cpp_lib_constexpr_complex): Define.
	* include/std/version (__cpp_lib_constexpr_complex): Likewise.
	* testsuite/26_numerics/complex/1.cc: New test.
	* testsuite/26_numerics/complex/2.cc: New test.

From-SVN: r279172
2019-12-10 16:15:59 +00:00
Jonathan Wakely b65bdd27fd libstdc++: Reduce header dependencies in <span>
* include/std/span: Do not include <tuple> and <utility>.
	(tuple_size, tuple_element): Declare.

From-SVN: r279171
2019-12-10 16:15:55 +00:00
Jonathan Wakely 990a09e486 libstdc++: Fix bug in std::indirect_result_t
The alias template wasn't working because it applied iter_reference_t to
the pack of iterators before and after passing the pack to the
__indeirect_result helper.

	* include/bits/iterator_concepts.h (indirect_result_t): Do not apply
	iter_reference_t to parameter pack.
	* testsuite/24_iterators/indirect_callable/projected.cc: New test.

From-SVN: r279170
2019-12-10 16:15:49 +00:00
Frederik Harwath d0d0ba20f2 Add tests to verify OpenACC clause locations
Check that the column information for OpenACC clauses is communicated correctly
to the middle-end, in particular by the Fortran front-end (cf. PR 92793).

2019-12-10  Frederik Harwath  <frederik@codesourcery.com>

gcc/testsuite/
	* c-c++-common/goacc/clause-locations.c: New test.
	* gfortran.dg/goacc/clause-locations.f90: New test.

From-SVN: r279169
2019-12-10 16:12:58 +00:00
Frederik Harwath 64c5157f6d Use clause locations in OpenACC nested reduction warnings
Since the Fortran front-end now sets the clause locations correctly, we can
emit warnings with more precise locations if we encounter conflicting
operations for a variable in reduction clauses.

2019-12-10  Frederik Harwath  <frederik@codesourcery.com>

gcc/
	* omp-low.c (scan_omp_for): Use clause location in warning.

From-SVN: r279168
2019-12-10 16:06:12 +00:00
Lewis Hyatt 53eb0cb3a1 Add myself to MAINTAINERS file.
2019-12-10  Lewis Hyatt  <lhyatt@gmail.com>

        * MAINTAINERS (Write After Approval): Add myself.

From-SVN: r279167
2019-12-10 14:21:22 +00:00
Richard Sandiford b78d005e8f Make dwarf2out punt for MODE_VECTOR_BOOL
The dwarf2 handling of vector constants currently divides the vector
into a length (number of elements) and byte element size.  This doesn't
work well for MODE_VECTOR_BOOL, where several elements are packed into
the same byte.

We should probably add a way of encoding this in future, but for now
the safest thing is to punt, like we already do for variable-length
vectors.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* dwarf2out.c (loc_descriptor): Punt for MODE_VECTOR_BOOL.
	(add_const_value_attribute): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general/debug_4.c: New test.

From-SVN: r279165
2019-12-10 12:20:20 +00:00
Richard Sandiford b78500ecb8 Add missing conversion in vect_create_epilog_for_reduction
The direct_slp_reduc code in vect_create_epilog_for_reduction was
still assuming that all types involved in a reduction are the same
(up to types_compatible_p), whereas we now support differences in
sign.  This was causing an ICE in gcc.dg/vect/pr92324-4.c for SVE.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vect_create_epilog_for_reduction): When
	handling direct_slp_reduc, allow the PHI arguments to have
	a different type from the vector elements.

From-SVN: r279164
2019-12-10 12:20:12 +00:00
Richard Sandiford f1c13d6dde Record the loop masks needed for EXTRACT_LAST_REDUCTIONs
The analysis phase of vectorizable_condition wasn't recording the
loop masks needed by the transform phase.  This meant that the masks
wouldn't be created in the (rare) case that no other statement needed
them.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-stmts.c (vectorizable_condition): Record the loop
	masks required for extract-last reductions.

gcc/testsuite/
	* gcc.target/aarch64/sve/clastb_9.c: New test.

From-SVN: r279163
2019-12-10 12:20:07 +00:00
Richard Sandiford 9ec35478cc Fix EXTRACT_LAST_REDUCTION handling of pattern stmts
Unlike most vector ops, extract-last reductions replace the original
scalar code in-situ rather than adding an adjacent vector implementation.
I.e.:

   dest_1 = COND_EXPR <...>;

becomes:

   dest_1 = .EXTRACT_LAST (...);

gcc.dg/vect/vect-cond-reduc-4.c was ICEing for SVE because we tried
to replace the pattern statement in this way, rather than replacing
the original scalar statement.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-stmts.c (vect_finish_replace_stmt): Always use the
	original scalar statement rather than a pattern statement.
	(vectorizable_condition): Likewise, in the handling of extract-last
	reductions.

From-SVN: r279162
2019-12-10 12:20:02 +00:00
Richard Sandiford ca49c831ca Disallow EXTRACT_LAST_REDUCTION for reduction chains
gcc.dg/vect/vect-cond-reduc-5.c was ICEing for SVE because we
tried to use an extract-last reduction for a chain of COND_EXPRs.
Adding support for the chained case would be too invasive for stage 3
so this patch explicitly forbids it instead.  I've filed PR92884 for
the possible future work.

2019-12-10  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop.c (vectorizable_reduction): Don't use
	EXTRACT_LAST_REDUCTION for chained reductions.

From-SVN: r279161
2019-12-10 11:30:49 +00:00