This is an awkward testsuite failure. The original bug was that we were failing to put out
the conditional code in the conditional form of the STL instruction (oops!).
So we wanted to output STLNE, but instead output STL.
The testacase relies on if-conversion to conditionalise the insn for STL.
However, ever since r251643 the expansion of a non-relaxed atomic store
always includes a compiler barrier. That blocks if-conversion in all cases.
So there's no easy way to get to a conditional STL instruction from a C program.
But we do want to test for the original bug fix that if the RTL insn for STL is conditionalised
it should output the conditional code.
The solution in this patch is to convert the test into an RTL test with the COND_EXEC form
of the STL insn and scan the assembly output there.
This seems to work fine, and gives us an opportunity to create a gcc.dg/rtl/arm directory
in the RTL tests.
This now makes the gcc.target/arm/stl-cond.c disappear (as the test is deleted) and
the new test in gcc.dg/rtl/arm/stl-cond.c passes.
* gcc.dg/rtl/arm/stl-cond.c: New test.
* gcc.target/arm/stl-cond.c: Delete.
From-SVN: r256785
This patch converts gcc.target/arm/pr40887.c to use the proper effective target check and dg-add-options for armv5te
so that we avoid situations where we end up trying to compile the test with a Thumb1 hard-float ABI, which makes the
compiler complain.
This allows the test to pass gracefully for me for my compiler configured with:
--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb
* gcc.target/arm/pr40887.c: Add armv5te effective target checks and
directives.
From-SVN: r256784
This test is naughty because it doesn't use the proper effective target checks
and add-options mechanisms for setting a Thumb1 target, which leads to Thumb1 hard-float errors
when testing a toolchain configured with --with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb.
This patch fixes that in the obvious way.
* gcc.target/arm/xor-and.c: Fix armv6 effective target checks
and options.
From-SVN: r256782
This PR is about a case in which we VIEW_CONVERT a variable-sized
unaligned record:
<record_type 0x7ffff6d92888 check_displace_generation__T245b sizes-gimplified type_7 BLK
size <var_decl 0x7ffff6846510 D.3499 ...>
unit-size <var_decl 0x7ffff68465a0 D.3500 ...>
align:8 ...>
to an aligned 32-bit integer. The strict-alignment handling of
this case creates an aligned temporary slot, moves the operand
into the slot in the operand's original mode, then accesses the
slot in the more-aligned result mode.
Previously the size of the temporary slot was calculated using:
HOST_WIDE_INT temp_size
= MAX (int_size_in_bytes (inner_type),
(HOST_WIDE_INT) GET_MODE_SIZE (mode));
int_size_in_bytes would return -1 for the variable-length type,
so we'd use the size of the result mode for the slot. r256152 replaced
int_size_in_bytes with tree_to_poly_uint64, which triggered an ICE.
If op0 has BLKmode we do a block copy of GET_MODE_SIZE (mode) bytes
and then convert the slot to "mode":
poly_uint64 mode_size = GET_MODE_SIZE (mode);
...
if (GET_MODE (op0) == BLKmode)
{
rtx size_rtx = gen_int_mode (mode_size, Pmode);
emit_block_move (new_with_op0_mode, op0, size_rtx,
(modifier == EXPAND_STACK_PARM
? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL));
}
else
...
op0 = new_rtx;
}
}
op0 = adjust_address (op0, mode, 0);
so I think in that case just the size of "mode" is enough, even if op0
is a fixed-size type. For non-BLKmode op0 we first move in op0's mode
and then convert the slot to "mode":
emit_move_insn (new_with_op0_mode, op0);
op0 = new_rtx;
}
}
op0 = adjust_address (op0, mode, 0);
so I think we want the maximum of the two mode sizes in that case.
2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR middle-end/83884
* expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
rather than the size of inner_type to determine the stack slot size
when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
From-SVN: r256779
* elf.c (codes) [GENERATE_FIXED_HUFFMAN_TABLE]: Fix size to be
288.
(main) [GENERATE_FIXED_HUFFMAN_TABLE]: Pass 288 to
elf_zlib_inflate_table. Generate elf_zlib_default_dist_table.
(elf_zlib_default_table): Update.
(elf_zlib_default_dist_table): New static array.
(elf_zlib_inflate): Use elf_zlib_default_dist_table for dist table
for block type 1.
* ztest.c (struct zlib_test): Add uncompressed_len.
(tests): Initialize uncompressed_len field. Add new test case.
(test_samples): Use uncompressed_len field.
From-SVN: r256776
2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
* config.gcc (powerpc*-linux*-*): Add support for 64-bit little
endian Linux systems to optionally enable multilibs for selecting
the long double type if the user configured an explicit type.
* config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
have no long double multilibs if not defined.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
warn if the user used -mabi={ieee,ibm}longdouble and we built
multilibs for long double.
* config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
appropriate multilib option.
(MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
multilib options.
* config/rs6000/t-ldouble-linux64le-ibm: New configuration files
for building long double multilibs.
* config/rs6000/t-ldouble-linux64le-ieee: Likewise.
From-SVN: r256775
* config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
64 bits.
* config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
128 bits.
From-SVN: r256773
[gcc]
2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
-mspeculate-indirect-jumps.
* config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
for -mno-speculate-indirect-jumps.
(*call_indirect_elfv2<mode>_nospec): New define_insn.
(*call_value_indirect_elfv2<mode>): Disable for
-mno-speculate-indirect-jumps.
(*call_value_indirect_elfv2<mode>_nospec): New define_insn.
(indirect_jump): Emit different RTL for
-mno-speculate-indirect-jumps.
(*indirect_jump<mode>): Disable for
-mno-speculate-indirect-jumps.
(*indirect_jump<mode>_nospec): New define_insn.
(tablejump): Emit different RTL for
-mno-speculate-indirect-jumps.
(tablejumpsi): Disable for -mno-speculate-indirect-jumps.
(tablejumpsi_nospec): New define_expand.
(tablejumpdi): Disable for -mno-speculate-indirect-jumps.
(tablejumpdi_nospec): New define_expand.
(*tablejump<mode>_internal1): Disable for
-mno-speculate-indirect-jumps.
(*tablejump<mode>_internal1_nospec): New define_insn.
* config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
option.
[gcc/testsuite]
2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/safe-indirect-jump-1.c: New file.
* gcc.target/powerpc/safe-indirect-jump-2.c: New file.
* gcc.target/powerpc/safe-indirect-jump-3.c: New file.
* gcc.target/powerpc/safe-indirect-jump-4.c: New file.
* gcc.target/powerpc/safe-indirect-jump-5.c: New file.
* gcc.target/powerpc/safe-indirect-jump-6.c: New file.
From-SVN: r256753
PR libgomp/83590
* gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
return early, inline manually is_gimple_sizepos. Make sure if we
call gimplify_expr we don't end up with a gimple constant.
* tree.c (variably_modified_type_p): Don't return true for
is_gimple_constant (_t). Inline manually is_gimple_sizepos.
* gimplify.h (is_gimple_sizepos): Remove.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r256748
vect_analyze_loop_operations was calling vectorizable_live_operation
for all live-out phis, which led to a bogus ncopies calculation in
the pure SLP case. I think v_a_l_o should only be passing phis
that are vectorised using normal loop vectorisation, since
vect_slp_analyze_node_operations handles the SLP side (and knows
the correct slp_index and slp_node arguments to pass in, via
vect_analyze_stmt).
With that fixed we hit an older bug that vectorizable_live_operation
didn't handle live-out SLP inductions. Fixed by using gimple_phi_result
rather than gimple_get_lhs for phis.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR tree-optimization/83857
* tree-vect-loop.c (vect_analyze_loop_operations): Don't call
vectorizable_live_operation for pure SLP statements.
(vectorizable_live_operation): Handle PHIs.
gcc/testsuite/
PR tree-optimization/83857
* gcc.dg/vect/pr83857.c: New test.
From-SVN: r256747
2018-01-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/83867
* tree-vect-stmts.c (vect_transform_stmt): Precompute
nested_in_vect_loop_p since the scalar stmt may get invalidated.
* gcc.dg/vect/pr83867.c: New testcase.
From-SVN: r256746
PR c/83844
* stor-layout.c (handle_warn_if_not_align): Use byte_position and
multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
If off is not INTEGER_CST, issue a may not be aligned warning
rather than isn't aligned. Use isn%'t rather than isn't.
* fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
into MULT_EXPR.
<case MULT_EXPR>: Improve the case when bottom and one of the
MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
operand, in that case check if the other operand is multiple of
bottom divided by the INTEGER_CST operand.
* gcc.dg/pr83844.c: New test.
From-SVN: r256745
The port-local FUNCTION_ARG_SIZE:
((((MODE) != BLKmode \
? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
: int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
is used by code in pa.c and by ASM_DECLARE_FUNCTION_NAME in som.h.
Treating GET_MODE_SIZE as a constant is OK for the former but not
the latter, which is used in target-independent code. This caused
a build failure on hppa2.0w-hp-hpux11.11.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR target/83858
* config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
* config/pa/pa-protos.h (pa_function_arg_size): Declare.
* config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
pa_function_arg_size instead of FUNCTION_ARG_SIZE.
* config/pa/pa.c (pa_function_arg_advance): Likewise.
(pa_function_arg, pa_arg_partial_bytes): Likewise.
(pa_function_arg_size): New function.
From-SVN: r256744
We had:
tree t = fold_vec_perm (type, arg1, arg2,
vec_perm_indices (sel, 2, nelts));
where fold_vec_perm takes a const vec_perm_indices &. GCC 4.1 apparently
required a public copy constructor:
gcc/vec-perm-indices.h:85: error: 'vec_perm_indices::vec_perm_indices(const vec_perm_indices&)' is private
gcc/fold-const.c:11410: error: within this context
even though no copy should be made here. This patch tries to work
around that by constructing the vec_perm_indices separately.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
in a separate statement.
From-SVN: r256740
In the testcase we were trying to group two gather loads, even though
that isn't supported. Fixed by explicitly disallowing grouping of
gathers and scatters.
This problem didn't show up on SVE because there we convert to
IFN_GATHER_LOAD/IFN_SCATTER_STORE pattern statements, which fail
the can_group_stmts_p check.
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-data-refs.c (vect_analyze_data_ref_accesses):
gcc/testsuite/
* gcc.dg/torture/pr83847.c: New test.
From-SVN: r256730
PR rtl-optimization/86620
* params.def (max-sched-ready-insns): Bump minimum value to 1.
* gcc.dg/pr64935-2.c: Use --param=max-sched-ready-insns=1
instead of --param=max-sched-ready-insns=0.
* gcc.target/i386/pr83620.c: New test.
* gcc.dg/pr83620.c: New test.
From-SVN: r256729
PR c++/83817
* pt.c (tsubst_copy_and_build) <case CALL_EXPR>: If function
is AGGR_INIT_EXPR rather than CALL_EXPR, set AGGR_INIT_FROM_THUNK_P
instead of CALL_FROM_THUNK_P.
* g++.dg/cpp1y/pr83817.C: New test.
From-SVN: r256726
PR c++/83825
* name-lookup.c (member_vec_dedup): Return early if len is 0.
(resort_type_member_vec, set_class_bindings,
insert_late_enum_def_bindings): Use vec qsort method instead of
calling qsort directly.
* g++.dg/template/pr83825.C: New test.
From-SVN: r256725
