A couple of small fixes. I noticed bind_template_template_parms was
not marking the parm a template parm (this broke some module
handling). Debugging CALL_EXPR comparisons led me to refactor
cp_tree_equal's CALL_EXPR code (and my recent fix to debug printing of
same). Finally TREE_VECS are best compared by comp_template_args. I
recall that last piece being a left over from fixes during gcc-10.
I've been using it on the modules branch since then.
gcc/cp/
* tree.c (bind_template_template_parm): Mark the parm as a
template parm.
(cp_tree_equal): Refactor CALL_EXPR. Use comp_template_args for
TREE_VECs.
Here are a few cleanups from the modules branch. Generally some RAII,
and a bit of lazy namespace pushing.
gcc/cp/
* rtti.c (init_rtti_processing): Move var decl to its init.
(get_tinfo_decl): Likewise. Break out creation to called helper
...
(get_tinfo_decl_direct): ... here.
(build_dynamic_cast_1): Move var decls to their initializers.
(tinfo_base_init): Set decl's location to BUILTINS_LOCATION.
(get_tinfo_desc): Only push ABI namespace when needed. Set type's
context.
This patch cleans up the interface to the dependency generation a
little. We now only check the option in one place, and the
cpp_get_deps function returns nullptr if there are no dependencies. I
also reworded the -MT and -MQ help text to be make agnostic -- as
there are ideas about emitting, say, JSON.
libcpp/
* include/mkdeps.h: Include cpplib.h
(deps_write): Adjust first parm type.
* mkdeps.c: Include internal.h
(make_write): Adjust first parm type. Check phony option
directly.
(deps_write): Adjust first parm type.
* init.c (cpp_read_main_file): Use get_deps.
* directives.c (cpp_get_deps): Check option before initializing.
gcc/c-family/
* c.opt (MQ,MT): Reword description to be make-agnostic.
gcc/fortran/
* cpp.c (gfc_cpp_add_dep): Only add dependency if we're recording
them.
(gfc_cpp_init): Likewise for target.
This patch enables intrinsics to convert BFloat16 scalar and vector
operands to Float32 modes. The intrinsics are implemented by shifting
each BFloat16 item 16 bits to left using shl/shll/shll2 instructions.
gcc/ChangeLog:
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def(vbfcvt): New entry.
(vbfcvt_high, bfcvt): Likewise.
* config/aarch64/aarch64-simd.md(aarch64_vbfcvt<mode>): New entry.
(aarch64_vbfcvt_highv8bf, aarch64_bfcvtsf): Likewise.
* config/aarch64/arm_bf16.h (vcvtah_f32_bf16): New intrinsic.
* config/aarch64/arm_neon.h (vcvt_f32_bf16): Likewise.
(vcvtq_low_f32_bf16, vcvtq_high_f32_bf16): Likewise.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c
(test_vcvt_f32_bf16, test_vcvtq_low_f32_bf16): New tests.
(test_vcvtq_high_f32_bf16, test_vcvth_f32_bf16): Likewise.
This fixes the bad assumption that sizeof (bool) == 1
2020-11-03 Richard Biener <rguenther@suse.de>
PR bootstrap/97666
* tree-vect-slp.c (vect_build_slp_tree_2): Scale
allocation of skip_args by sizeof (bool).
This prevents failure of an lto test in configurations
missing LTO support, such as VxWorks for kernel mode.
2020-11-02 Olivier Hainque <hainque@adacore.com>
gcc/testsuite/
* gcc.dg/tree-ssa/pr71077.c: Add
dg-require-effective-target lto.
This change adds
/* { dg-require-effective-target fpic } */
to tests in gcc.target/i386 that do use -fpic or -fPIC
but don't currently query the target support.
This corresponds to what many other fpic tests do
and helps the vxWorks ports at least, as -fpic is
typically not supported in at least one of the two
major modes of such port (kernel vs RTP).
2020-11-03 Olivier Hainque <hainque@adacore.com>
gcc/testsuite/
* gcc.target/i386/pr45352-1.c: Add dg-require-effective-target fpic.
* gcc.target/i386/pr47602.c: Likewise.
* gcc.target/i386/pr55151.c: Likewise.
* gcc.target/i386/pr55458.c: Likewise.
* gcc.target/i386/pr56348.c: Likewise.
* gcc.target/i386/pr57097.c: Likewise.
* gcc.target/i386/pr65753.c: Likewise.
* gcc.target/i386/pr65915.c: Likewise.
* gcc.target/i386/pr66232-5.c: Likewise.
* gcc.target/i386/pr66334.c: Likewise.
* gcc.target/i386/pr66819-2.c: Likewise.
* gcc.target/i386/pr67265.c: Likewise.
* gcc.target/i386/pr81481.c: Likewise.
* gcc.target/i386/pr83994.c: Likewise.
gcc/ChangeLog:
2020-11-03 Jan Hubicka <hubicka@ucw.cz>
PR ipa/97578
* ipa-inline-transform.c (maybe_materialize_called_clones): New
function.
(inline_transform): Use it.
gcc/testsuite/ChangeLog:
2020-11-03 Jan Hubicka <hubicka@ucw.cz>
* gcc.c-torture/compile/pr97578.c: New test.
This fixes the cpuid check to always specify a subleaf zero
which is required to detect AVX2 and doesn't hurt for level one.
Without this fix we get zero runtime coverage when -mavx2 is
specified.
2020-11-03 Richard Biener <rguenther@suse.de>
PR testsuite/97688
* gcc.dg/vect/tree-vect.h (check_vect): Fix the x86 cpuid
check to always specify subleaf zero.
This restores not tracking SLP nodes for induction initial values
in not nested context because this interferes with peeling and
epilogue vectorization.
2020-11-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/97678
* tree-vect-slp.c (vect_build_slp_tree_2): Do not track
the initial values of inductions when not nested.
* tree-vect-loop.c (vectorizable_induction): Look at
PHI node initial values again for SLP and not nested
inductions. Handle LOOP_VINFO_MASK_SKIP_NITERS and cost
invariants.
* gcc.dg/vect/pr97678.c: New testcase.
For platforms like Mingw and Cygwin, cygwin refuses to generate the
shared library without using -no-undefined.
Attached patch makes sure the right flags are used, since libtool is
already used to link libstdc++.
libstdc++-v3/ChangeLog:
* src/Makefile.am (libstdc___la_LINK): Add lt_host_flags.
* src/Makefile.in: Regenerate.
Instead of at the location of the 'loop' directive, 'error_at' the location of
the improper clause, and 'inform' at the location of the enclosing parent
compute construct/routine.
The Fortran testcases come with some XFAILing, to be resolved later.
gcc/
* omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for
'gang', 'worker', 'vector' clauses with arguments only allowed in
'kernels' regions.
gcc/testsuite/
* c-c++-common/goacc/pr92793-1.c: Extend.
* gfortran.dg/goacc/pr92793-1.f90: Likewise.
As the discussion in PR96789, we found that some scalar stmts
which can be eliminated by some passes after SLP, but we still
modeled their costs when trying to SLP, it could impact
vectorizer's decision. One typical case is the case in PR96789
on target Power.
As Richard suggested there, this patch is to introduce one pass
called pre_slp_scalar_cleanup which has some secondary clean up
passes, for now they are FRE and DSE. It introduces one new
TODO flags group called pending TODO flags, unlike normal TODO
flags, the pending TODO flags are passed down in the pipeline
until one of its consumers can perform the requested action.
Consumers should then clear the flags for the actions that they
have taken.
Soem compilation time statistics on all SPEC2017 INT bmks were
collected on one Power9 machine for several option sets below:
A1: -Ofast -funroll-loops
A2: -O1
A3: -O1 -funroll-loops
A4: -O2
A5: -O2 -funroll-loops
the corresponding increment rate is trivial:
A1 A2 A3 A4 A5
0.08% 0.00% -0.38% -0.10% -0.05%
Bootstrapped/regtested on powerpc64le-linux-gnu P8.
gcc/ChangeLog:
PR tree-optimization/96789
* function.h (struct function): New member unsigned pending_TODOs.
* passes.c (class pass_pre_slp_scalar_cleanup): New class.
(make_pass_pre_slp_scalar_cleanup): New function.
(pass_data_pre_slp_scalar_cleanup): New pass data.
* passes.def: (pass_pre_slp_scalar_cleanup): New pass, add
pass_fre and pass_dse as its children.
* timevar.def (TV_SCALAR_CLEANUP): New timevar.
* tree-pass.h (PENDING_TODO_force_next_scalar_cleanup): New
pending TODO flag.
(make_pass_pre_slp_scalar_cleanup): New declare.
* tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1):
Once any outermost loop gets unrolled, flag cfun pending_TODOs
PENDING_TODO_force_next_scalar_cleanup on.
gcc/testsuite/ChangeLog:
PR tree-optimization/96789
* gcc.dg/tree-ssa/ssa-dse-28.c: Adjust.
* gcc.dg/tree-ssa/ssa-dse-29.c: Likewise.
* gcc.dg/vect/bb-slp-41.c: Likewise.
* gcc.dg/tree-ssa/pr96789.c: New test.
Previously, the SEH version of _Unwind_Backtrace did unwind
the stack and call the provided callback function as intended,
but there was little the caller could do within the callback to
actually get any info about that particular level in the unwind.
Set the ra and cfa pointers, which are used by _Unwind_GetIP
and _Unwind_GetCFA, to allow using these functions from the
callacb to inspect the state at each stack frame.
2020-09-08 Martin Storsjö <martin@martin.st>
libgcc/
* unwind-seh.c (_Unwind_Backtrace): Set the ra and cfa pointers
before calling the callback.
This moves an #ifdef block of code from calls.c to
targetm.function_ok_for_sibcall. Only two targets, x86 and rs6000,
define REG_PARM_STACK_SPACE or OUTGOING_REG_PARM_STACK_SPACE macros
that might vary depending on the called function. Macros like
UNITS_PER_WORD don't change over a function boundary, nor does the
MIPS ABI, nor does TARGET_64BIT on PA-RISC. Other targets are even
more trivially proven to not need the calls.c code.
Besides cleaning up a small piece of #ifdef code, the motivation for
this patch is to allow tail calls on PowerPC for functions that
require less reg_parm_stack_space than their caller. The original
code in calls.c only permitted tail calls when exactly equal, but on
PowerPC we can tail call if the callee has less or equal
REG_PARM_STACK_SPACE than the caller, as demonstrated by the
testcase. So we should use
/* If reg parm stack space increases, we cannot sibcall. */
if (REG_PARM_STACK_SPACE (decl ? decl : fntype)
> INCOMING_REG_PARM_STACK_SPACE (current_function_decl))
and note the change to use INCOMING_REG_PARM_STACK_SPACE.
REG_PARM_STACK_SPACE has always been wrong there for PowerPC. See
https://gcc.gnu.org/pipermail/gcc-patches/2014-May/389867.html for why
if you're curious. Not that it matters, because PowerPC can do
without this check entirely, relying on a stack slot test in generic
code.
a) The generic code checks that arg passing stack in the callee is not
greater than that in the caller, and,
b) ELFv2 only allocates reg_parm_stack_space when some parameter is
passed on the stack.
Point (b) means that zero reg_parm_stack_space implies zero stack
space, and non-zero reg_parm_stack_space implies non-zero stack
space. So the case of 0 reg_parm_stack_space in the caller and 64 in
the callee will be caught by (a).
gcc/
PR middle-end/97267
* calls.h (maybe_complain_about_tail_call): Declare.
* calls.c (maybe_complain_about_tail_call): Make global.
(can_implement_as_sibling_call_p): Delete reg_parm_stack_space
param. Adjust caller. Move REG_PARM_STACK_SPACE check to..
* config/i386/i386.c (ix86_function_ok_for_sibcall): ..here.
gcc/testsuite/
PR middle-end/97267
* gcc.target/powerpc/pr97267.c: New test.
gcc/ChangeLog:
* ira.c (ira_remove_scratches): Rename to remove_scratches. Make
it static and returning flag of any change.
(ira.c): Call ira_expand_reg_equiv in case of removing scratches.
MMX emulation with SEE is implemented at MMX intrinsic level, not at MMX
instruction level. _mm_maskmove_si64 intrinsic for "MASKMOVQ mm1, mm2"
is emulated with __builtin_ia32_maskmovdqu. Since SSE "MASKMOVQ mm1, mm2"
builtin function, __builtin_ia32_maskmovq, can't be emulated with XMM
registers, make __builtin_ia32_maskmovq also require MMX instead of SSE
only.
gcc/
PR target/97140
* config/i386/i386-expand.c (ix86_expand_builtin): Require MMX
for __builtin_ia32_maskmovq.
gcc/testsuite/
PR target/97140
* gcc.target/i386/pr97140.c: New test.
Move some var decls to their initializers. Correct some whitespace.
gcc/cp/
* decl.c (start_decl_1): Refactor declarations. Fixup some
whitespace.
(lookup_and_check_tag): Fixup some whitespace.
A couple of paths in duplicate decls dealing with templates and
builtins were overly complicated. Fixing thusly.
gcc/cp/
* decl.c (duplicate_decls): Refactor some template & builtin
handling.
Since I redid block-scope extern decls, the need for a uid->decl
hasher has gone away. Deleting thusly.
gcc/cp/
* cp-tree.h (struct cxx_int_tree_map): Delete.
(struct cxx_int_tree_map_hasher): Delete.
* cp-gimplify.c (cxx_int_tree_map_hasher::equal): Delete.
(cxx_int_tree_map_hasher::hash): Delete.
The adoption of P2104 ("Disallow changing concept values") means we can
memoize the result of satisfaction indefinitely and no longer have to
clear the satisfaction caches on various events that would affect
satisfaction. To that end, this patch removes the invalidation routine
clear_satisfaction_cache and adjusts its callers appropriately.
This provides a large reduction in compile time and memory use in some
cases. For example, on the libstdc++ test std/ranges/adaptor/join.cc,
compile time and memory usage drops nearly 75%, from 7.5s/770MB to
2s/230MB, with a --enable-checking=release compiler.
gcc/cp/ChangeLog:
* class.c (finish_struct_1): Don't call clear_satisfaction_cache.
* constexpr.c (clear_cv_and_fold_caches): Likewise. Remove bool
parameter.
* constraint.cc (clear_satisfaction_cache): Remove definition.
* cp-tree.h (clear_satisfaction_cache): Remove declaration.
(clear_cv_and_fold_caches): Remove bool parameter.
* typeck2.c (store_init_value): Remove argument to
clear_cv_and_fold_caches.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-complete1.C: Delete test that became
ill-formed after P2104.
I created a few tests on the modules branch that are not actually
module-related. Here they are.
gcc/testsuite/
* g++.dg/concepts/pack-1.C: New.
* g++.dg/lookup/using53.C: Add an enum.
* g++.dg/template/error25.C: Relax 'export' error check.
This changes more on the modules branch, but let's move the
declaration to the initializer now.
gcc/c-family/
* c-opts.c (c_common_post_options): Move var decl to its
initialization point.
I fell over an ICE where wide_int_to_type_1's expectations of pointer
value caching didn't match that of cache_integer_cst's behaviour. I
don't know why it only exhibited on the modules branch, but it seems
pretty wrong. This patch matches up the behaviours and adds a comment
about that.
gcc/
* tree.c (cache_integer_cst): Fixup pointer caching to match
wide_int_to_type_1's expectations. Add comment.
I noticed the two id_equal functions directly called strcmp. This
changes one of them to call the other with args swapped.
gcc/
* tree.h (id_equal): Call the symetric predicate with swapped
arguments.
In debugging some call-expr handling, I got confused because the debug
printer elided NULL call operands. This changes the printer to display
them as NULL.
gcc/
* print-tree.c (print_node): Display all the operands of a call
expr.
Our macro use hook passes a location, but doesn't recieve it from the
using location. This patch adds the extra location_t parameter and
passes it though.
A second cleanup is breaking out the macro comparison code from the
redefinition warning. That;ll turn out useful for modules.
Finally, there's a filename comparison needed for the location
optimization of rewinding from line 2 (occurs during the emission of
builtin macros).
libcpp/
* internal.h (_cpp_notify_macro_use): Add location parm.
(_cpp_maybe_notify_macro_use): Likewise.
* directives.c (_cpp_do_file_change): Check we've not changed file
when optimizing a rewind.
(do_ifdef): Pass location to _cpp_maybe_notify_macro_use.
(do_ifndef): Likewise. Delete obsolete comment about powerpc.
* expr.c (parse_defined): Pass location to
_cpp_maybe_notify_macro_use.
* macro.c (enter_macro_context): Likewise.
(warn_of_redefinition): Break out helper function. Call it.
(compare_macros): New function broken out of warn_of_redefinition.
(_cpp_new_macro): Zero all fields.
(_cpp_notify_macro_use): Add location parameter.
Currently the testcase in the patch was failing to produce
a 'bti c' at the beginning of the function. This was because
in aarch64_pac_insn_p, we were wrongly returning at the first
check!
2020-10-30 Sudakshina Das <sudi.das@arm.com>
gcc/ChangeLog:
PR target/97638
* config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Update
return value on INSN_P check.
gcc/testsuite/ChangeLog:
PR target/97638
* gcc.target/aarch64/pr97638.c: New test.a
This rewrites SLP induction vectorization to handle different
inductions in the different SLP lanes. It also changes SLP
build to represent the initial value (but not the cycle) so
it can be enhanced to handle outer loop vectorization later.
Note this FAILs gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
because it removes one CSE optimization that no longer works
with non-uniform initial value and step. I'll see to recover
from this after outer loop vectorization of inductions works.
It might be a bit friendlier to variable-size vectors now
but then we're now building the step vector from scalars ...
2020-11-02 Richard Biener <rguenther@suse.de>
* tree.h (build_real_from_wide): Declare.
* tree.c (build_real_from_wide): New function.
* tree-vect-slp.c (vect_build_slp_tree_2): Remove
restriction on induction vectorization, represent
the initial value.
* tree-vect-loop.c (vect_model_induction_cost): Inline ...
(vectorizable_induction): ... here. Rewrite SLP
code generation.
* gcc.dg/vect/slp-49.c: New testcase.
Martin Liška has been asking me to add debug counters to the IPA-CP pass so
that testcase reductions are easier. The pass already has one for the bit
value propagation, so this patch adds one for value_range propagation
and one for the actual constant propagation.
gcc/ChangeLog:
2020-10-30 Martin Jambor <mjambor@suse.cz>
* dbgcnt.def (ipa_cp_values): New counter.
(ipa_cp_vr): Likewise.
* ipa-cp.c (decide_about_value): Check and bump ipa_cp_values debug
counter.
(decide_whether_version_node): Likewise.
(ipcp_store_vr_results):Check and bump ipa_cp_vr debug counter.
When -mpure-code is used, we cannot load delta from code memory (like
we do without -mpure-code).
This patch builds the value of mi_delta into r3 with a series of
movs/adds/lsls.
We also do some cleanup by not emitting the function address and delta
via .word directives at the end of the thunk since we don't use them
with -mpure-code.
No need for new testcases, this bug was already identified by:
g++.dg/ipa/pr46287-3.C
g++.dg/ipa/pr46984.C
g++.dg/opt/thunk1.C
g++.dg/torture/pr46287.C
g++.dg/torture/pr45699.C
2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm.c (arm_thumb1_mi_thunk): Build mi_delta in r3 and
do not emit function address and delta when -mpure-code is used.
thumb1_movsi_insn used the same algorithm to build a constant in asm
than thumb1_gen_const_int_1 does in RTL. Since the previous patch added
support for asm generation in thumb1_gen_const_int_1, this patch calls
it from thumb1_movsi_insn to avoid duplication.
We need to introduce a new proxy function, thumb1_gen_const_int_print
to select the right template.
This patch also adds a new testcase as the updated alternative is only
used by thumb-1 processors that also support movt/movw.
2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/thumb1.md (thumb1_movsi_insn): Call
thumb1_gen_const_int_print.
* config/arm/arm-protos.h (thumb1_gen_const_int_print): Add
prototype.
* config/arm/arm.c (thumb1_gen_const_int_print): New.
gcc/testsuite/
* gcc.target/arm/pure-code/no-literal-pool-m23.c: New.
Enable thumb1_gen_const_int to generate RTL or asm depending on the
context, so that we avoid duplicating code to handle constants in
Thumb-1 with -mpure-code.
Use a template so that the algorithm is effectively shared, and
rely on two classes to handle the actual emission as RTL or asm.
The generated sequence is improved to handle right-shiftable and small
values with less instructions. We now generate:
128:
movs r0, r0, #128
264:
movs r3, #33
lsls r3, #3
510:
movs r3, #255
lsls r3, #1
512:
movs r3, #1
lsls r3, #9
764:
movs r3, #191
lsls r3, #2
65536:
movs r3, #1
lsls r3, #16
0x123456:
movs r3, #18 ;0x12
lsls r3, #8
adds r3, #52 ;0x34
lsls r3, #8
adds r3, #86 ;0x56
0x1123456:
movs r3, #137 ;0x89
lsls r3, #8
adds r3, #26 ;0x1a
lsls r3, #8
adds r3, #43 ;0x2b
lsls r3, #1
0x1000010:
movs r3, #16
lsls r3, #16
adds r3, #1
lsls r3, #4
0x1000011:
movs r3, #1
lsls r3, #24
adds r3, #17
-8192:
movs r3, #1
lsls r3, #13
rsbs r3, #0
The patch adds a testcase which does not fully exercise
thumb1_gen_const_int, as other existing patterns already catch small
constants. These parts of thumb1_gen_const_int are used by
arm_thumb1_mi_thunk.
2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm.c (thumb1_const_rtl, thumb1_const_print): New
classes.
(thumb1_gen_const_int): Rename to ...
(thumb1_gen_const_int_1): ... New helper function. Add capability
to emit either RTL or asm, improve generated code.
(thumb1_gen_const_int_rtl): New function.
* config/arm/arm-protos.h (thumb1_gen_const_int): Rename to
thumb1_gen_const_int_rtl.
* config/arm/thumb1.md: Call thumb1_gen_const_int_rtl instead
of thumb1_gen_const_int.
gcc/testsuite/
* gcc.target/arm/pure-code/no-literal-pool-m0.c: New.
