157011 Commits

Author SHA1 Message Date
Richard Sandiford
cae115d6d4 Add wide_int version of inchash:#️⃣:add_wide_int
This patch adds an inchash hasher for wide_int-based types.
It means that hash_tree no longer hashes TREE_INT_CST_EXT_NUNITS,
but that was redundant with hashing the type.

2017-10-22  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* inchash.h (inchash:#️⃣:add_wide_int): New function.
	* lto-streamer-out.c (hash_tree): Use it.

From-SVN: r253988
2017-10-22 21:04:02 +00:00
Richard Sandiford
449e9a3388 Rename inchash:#️⃣:add_wide_int
The name inchash::add_wide_int is a bit misleading, since it sounds
like it's hashing a wide_int.  This patch renames it to add_hwi instead.

2017-10-22  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* inchash.h (inchash:#️⃣:add_wide_int): Rename to...
	(inchash:#️⃣:add_hwi): ...this.
	* ipa-devirt.c (hash_odr_vtable): Update accordingly.
	(polymorphic_call_target_hasher::hash): Likewise.
	* ipa-icf.c (sem_function::get_hash, sem_function::init): Likewise.
	(sem_item::add_expr, sem_item::add_type, sem_variable::get_hash)
	(sem_item_optimizer::update_hash_by_addr_refs): Likewise.
	* lto-streamer-out.c (hash_tree): Likewise.
	* optc-save-gen.awk: Likewise.
	* tree.c (add_expr): Likewise.

From-SVN: r253987
2017-10-22 20:42:06 +00:00
Uros Bizjak
ef1e383671 re PR target/52451 (gcc w/i387 float generates fucom rather than fcom for floating point comparsons)
PR target/52451
	* config/i386/i386.c (ix86_fp_compare_mode): Return CCFPmode
	for ordered inequality comparisons even with TARGET_IEEE_FP.

testsuite/ChangeLog:

	PR target/52451
	* gcc.dg/torture/pr52451.c: New test.

From-SVN: r253986
2017-10-22 21:04:36 +02:00
Uros Bizjak
8cc857f949 re PR rtl-optimization/82628 (wrong code at -Os on x86_64-linux-gnu in the 32-bit mode)
PR target/82628
	* config/i386/i386.md (cmp<dwi>_doubleword): New pattern.
	* config/i386/i386.c (ix86_expand_branch) <case E_TImode>:
	Expand with cmp<dwi>_doubleword.

testsuite/ChangeLog:

	PR target/82628
	* gcc.dg/torture/pr82628.c: New test.


Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r253985
2017-10-22 20:05:17 +02:00
Igor Tsimbalist
00c378a954 Move 2 tests from c-c++-common/ to gcc.target/i386/ directory.
* c-c++-common/attr-nocf-check-1a.c: Remove test.
	* c-c++-common/attr-nocf-check-3a.c: Likewise.
	* gcc.target/i386/attr-nocf-check-1a.c: Add test.
	* gcc.target/i386/attr-nocf-check-3a.c: Likewise.

From-SVN: r253984
2017-10-22 18:32:08 +02:00
GCC Administrator
77a657bfc0 Daily bump.
From-SVN: r253982
2017-10-22 00:16:14 +00:00
Igor Tsimbalist
9ae222ad79 Add x86 tests for Intel CET implementation.
gcc/testsuite/

	* c-c++-common/attr-nocf-check-1.c: Shorten a cheking message.
	* c-c++-common/attr-nocf-check-3.c: Likewise.
	* c-c++-common/fcf-protection-1.c: Add x86 specific message.
	* c-c++-common/fcf-protection-2.c: Likewise.
	* c-c++-common/fcf-protection-3.c: Likewise.
	* c-c++-common/fcf-protection-5.c: Likewise.
	* c-c++-common/attr-nocf-check-1a.c: New test.
	* c-c++-common/attr-nocf-check-3a.c: Likewise.
	* g++.dg/cet-notrack-1.C: Likewise.
	* gcc.target/i386/cet-intrin-1.c: Likewise.
	* gcc.target/i386/cet-intrin-10.c: Likewise.
	* gcc.target/i386/cet-intrin-2.c: Likewise.
	* gcc.target/i386/cet-intrin-3.c: Likewise.
	* gcc.target/i386/cet-intrin-4.c: Likewise.
	* gcc.target/i386/cet-intrin-5.c: Likewise.
	* gcc.target/i386/cet-intrin-6.c: Likewise.
	* gcc.target/i386/cet-intrin-7.c: Likewise.
	* gcc.target/i386/cet-intrin-8.c: Likewise.
	* gcc.target/i386/cet-intrin-9.c: Likewise.
	* gcc.target/i386/cet-label.c: Likewise.
	* gcc.target/i386/cet-notrack-1a.c: Likewise.
	* gcc.target/i386/cet-notrack-1b.c: Likewise.
	* gcc.target/i386/cet-notrack-2a.c: Likewise.
	* gcc.target/i386/cet-notrack-2b.c: Likewise.
	* gcc.target/i386/cet-notrack-3.c: Likewise.
	* gcc.target/i386/cet-notrack-4a.c: Likewise.
	* gcc.target/i386/cet-notrack-4b.c: Likewise.
	* gcc.target/i386/cet-notrack-5a.c: Likewise.
	* gcc.target/i386/cet-notrack-5b.c: Likewise.
	* gcc.target/i386/cet-notrack-6a.c: Likewise.
	* gcc.target/i386/cet-notrack-6b.c: Likewise.
	* gcc.target/i386/cet-notrack-7.c: Likewise.
	* gcc.target/i386/cet-property-1.c: Likewise.
	* gcc.target/i386/cet-property-2.c: Likewise.
	* gcc.target/i386/cet-rdssp-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-2.c: Likewise.
	* gcc.target/i386/cet-sjlj-3.c: Likewise.
	* gcc.target/i386/cet-switch-1.c: Likewise.
	* gcc.target/i386/cet-switch-2.c: Likewise.
	* lib/target-supports.exp (check_effective_target_cet): New
	proc.

From-SVN: r253979
2017-10-21 23:33:41 +02:00
Igor Tsimbalist
ccdf009d81 Add x86 CET documentation.
gcc/doc/
	* extend.texi: Add x86 specific to 'nocf_check' attribute.
	List CET intrinsics.
	* invoke.texi: Add -mcet, -mibt, -mshstk options.  Add x86
	specific to -fcf-protection option.

From-SVN: r253978
2017-10-21 23:16:32 +02:00
Igor Tsimbalist
2a25448c49 Update x86 backend to enable Intel CET.
All platforms except i386 will report the error and do no
instrumentation with -finstrument-control-flow option. i386
will provide the implementation based on a specification
published by Intel for a new technology called Control-flow
Enforcement Technology (CET). The spec is available at

https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

The implementation in this patch:
1) enables Control-flow Enforcement Technology (CET), published by
Intel. This part introduces i386 specific options -mcet, -mibt and
-mshstk, new instructions and intrinsics;

2) provides support for -fcf-protection option and 'nocf_check'
attribute by doing needed code instrumentation, which is based on
CET features.

gcc/

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET): New.
	(OPTION_MASK_ISA_SHSTK_SET): Likewise.
	(OPTION_MASK_ISA_IBT_UNSET): Likewise.
	(OPTION_MASK_ISA_SHSTK_UNSET): Likewise.
	(ix86_handle_option): Add -mibt, -mshstk, -mcet handling.
	* config.gcc (extra_headers): Add cetintrin.h for x86 targets.
	(extra_objs): Add cet.o for Linux/x86 targets.
	(tmake_file): Add i386/t-cet for Linux/x86 targets.
	* config/i386/cet.c: New file.
	* config/i386/cetintrin.h: Likewise.
	* config/i386/t-cet: Likewise.
	* config/i386/cpuid.h (bit_SHSTK): New.
	(bit_IBT): Likewise.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect and
	pass IBT and SHSTK bits.
	* config/i386/i386-builtin-types.def
	(VOID_FTYPE_UNSIGNED_PVOID): New.
	(VOID_FTYPE_UINT64_PVOID): Likewise.
	* config/i386/i386-builtin.def: Add CET intrinsics.
	* config/i386/i386-c.c (ix86_target_macros_internal): Add
	OPTION_MASK_ISA_IBT, OPTION_MASK_ISA_SHSTK handling.
	* config/i386/i386-passes.def: Add pass_insert_endbranch pass.
	* config/i386/i386-protos.h (make_pass_insert_endbranch): New
	prototype.
	* config/i386/i386.c (rest_of_insert_endbranch): New.
	(pass_data_insert_endbranch): Likewise.
	(pass_insert_endbranch): Likewise.
	(make_pass_insert_endbranch): Likewise.
	(ix86_notrack_prefixed_insn_p): Likewise.
	(ix86_target_string): Add -mibt, -mshstk flags.
	(ix86_option_override_internal): Add flag_cf_protection
	processing.
	(ix86_valid_target_attribute_inner_p): Set OPT_mibt, OPT_mshstk.
	(ix86_print_operand): Add 'notrack' prefix output.
	(ix86_init_mmx_sse_builtins): Add CET intrinsics.
	(ix86_expand_builtin): Expand CET intrinsics.
	(x86_output_mi_thunk): Add 'endbranch' instruction.
	* config/i386/i386.h (TARGET_IBT): New.
	(TARGET_IBT_P): Likewise.
	(TARGET_SHSTK): Likewise.
	(TARGET_SHSTK_P): Likewise.
	   * config/i386/i386.md (unspecv): Add UNSPECV_NOP_RDSSP,
	UNSPECV_INCSSP, UNSPECV_SAVEPREVSSP, UNSPECV_RSTORSSP,
	UNSPECV_WRSS, UNSPECV_WRUSS, UNSPECV_SETSSBSY, UNSPECV_CLRSSBSY.
	(builtin_setjmp_setup): New pattern.
	(builtin_longjmp): Likewise.
	(rdssp<mode>): Likewise.
	(incssp<mode>): Likewise.
	(saveprevssp): Likewise.
	(rstorssp): Likewise.
	(wrss<mode>): Likewise.
	(wruss<mode>): Likewise.
	(setssbsy): Likewise.
	(clrssbsy): Likewise.
	(nop_endbr): Likewise.
	* config/i386/i386.opt: Add -mcet, -mibt, -mshstk and -mcet-switch
	options.
	* config/i386/immintrin.h: Include <cetintrin.h>.
	* config/i386/linux-common.h
	(file_end_indicate_exec_stack_and_cet): New prototype.
	(TARGET_ASM_FILE_END): New.

From-SVN: r253977
2017-10-21 23:09:53 +02:00
Jan Hubicka
f6fd8f2bd4 pr79683.c: Disable costmodel.
* gcc.target/i386/pr79683.c: Disable costmodel.
	* i386.c (ix86_builtin_vectorization_cost): Use existing rtx_cost
	latencies instead of having separate table; make difference between
	integer and float costs.
	* i386.h (processor_costs): Remove scalar_stmt_cost,
	scalar_load_cost, scalar_store_cost, vec_stmt_cost, vec_to_scalar_cost,
	scalar_to_vec_cost, vec_align_load_cost, vec_unalign_load_cost,
	vec_store_cost.
	* x86-tune-costs.h: Remove entries which has been removed in
	procesor_costs from all tables; make cond_taken_branch_cost
	and cond_not_taken_branch_cost COST_N_INSNS based.
Index: testsuite/gcc.target/i386/pr79683.c
===================================================================
--- testsuite/gcc.target/i386/pr79683.c	(revision 253957)
+++ testsuite/gcc.target/i386/pr79683.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O3 -msse2" } */
+/* { dg-options "-O3 -msse2 -fvect-cost-model=unlimited" } */
 
 struct s {
     __INT64_TYPE__ a;
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 253957)
+++ config/i386/i386.c	(working copy)
@@ -44051,37 +44051,61 @@ static int
 ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
                                  tree vectype, int)
 {
+  bool fp = false;
+  machine_mode mode = TImode;
+  if (vectype != NULL)
+    {
+      fp = FLOAT_TYPE_P (vectype);
+      mode = TYPE_MODE (vectype);
+    }
+
   switch (type_of_cost)
     {
       case scalar_stmt:
-        return ix86_cost->scalar_stmt_cost;
+        return fp ? ix86_cost->addss : COSTS_N_INSNS (1);
 
       case scalar_load:
-        return ix86_cost->scalar_load_cost;
+	/* load/store costs are relative to register move which is 2. Recompute
+ 	   it to COSTS_N_INSNS so everything have same base.  */
+        return COSTS_N_INSNS (fp ? ix86_cost->sse_load[0]
+			      : ix86_cost->int_load [2]) / 2;
 
       case scalar_store:
-        return ix86_cost->scalar_store_cost;
+        return COSTS_N_INSNS (fp ? ix86_cost->sse_store[0]
+			      : ix86_cost->int_store [2]) / 2;
 
       case vector_stmt:
-        return ix86_cost->vec_stmt_cost;
+        return ix86_vec_cost (mode,
+			      fp ? ix86_cost->addss : ix86_cost->sse_op,
+			      true);
 
       case vector_load:
-        return ix86_cost->vec_align_load_cost;
+        return ix86_vec_cost (mode,
+			      COSTS_N_INSNS (ix86_cost->sse_load[2]) / 2,
+			      true);
 
       case vector_store:
-        return ix86_cost->vec_store_cost;
+        return ix86_vec_cost (mode,
+			      COSTS_N_INSNS (ix86_cost->sse_store[2]) / 2,
+			      true);
 
       case vec_to_scalar:
-        return ix86_cost->vec_to_scalar_cost;
-
       case scalar_to_vec:
-        return ix86_cost->scalar_to_vec_cost;
+        return ix86_vec_cost (mode, ix86_cost->sse_op, true);
 
+      /* We should have separate costs for unaligned loads and gather/scatter.
+	 Do that incrementally.  */
       case unaligned_load:
-      case unaligned_store:
       case vector_gather_load:
+        return ix86_vec_cost (mode,
+			      COSTS_N_INSNS (ix86_cost->sse_load[2]),
+			      true);
+
+      case unaligned_store:
       case vector_scatter_store:
-        return ix86_cost->vec_unalign_load_cost;
+        return ix86_vec_cost (mode,
+			      COSTS_N_INSNS (ix86_cost->sse_store[2]),
+			      true);
 
       case cond_branch_taken:
         return ix86_cost->cond_taken_branch_cost;
@@ -44091,10 +44115,11 @@ ix86_builtin_vectorization_cost (enum ve
 
       case vec_perm:
       case vec_promote_demote:
-        return ix86_cost->vec_stmt_cost;
+        return ix86_vec_cost (mode,
+			      ix86_cost->sse_op, true);
 
       case vec_construct:
-	return ix86_cost->vec_stmt_cost * (TYPE_VECTOR_SUBPARTS (vectype) - 1);
+	return ix86_vec_cost (mode, ix86_cost->sse_op, false);
 
       default:
         gcc_unreachable ();
Index: config/i386/i386.h
===================================================================
--- config/i386/i386.h	(revision 253957)
+++ config/i386/i386.h	(working copy)
@@ -277,18 +277,6 @@ struct processor_costs {
 				   parallel.  See also
 				   ix86_reassociation_width.  */
   struct stringop_algs *memcpy, *memset;
-  const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
-				   load and store.  */
-  const int scalar_load_cost;   /* Cost of scalar load.  */
-  const int scalar_store_cost;  /* Cost of scalar store.  */
-  const int vec_stmt_cost;      /* Cost of any vector operation, excluding
-                                   load, store, vector-to-scalar and
-                                   scalar-to-vector operation.  */
-  const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
-  const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
-  const int vec_align_load_cost;   /* Cost of aligned vector load.  */
-  const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
-  const int vec_store_cost;        /* Cost of vector store.  */
   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
 					  cost model.  */
   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
Index: config/i386/x86-tune-costs.h
===================================================================
--- config/i386/x86-tune-costs.h	(revision 253958)
+++ config/i386/x86-tune-costs.h	(working copy)
@@ -79,17 +79,8 @@ struct processor_costs ix86_size_cost =
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   ix86_size_memcpy,
   ix86_size_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  1,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  1,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_BYTES (1),			/* cond_taken_branch_cost.  */
+  COSTS_N_BYTES (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* Processor costs (relative to an add) */
@@ -167,17 +158,8 @@ struct processor_costs i386_cost = {	/*
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   i386_memcpy,
   i386_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs i486_memcpy[2] = {
@@ -256,17 +238,8 @@ struct processor_costs i486_cost = {	/*
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   i486_memcpy,
   i486_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs pentium_memcpy[2] = {
@@ -343,17 +316,8 @@ struct processor_costs pentium_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   pentium_memcpy,
   pentium_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static const
@@ -423,17 +387,8 @@ struct processor_costs lakemont_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   pentium_memcpy,
   pentium_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* PentiumPro has optimized rep instructions for blocks aligned by 8 bytes
@@ -518,17 +473,8 @@ struct processor_costs pentiumpro_cost =
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   pentiumpro_memcpy,
   pentiumpro_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs geode_memcpy[2] = {
@@ -605,17 +551,8 @@ struct processor_costs geode_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   geode_memcpy,
   geode_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs k6_memcpy[2] = {
@@ -694,17 +631,8 @@ struct processor_costs k6_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   k6_memcpy,
   k6_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* For some reason, Athlon deals better with REP prefix (relative to loops)
@@ -784,17 +712,8 @@ struct processor_costs athlon_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   athlon_memcpy,
   athlon_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* K8 has optimized REP instruction for medium sized blocks, but for very
@@ -883,17 +802,8 @@ struct processor_costs k8_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   k8_memcpy,
   k8_memset,
-  4,					/* scalar_stmt_cost.  */
-  2,					/* scalar load_cost.  */
-  2,					/* scalar_store_cost.  */
-  5,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  2,					/* vec_align_load_cost.  */
-  3,					/* vec_unalign_load_cost.  */
-  3,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
 /* AMDFAM10 has optimized REP instruction for medium sized blocks, but for
@@ -989,17 +899,8 @@ struct processor_costs amdfam10_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   amdfam10_memcpy,
   amdfam10_memset,
-  4,					/* scalar_stmt_cost.  */
-  2,					/* scalar load_cost.  */
-  2,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  2,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  2,					/* vec_store_cost.  */
-  2,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /*  BDVER1 has optimized REP instruction for medium sized blocks, but for
@@ -1097,17 +998,8 @@ const struct processor_costs bdver1_cost
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   bdver1_memcpy,
   bdver1_memset,
-  6,					/* scalar_stmt_cost.  */
-  4,					/* scalar load_cost.  */
-  4,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  4,					/* vec_align_load_cost.  */
-  4,					/* vec_unalign_load_cost.  */
-  4,					/* vec_store_cost.  */
-  4,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (4),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
 /*  BDVER2 has optimized REP instruction for medium sized blocks, but for
@@ -1206,17 +1098,8 @@ const struct processor_costs bdver2_cost
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   bdver2_memcpy,
   bdver2_memset,
-  6,					/* scalar_stmt_cost.  */
-  4,					/* scalar load_cost.  */
-  4,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  4,					/* vec_align_load_cost.  */
-  4,					/* vec_unalign_load_cost.  */
-  4,					/* vec_store_cost.  */
-  4,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (4),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
 
@@ -1306,17 +1189,8 @@ struct processor_costs bdver3_cost = {
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   bdver3_memcpy,
   bdver3_memset,
-  6,					/* scalar_stmt_cost.  */
-  4,					/* scalar load_cost.  */
-  4,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  4,					/* vec_align_load_cost.  */
-  4,					/* vec_unalign_load_cost.  */
-  4,					/* vec_store_cost.  */
-  4,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (4),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
 /*  BDVER4 has optimized REP instruction for medium sized blocks, but for
@@ -1405,17 +1279,8 @@ struct processor_costs bdver4_cost = {
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   bdver4_memcpy,
   bdver4_memset,
-  6,					/* scalar_stmt_cost.  */
-  4,					/* scalar load_cost.  */
-  4,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  4,					/* vec_align_load_cost.  */
-  4,					/* vec_unalign_load_cost.  */
-  4,					/* vec_store_cost.  */
-  4,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (4),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
 
@@ -1524,17 +1389,8 @@ struct processor_costs znver1_cost = {
   4, 4, 3, 6,				/* reassoc int, fp, vec_int, vec_fp.  */
   znver1_memcpy,
   znver1_memset,
-  6,					/* scalar_stmt_cost.  */
-  4,					/* scalar load_cost.  */
-  4,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  4,					/* vec_align_load_cost.  */
-  4,					/* vec_unalign_load_cost.  */
-  4,					/* vec_store_cost.  */
-  4,					/* cond_taken_branch_cost.  */
-  2,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (4),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_not_taken_branch_cost.  */
 };
 
   /* BTVER1 has optimized REP instruction for medium sized blocks, but for
@@ -1624,17 +1480,8 @@ const struct processor_costs btver1_cost
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   btver1_memcpy,
   btver1_memset,
-  4,					/* scalar_stmt_cost.  */
-  2,					/* scalar load_cost.  */
-  2,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  2,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  2,					/* vec_store_cost.  */
-  2,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs btver2_memcpy[2] = {
@@ -1721,17 +1568,8 @@ const struct processor_costs btver2_cost
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   btver2_memcpy,
   btver2_memset,
-  4,					/* scalar_stmt_cost.  */
-  2,					/* scalar load_cost.  */
-  2,					/* scalar_store_cost.  */
-  6,					/* vec_stmt_cost.  */
-  0,					/* vec_to_scalar_cost.  */
-  2,					/* scalar_to_vec_cost.  */
-  2,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  2,					/* vec_store_cost.  */
-  2,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (2),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs pentium4_memcpy[2] = {
@@ -1809,17 +1647,8 @@ struct processor_costs pentium4_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   pentium4_memcpy,
   pentium4_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs nocona_memcpy[2] = {
@@ -1900,17 +1729,8 @@ struct processor_costs nocona_cost = {
   1, 1, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   nocona_memcpy,
   nocona_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs atom_memcpy[2] = {
@@ -1989,17 +1809,8 @@ struct processor_costs atom_cost = {
   2, 2, 2, 2,				/* reassoc int, fp, vec_int, vec_fp.  */
   atom_memcpy,
   atom_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs slm_memcpy[2] = {
@@ -2078,17 +1889,8 @@ struct processor_costs slm_cost = {
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   slm_memcpy,
   slm_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  4,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 static stringop_algs intel_memcpy[2] = {
@@ -2167,17 +1969,8 @@ struct processor_costs intel_cost = {
   1, 4, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   intel_memcpy,
   intel_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  4,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* Generic should produce code tuned for Core-i7 (and newer chips)
@@ -2265,17 +2058,8 @@ struct processor_costs generic_cost = {
   1, 2, 1, 1,				/* reassoc int, fp, vec_int, vec_fp.  */
   generic_memcpy,
   generic_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };
 
 /* core_cost should produce code tuned for Core familly of CPUs.  */
@@ -2366,16 +2150,7 @@ struct processor_costs core_cost = {
   1, 4, 2, 2,				/* reassoc int, fp, vec_int, vec_fp.  */
   core_memcpy,
   core_memset,
-  1,					/* scalar_stmt_cost.  */
-  1,					/* scalar load_cost.  */
-  1,					/* scalar_store_cost.  */
-  1,					/* vec_stmt_cost.  */
-  1,					/* vec_to_scalar_cost.  */
-  1,					/* scalar_to_vec_cost.  */
-  1,					/* vec_align_load_cost.  */
-  2,					/* vec_unalign_load_cost.  */
-  1,					/* vec_store_cost.  */
-  3,					/* cond_taken_branch_cost.  */
-  1,					/* cond_not_taken_branch_cost.  */
+  COSTS_N_INSNS (3),			/* cond_taken_branch_cost.  */
+  COSTS_N_INSNS (1),			/* cond_not_taken_branch_cost.  */
 };

From-SVN: r253975
2017-10-21 11:53:33 +00:00
Eric Botcazou
0071b8a19b * gcc-interface/Makefile.in: Remove bogus settings for VxWorks.
From-SVN: r253973
2017-10-21 10:40:08 +00:00
Eric Botcazou
8c282abad5 Fix typos
From-SVN: r253972
2017-10-21 10:05:33 +00:00
Eric Botcazou
f330b1eca9 utils.c (pad_type_hash): Use hashval_t for hash value.
* gcc-interface/utils.c (pad_type_hash): Use hashval_t for hash value.
	(convert): Do not use an unchecked conversion for converting from a
	type to another type padding it.

From-SVN: r253971
2017-10-21 09:53:50 +00:00
Paul Thomas
de624beeae re PR fortran/82586 ([PDT] ICE: write_symbol(): bad module symbol)
2017-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82586
	* decl.c (gfc_get_pdt_instance): Remove the error message that
	the parameter does not have a corresponding component since
	this is now taken care of when the derived type is resolved. Go
	straight to error return instead.
	(gfc_match_formal_arglist): Make the PDT relevant errors
	immediate so that parsing of the derived type can continue.
	(gfc_match_derived_decl): Do not check the match status on
	return from gfc_match_formal_arglist for the same reason.
	* resolve.c (resolve_fl_derived0): Check that each type
	parameter has a corresponding component.

	PR fortran/82587
	* resolve.c (resolve_generic_f): Check that the derived type
	can be used before resolving the struture constructor.

	PR fortran/82589
	* symbol.c (check_conflict): Add the conflicts involving PDT
	KIND and LEN attributes.

2017-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82586
	* gfortran.dg/pdt_16.f03 : New test.
	* gfortran.dg/pdt_4.f03 : Catch the changed messages.
	* gfortran.dg/pdt_8.f03 : Ditto.

	PR fortran/82587
	* gfortran.dg/pdt_17.f03 : New test.

	PR fortran/82589
	* gfortran.dg/pdt_18.f03 : New test.

From-SVN: r253970
2017-10-21 09:02:17 +00:00
Eric Botcazou
aa93ca090e Fix wording
From-SVN: r253969
2017-10-21 08:25:13 +00:00
Jonathan Wakely
dfdf2839b5 Fix invalid path::iterator test
* testsuite/experimental/filesystem/path/itr/traversal.cc: Do not
	increment past-the-end iterators.

From-SVN: r253967
2017-10-21 02:16:43 +01:00
GCC Administrator
f154c1fafc Daily bump.
From-SVN: r253966
2017-10-21 00:16:17 +00:00
Jonathan Wakely
233fa165ad Update value of __cpp_lib_chrono feature-test macro
* include/std/chrono (__cpp_lib_chrono): Update macro value to
	indicate support for P0505R0.
	* testsuite/20_util/duration/arithmetic/constexpr_c++17.cc: Check
	for updated macro.

From-SVN: r253959
2017-10-20 22:05:11 +01:00
Jan Hubicka
af8630301d * x86-tune-costs.h (intel_cost, generic_cost): Fix move costs.
From-SVN: r253958
2017-10-20 20:51:50 +00:00
Ian Lance Taylor
001cbba0ef debug/dwarf: support 64-bit DWARF in byte order check
Also fix 64-bit DWARF to read a 64-bit abbrev offset in the
    compilation unit.
    
    This is a backport of https://golang.org/cl/71171, which will be in
    the Go 1.10 release, to the gofrontend copy. Doing it now because AIX
    is pretty much the only system that uses 64-bit DWARF.
    
    Reviewed-on: https://go-review.googlesource.com/72250

From-SVN: r253955
2017-10-20 18:34:36 +00:00
Nathan Sidwell
9401eb0730 [C++ PATCH] AS_BASETYPE
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01376.html
	* class.c (layout_class_type): Cleanup as-base creation, determine
	mode here.
	(finish_struct_1): ... not here.

From-SVN: r253954
2017-10-20 18:30:48 +00:00
Jonathan Wakely
253e8d2150 Define __cpp_lib_byte feature-test macro
* include/c_global/cstddef: Define __cpp_lib_byte feature-test macro.
	* testsuite/18_support/byte/requirements.cc: Check macro.

From-SVN: r253952
2017-10-20 19:02:19 +01:00
Igor Tsimbalist
b0926447b5 Add tests for -fcf-protection option and nocf_check attribute.
* c-c++-common/fcf-protection-1.c: New test.
	* c-c++-common/fcf-protection-2.c: Likewise.
	* c-c++-common/fcf-protection-3.c: Likewise.
	* c-c++-common/fcf-protection-4.c: Likewise.
	* c-c++-common/fcf-protection-5.c: Likewise.
	* c-c++-common/attr-nocf-check-1.c: Likewise.
	* c-c++-common/attr-nocf-check-2.c: Likewise.
	* c-c++-common/attr-nocf-check-3.c: Likewise.

From-SVN: r253949
2017-10-20 19:29:02 +02:00
Pierre-Marie de Rodat
c840bf9bc9 s-osinte__linux.ads (Relative_Timed_Wait): Add variable needed for using monotonic clock.
gcc/ada/

2017-10-20  Doug Rupp  <rupp@adacore.com>

	* libgnarl/s-osinte__linux.ads (Relative_Timed_Wait): Add variable
	needed for using monotonic clock.
	* libgnarl/s-taprop__linux.adb: Revert previous monotonic clock
	changes.
	* libgnarl/s-taprop__linux.adb, s-taprop__posix.adb: Unify and factor
	out monotonic clock related functions body.
	(Timed_Sleep, Timed_Delay, Montonic_Clock, RT_Resolution,
	Compute_Deadline): Move to...
	* libgnarl/s-tpopmo.adb: ... here. New separate package body.

2017-10-20  Ed Schonberg  <schonberg@adacore.com>

	* sem_util.adb (Is_Controlling_Limited_Procedure): Handle properly the
	case where the controlling formal is an anonymous access to interface
	type.
	* exp_ch9.adb (Extract_Dispatching_Call): If controlling actual is an
	access type, handle properly the the constructed dereference that
	designates the object used in the rewritten synchronized call.
	(Parameter_Block_Pack): If the type of the actual is by-copy, its
	generated declaration in the parameter block does not need an
	initialization even if the type is a null-excluding access type,
	because it will be initialized with the value of the actual later on.
	(Parameter_Block_Pack): Do not add controlling actual to parameter
	block when its type is by-copy.

2017-10-20  Justin Squirek  <squirek@adacore.com>

	* sem_ch8.adb (Update_Use_Clause_Chain): Add sanity check to verify
	scope stack traversal into the context clause.

gcc/testsuite/

2017-10-20  Ed Schonberg  <schonberg@adacore.com>

	* gnat.dg/sync_iface_call.adb, gnat.dg/sync_iface_call_pkg.ads,
	gnat.dg/sync_iface_call_pkg2.adb, gnat.dg/sync_iface_call_pkg2.ads:
	New testcase.

From-SVN: r253948
2017-10-20 17:02:37 +00:00
Pierre-Marie de Rodat
8ce6219665 [multiple changes]
2017-10-20  Bob Duff  <duff@adacore.com>

	* sinfo.ads: Fix a comment typo.

2017-10-20  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/gnat_ugn/building_executable_programs_with_gnat.rst (-flto): Add
	warning against usage in conjunction with -gnatn.
	(-fdump-xref): Delete entry.
	* doc/gnat_ugn/gnat_utility_programs.rst (--ext): Remove mention of
	-fdump-xref switch.
	* gnat_ugn.texi: Regenerate.

2017-10-20  Hristian Kirtchev  <kirtchev@adacore.com>

	* sem_type.adb, exp_util.adb, sem_util.adb, sem_dim.adb, sem_elab.adb:
	Minor reformatting.

From-SVN: r253947
2017-10-20 16:27:32 +00:00
Pierre-Marie de Rodat
5664fd68a1 Add ChangeLog entries, missing from last commit
From-SVN: r253946
2017-10-20 16:20:40 +00:00
Pierre-Marie de Rodat
8f8f531f0d sem_dim.adb (Analyze_Dimension_Binary_Op): Accept with a warning to compare a dimensioned expression with a literal.
gcc/ada/

2017-10-20  Yannick Moy  <moy@adacore.com>

	* sem_dim.adb (Analyze_Dimension_Binary_Op): Accept with a warning to
	compare a dimensioned expression with a literal.
	(Dim_Warning_For_Numeric_Literal): Do not issue a warning for the
	special value zero.
	* doc/gnat_ugn/gnat_and_program_execution.rst: Update description of
	dimensionality system in GNAT.
	* gnat_ugn.texi: Regenerate.

2017-10-20  Yannick Moy  <moy@adacore.com>

	* sem_ch6.adb (Analyze_Expression_Function.Freeze_Expr_Types): Remove
	inadequate silencing of errors.
	* sem_util.adb (Check_Part_Of_Reference): Do not issue an error when
	checking the subprogram body generated from an expression function,
	when this is done as part of the preanalysis done on expression
	functions, as the subprogram body may not yet be attached in the AST.
	The error if any will be issued later during the analysis of the body.
	(Is_Aliased_View): Trivial rewrite with Is_Formal_Object.

2017-10-20  Arnaud Charlet  <charlet@adacore.com>

	* sem_ch8.adb (Update_Chain_In_Scope): Add missing [-gnatwu] marker for
	warning on ineffective use clause.

2017-10-20  Eric Botcazou  <ebotcazou@adacore.com>

	* exp_ch11.ads (Warn_If_No_Local_Raise): Declare.
	* exp_ch11.adb (Expand_Exception_Handlers): Use Warn_If_No_Local_Raise
	to issue the warning on the absence of local raise.
	(Possible_Local_Raise): Do not issue the warning for Call_Markers.
	(Warn_If_No_Local_Raise): New procedure to issue the warning on the
	absence of local raise.
	* sem_elab.adb: Add with and use clauses for Exp_Ch11.
	(Record_Elaboration_Scenario): Call Possible_Local_Raise in the cases
	where a scenario could give rise to raising Program_Error.
	* sem_elab.adb: Typo fixes.
	* fe.h (Warn_If_No_Local_Raise): Declare.
	* gcc-interface/gigi.h (get_exception_label): Change return type.
	* gcc-interface/trans.c (gnu_constraint_error_label_stack): Change to
	simple vector of Entity_Id.
	(gnu_storage_error_label_stack): Likewise.
	(gnu_program_error_label_stack): Likewise.
	(gigi): Adjust to above changes.
	(Raise_Error_to_gnu): Likewise.
	(gnat_to_gnu) <N_Goto_Statement>: Set TREE_USED on the label.
	(N_Push_Constraint_Error_Label): Push the label onto the stack.
	(N_Push_Storage_Error_Label): Likewise.
	(N_Push_Program_Error_Label): Likewise.
	(N_Pop_Constraint_Error_Label): Pop the label from the stack and issue
	a warning on the absence of local raise.
	(N_Pop_Storage_Error_Label): Likewise.
	(N_Pop_Program_Error_Label): Likewise.
	(push_exception_label_stack): Delete.
	(get_exception_label): Change return type to Entity_Id and adjust.
	* gcc-interface/utils2.c (build_goto_raise): Change type of first
	parameter to Entity_Id and adjust.  Set TREE_USED on the label.
	(build_call_raise): Adjust calls to get_exception_label and also
	build_goto_raise.
	(build_call_raise_column): Likewise.
	(build_call_raise_range): Likewise.
	* doc/gnat_ugn/building_executable_programs_with_gnat.rst (-gnatw.x):
	Document actual default behavior.

2017-10-20  Piotr Trojanek  <trojanek@adacore.com>

	* einfo.ads: Minor consistent punctuation in comment.  All numbered
	items in the comment of Is_Internal are now terminated with a period.

2017-10-20  Piotr Trojanek  <trojanek@adacore.com>

	* exp_util.adb (Build_Temporary): Mark created temporary entity as
	internal.

2017-10-20  Piotr Trojanek  <trojanek@adacore.com>

	* sem_type.adb (In_Generic_Actual): Simplified.

2017-10-20  Justin Squirek  <squirek@adacore.com>

	* sem_ch12.adb (Check_Formal_Package_Instance): Add sanity check to
	verify a renaming exists for a generic formal before comparing it to
	the actual as defaulted formals will not have a renamed_object.

2017-10-20  Javier Miranda  <miranda@adacore.com>

	* exp_ch6.adb (Replace_Returns): Fix wrong management of
	N_Block_Statement nodes.

gcc/testsuite/

2017-10-20  Justin Squirek  <squirek@adacore.com>

	* gnat.dg/default_pkg_actual.adb, gnat.dg/default_pkg_actual2.adb: New
	testcases.

From-SVN: r253945
2017-10-20 16:05:28 +00:00
Pierre-Marie de Rodat
e201023c0e exp_aggr.adb (Initialize_Array_Component): Avoid adjusting a component of an array aggregate if...
gcc/ada/

2017-10-20  Bob Duff  <duff@adacore.com>

	* exp_aggr.adb (Initialize_Array_Component): Avoid adjusting a
	component of an array aggregate if it is initialized by a
	build-in-place function call.
	* exp_ch6.adb (Is_Build_In_Place_Result_Type): Use -gnatd.9 to disable
	bip for nonlimited types.
	* debug.adb: Document -gnatd.9.

2017-10-20  Bob Duff  <duff@adacore.com>

	* sem_ch12.adb: Remove redundant setting of Parent.

2017-10-20  Eric Botcazou  <ebotcazou@adacore.com>

	* sem_ch4.adb (Find_Concatenation_Types): Filter out operators if one
	of the operands is a string literal.

2017-10-20  Bob Duff  <duff@adacore.com>

	* einfo.ads: Comment fix.

2017-10-20  Clement Fumex  <fumex@adacore.com>

	* switch-c.adb: Remove -gnatwm from the switches triggered by -gnateC.

2017-10-20  Ed Schonberg  <schonberg@adacore.com>

	* sem_dim.adb (Extract_Power): Accept dimension values that are not
	non-negative integers when the dimensioned base type is an Integer
	type.

gcc/testsuite/

2017-10-20  Ed Schonberg  <schonberg@adacore.com>

	* gnat.dg/dimensions.adb, gnat.dg/dimensions.ads: New testcase.

From-SVN: r253941
2017-10-20 15:08:36 +00:00
Bob Duff
3a248f7cec sinfo.ads, sinfo.adb (Alloc_For_BIP_Return): New flag to indicate that an allocator came from a b-i-p return statement.
2017-10-20  Bob Duff  <duff@adacore.com>

	* sinfo.ads, sinfo.adb (Alloc_For_BIP_Return): New flag to indicate
	that an allocator came from a b-i-p return statement.
	* exp_ch4.adb (Expand_Allocator_Expression): Avoid adjusting the return
	object of a nonlimited build-in-place function call.
	* exp_ch6.adb (Expand_N_Extended_Return_Statement): Set the
	Alloc_For_BIP_Return flag on generated allocators.
	* sem_ch5.adb (Analyze_Assignment): Move Assert to where it can't fail.
	If the N_Assignment_Statement has been transformed into something else,
	then Should_Transform_BIP_Assignment won't work.
	* exp_ch3.adb (Expand_N_Object_Declaration): A previous revision said,
	"Remove Adjust if we're building the return object of an extended
	return statement in place." Back out that part of the change, because
	the Alloc_For_BIP_Return flag is now used for that.

From-SVN: r253940
2017-10-20 14:51:32 +00:00
Jakub Jelinek
2185b58266 i386.md (isa): Remove fma_avx512f.
* config/i386/i386.md (isa): Remove fma_avx512f.
	* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
	<avx512>_fmadd_<mode>_mask3<round_name>,
	<avx512>_fmsub_<mode>_mask<round_name>,
	<avx512>_fmsub_<mode>_mask3<round_name>,
	<avx512>_fnmadd_<mode>_mask<round_name>,
	<avx512>_fnmadd_<mode>_mask3<round_name>,
	<avx512>_fnmsub_<mode>_mask<round_name>,
	<avx512>_fnmsub_<mode>_mask3<round_name>,
	<avx512>_fmaddsub_<mode>_mask<round_name>,
	<avx512>_fmaddsub_<mode>_mask3<round_name>,
	<avx512>_fmsubadd_<mode>_mask<round_name>,
	<avx512>_fmsubadd_<mode>_mask3<round_name>): Remove isa attribute.
	(*vec_widen_umult_even_v16si<mask_name>,
	*vec_widen_smult_even_v16si<mask_name>): Likewise.
	(<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Likewise.

From-SVN: r253939
2017-10-20 16:31:03 +02:00
Igor Tsimbalist
771c6b44dd Add documentation for fcf-protection option and nocf_check attribute
gcc/doc/
	* extend.texi: Add 'nocf_check' documentation.
	* gimple.texi: Add second parameter to gimple_build_call_from_tree.
	* invoke.texi: Add -fcf-protection documentation.
	* rtl.texi: Add REG_CALL_NOTRACK documenation.

From-SVN: r253938
2017-10-20 16:03:07 +02:00
Richard Biener
51e28fffbe re PR tree-optimization/82473 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1524)
2017-10-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/82473
	* tree-vect-loop.c (vectorizable_reduction): Properly get at
	the largest input type.

	* gcc.dg/torture/pr82473.c: New testcase.

From-SVN: r253937
2017-10-20 13:43:47 +00:00
Igor Tsimbalist
5c5f0b65ee Add generic part for Intel CET enabling. The spec is available at
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

A proposal is to introduce a target independent flag
-fcf-protection=[none|branch|return|full] with a semantic to
instrument a code to control validness or integrity of control-flow
transfers using jump and call instructions. The main goal is to detect
and block a possible malware execution through transfer the execution
to unknown target address. Implementation could be either software or
target based. Any target platforms can provide their implementation
for instrumentation under this option.

The compiler should instrument any control-flow transfer points in a
program (ex. call/jmp/ret) as well as any landing pads, which are
targets of control-flow transfers.

A new 'nocf_check' attribute is introduced to provide hand tuning
support. The attribute directs the compiler to skip a call to a
function and a function's landing pad from instrumentation. The
attribute can be used for function and pointer to function types,
otherwise it will be ignored.

Currently all platforms except i386 will report the error and do no
instrumentation. i386 will provide the implementation based on a
specification published by Intel for a new technology called
Control-flow Enforcement Technology (CET).

gcc/c-family/
	* c-attribs.c (handle_nocf_check_attribute): New function.
	(c_common_attribute_table): Add 'nocf_check' handling.

gcc/c/
	* gimple-parser.c: Add second argument NULL to
	gimple_build_call_from_tree.

gcc/
	* attrib.c (comp_type_attributes): Check nocf_check attribute.
	* cfgexpand.c (expand_call_stmt): Set REG_CALL_NOCF_CHECK for
	call insn.
	* combine.c (distribute_notes): Add REG_CALL_NOCF_CHECK handling.
	* common.opt: Add fcf-protection flag.
	* emit-rtl.c (try_split): Add REG_CALL_NOCF_CHECK handling.
	* flag-types.h: Add enum cf_protection_level.
	* gimple.c (gimple_build_call_from_tree): Add second parameter.
	Add 'nocf_check' attribute propagation to gimple call.
	* gimple.h (gf_mask): Add GF_CALL_NOCF_CHECK.
	(gimple_build_call_from_tree): Update prototype.
	(gimple_call_nocf_check_p): New function.
	(gimple_call_set_nocf_check): Likewise.
	* gimplify.c: Add second argument to gimple_build_call_from_tree.
	* ipa-icf.c: Add nocf_check attribute in statement hash.
	* recog.c (peep2_attempt): Add REG_CALL_NOCF_CHECK handling.
	* reg-notes.def: Add REG_NOTE (CALL_NOCF_CHECK).
	* toplev.c (process_options): Add flag_cf_protection handling.

From-SVN: r253936
2017-10-20 15:09:38 +02:00
Richard Earnshaw
e64944ac65 [arm] Fix architecture selection when building libatomic with automatic FPU selection
Libatomic builds a few functions for Arm with an explicit -march
option.  This option does not specify an FPU, which can lead to
problems when targeting a hard-float or softfp environment since the
architecture appears to be incompatible with the selected ABI.

The fix is simple enough, just add +fp (the minimum floating point
option) to the architecture.  We don't use anything from the FP
architecture, so it shouldn't really change anything; and if we are
building for -mfloat-abi=soft the canonicalization process will remove
the unnecessary fp attributes anyway.

	* Makefile.am: (IFUNC_OPTIONS): Set the architecture to
	-march=armv7-a+fp on Linux/Arm.
	* Makefile.in: Regenerated.

From-SVN: r253935
2017-10-20 12:33:39 +00:00
Jan Hubicka
ffa3ce5322 * x86-tune-costs.h (core_cost): Fix div, move and sqrt latencies.
From-SVN: r253934
2017-10-20 12:25:18 +00:00
Richard Biener
1031b5772a re PR tree-optimization/82603 (ICE in ifcvt_local_dce w/ -O2 -ftree-loop-vectorize)
2017-10-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/82603
	* tree-if-conv.c (predicate_mem_writes): Make sure to only
	remove false predicated stores.

	* gcc.dg/torture/pr82603.c: New testcase.

From-SVN: r253933
2017-10-20 11:21:11 +00:00
Richard Biener
c46bd47200 2017-10-20 Richard Biener <rguenther@suse.de>
* graphite-isl-ast-to-gimple.c
	(translate_isl_ast_to_gimple::graphite_copy_stmts_from_block):
	Remove return value and simplify, dump copied stmt after lhs
	adjustment.
	(translate_isl_ast_to_gimple::translate_isl_ast_node_user):
	Reduce dump verbosity.
	(gsi_insert_earliest): Likewise.
	(translate_isl_ast_to_gimple::copy_bb_and_scalar_dependences): Adjust.
	* graphite.c (print_global_statistics): Adjust dumping.
	(print_graphite_scop_statistics): Likewise.
	(print_graphite_statistics): Do not dump loops here.
	(graphite_transform_loops): But here.

From-SVN: r253930
2017-10-20 10:49:24 +00:00
Tom de Vries
424101ddcc Reduce stack size in gcc.dg/tree-ssa/ldist-27.c
2017-10-20  Tom de Vries  <tom@codesourcery.com>

	* gcc.dg/tree-ssa/ldist-27.c: Remove dg-require-stack-size.
	(main): Move s ...
	(s): ... here.

From-SVN: r253929
2017-10-20 10:02:49 +00:00
Nicolas Roche
e8679fd52c configure.ac (ACX_PROG_GNAT): Append "libgnat" to the include dir.
* configure.ac (ACX_PROG_GNAT): Append "libgnat" to the include dir.
	* configure: Regenerate.

From-SVN: r253928
2017-10-20 09:29:35 +00:00
Jakub Jelinek
356fcc67fb re PR target/82158 (_Noreturn functions that do return clobber caller's registers on ARM32 (but not other arches))
PR target/82158
	* tree-cfg.c (pass_warn_function_return::execute): In noreturn
	functions when optimizing replace GIMPLE_RETURN stmts with
	calls to __builtin_unreachable ().

	* gcc.dg/tree-ssa/noreturn-1.c: New test.

From-SVN: r253926
2017-10-20 09:35:48 +02:00
Jakub Jelinek
9a45ffbd12 re PR sanitizer/82595 (bootstrap fails in libsanitizer on powerpc64-unknown-linux-gnu)
PR sanitizer/82595
	* config/gnu-user.h (LIBTSAN_EARLY_SPEC): Add libtsan_preinit.o
	for -fsanitize=thread link of executables.
	(LIBLSAN_EARLY_SPEC): Add liblsan_preinit.o for -fsanitize=leak
	link of executables.

	* lsan/lsan.h (__lsan_init): Add SANITIZER_INTERFACE_ATTRIBUTE.
	* lsan/Makefile.am (nodist_toolexeclib_HEADERS): Add
	liblsan_preinit.o.
	(lsan_files): Remove lsan_preinit.cc.
	(liblsan_preinit.o): New rule.
	* lsan/Makefile.in: Regenerated.

From-SVN: r253925
2017-10-20 09:32:35 +02:00
Jakub Jelinek
42a764f76f re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
PR target/82370
	* config/i386/sse.md (VI248_AVX2, VI248_AVX512BW, VI248_AVX512BW_2):
	New mode iterators.
	(<shift_insn><mode>3<mask_name>): Change the last of the 3
	define_insns for logical vector shifts to use VI248_AVX512BW
	iterator instead of VI48_AVX512, remove <mask_mode512bit_condition>
	condition, useless isa and prefix attributes.  Change the first
	2 of these define_insns to ...
	(<mask_codefor><shift_insn><mode>3<mask_name>): ... this, new
	define_insn for avx512vl.
	(<shift_insn><mode>3): ... and this, new define_insn without
	masking for non-avx512vl.

	* gcc.target/i386/avx-pr82370.c: New test.
	* gcc.target/i386/avx2-pr82370.c: New test.
	* gcc.target/i386/avx512f-pr82370.c: New test.
	* gcc.target/i386/avx512bw-pr82370.c: New test.
	* gcc.target/i386/avx512vl-pr82370.c: New test.
	* gcc.target/i386/avx512vlbw-pr82370.c: New test.

From-SVN: r253924
2017-10-20 09:30:33 +02:00
Jakub Jelinek
c274eebe4e re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
PR target/82370
	* config/i386/sse.md (*andnot<mode>3,
	<mask_codefor><code><mode>3<mask_name>, *<code><mode>3): Split
	(=v,v,vm) alternative into (=x,x,xm) and (=v,v,vm), for 128-bit
	and 256-bit vectors, the (=x,x,xm) alternative and when mask is
	not applied use empty suffix even for TARGET_AVX512VL.
	* config/i386/subst.md (mask_prefix3, mask_prefix4): When mask
	is applied, supply evex,evex or evex,evex,evex instead of just
	evex.

From-SVN: r253923
2017-10-20 09:28:25 +02:00
Julia Koval
b8cca31c48 Add GFNI command line options and macros
gcc/
	* common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET,
	(OPTION_MASK_ISA_GFNI_UNSET): New.
	(ix86_handle_option): Handle OPT_mgfni.
	* config/i386/cpuid.h (bit_GFNI): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni.
	* config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__.
	* config/i386/i386.c (ix86_target_string): Add -mgfni.
	(ix86_valid_target_attribute_inner_p): Add OPT_mgfni.
	* config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New.
	* config/i386/i386.opt: Add mgfni.

From-SVN: r253922
2017-10-20 06:31:33 +00:00
Orlando Arias
793c096d45 msp430.c (msp430_option_override): Disable -fdelete-null-pointer-checks.
* config/msp430/msp430.c (msp430_option_override): Disable
-fdelete-null-pointer-checks.
* doc/invoke.text (-fdelete-null-pointer-checks): Document that.

* lib/target-supports.exp (check_effective_target_keeps_null_pointer_checks):
Add msp430 to the list.

From-SVN: r253921
2017-10-20 00:49:57 -04:00
Paolo Carlini
b6b240edae re PR c++/82308 ([C++17] deduction of template arguments results in internal compiler error)
2017-10-19  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/82308
	* g++.dg/cpp1z/class-deduction45.C: New.

From-SVN: r253920
2017-10-20 00:30:41 +00:00
GCC Administrator
6d2bd9ff82 Daily bump.
From-SVN: r253919
2017-10-20 00:16:15 +00:00
Bob Duff
7d92172c18 exp_ch6.adb (Is_Build_In_Place_Result_Type): Fix silly bug -- "Typ" should be "T".
2017-10-19  Bob Duff  <duff@adacore.com>

	* exp_ch6.adb (Is_Build_In_Place_Result_Type): Fix silly bug -- "Typ"
	should be "T".  Handle case of a subtype of a class-wide type.

From-SVN: r253916
2017-10-19 23:12:27 +00:00
Pierre-Marie de Rodat
fb9dd1c7c3 [multiple changes]
2017-10-19  Bob Duff  <duff@adacore.com>

	* exp_util.adb: (Process_Statements_For_Controlled_Objects): Clarify
	which node kinds can legitimately be ignored, and raise Program_Error
	for others.

2017-10-19  Hristian Kirtchev  <kirtchev@adacore.com>

	* sem_elab.adb (Compilation_Unit): Handle the case of a subprogram
	instantiation that acts as a compilation unit.
	(Find_Code_Unit): Reimplemented.
	(Find_Top_Unit): Reimplemented.
	(Find_Unit_Entity): New routine.
	(Process_Instantiation_SPARK): Correct the elaboration requirement a
	package instantiation imposes on a unit.

2017-10-19  Bob Duff  <duff@adacore.com>

	* exp_ch6.adb (Is_Build_In_Place_Result_Type): Enable build-in-place
	for a narrow set of controlled types.

2017-10-19  Eric Botcazou  <ebotcazou@adacore.com>

	* sinput.ads (Line_Start): Add pragma Inline.
	* widechar.ads (Is_Start_Of_Wide_Char): Likewise.

2017-10-19  Bob Duff  <duff@adacore.com>

	* exp_attr.adb (Expand_N_Attribute_Reference): Disable
	Make_Build_In_Place_Call_... for F(...)'Old, where F(...) is a
	build-in-place function call so that the temp is declared in the right
	place.

From-SVN: r253915
2017-10-19 23:08:29 +00:00
Alan Modra
ebd208bf7b PR82575, lto debugobj references __gnu_lto_slim, ld test liblto-17 fails
If __gnu_lto_slim is global, undefined, default visibility in the
early debug object, then it finds its way into .dynsym when creating
shared libraries.  __gnu_lto_slim in a symbol table (.dynsym or
.symtab) signals nm and other binutils that the object is an LTO
object needing a plugin, but that isn't the case for the ld liblti-17
tests.  So, make __gnu_lto_slim hidden to prevent it becoming
dynamic.  Further, make it weak because some linkers may warn on
finding an undefined global non-default visibility symbol.

	PR lto/82575
	* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
	Make discarded non-local symbols weak and hidden.

From-SVN: r253914
2017-10-20 09:36:20 +10:30