Commit Graph

132822 Commits

Author SHA1 Message Date
Segher Boessenkool e4fb6f093c htm.md (tabort, [...]): Use xor instead of minus.
2014-09-11  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc,
	tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor
	instead of minus.
	* config/rs6000/vector.md (cr6_test_for_zero_reverse,
	cr6_test_for_lt_reverse): Ditto.

From-SVN: r215187
2014-09-11 20:29:50 +02:00
Paolo Carlini 450bfd7d5c re PR c++/61489 (Wrong warning with -Wmissing-field-initializers.)
2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/61489
	* doc/invoke.texi ([-Wmissing-field-initializers]): Update.

/cp
2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/61489
	* typeck2.c (process_init_constructor_record): Do not warn about
	missing field initializer if EMPTY_CONSTRUCTOR_P (init).

/testsuite
2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/61489
	* g++.dg/warn/Wmissing-field-initializers-1.C: New.
	* g++.old-deja/g++.other/warn5.C: Adjust.

From-SVN: r215186
2014-09-11 18:08:24 +00:00
Alan Lawrence bc138f7bee [AArch64] Simplify vreinterpret for float64x1_t using casts.
* config/aarch64/aarch64-builtins.c (aarch64_types_unop_su_qualifiers,
	TYPES_REINTERP_SU, aarch64_types_unop_sp_qualifiers, TYPE_REINTERP_SP,
	aarch64_types_unop_us_qualifiers, TYPES_REINTERP_US,
	aarch64_types_unop_ps_qualifiers, TYPES_REINTERP_PS, BUILTIN_VD):
	Delete.

	(aarch64_fold_builtin): Remove all reinterpret cases.

	* config/aarch64/aarch64-protos.h (aarch64_simd_reinterpret): Delete.

	* config/aarch64/aarch64-simd-builtins.def (reinterpret*) : Delete.

	* config/aarch64/aarch64-simd.md (aarch64_reinterpretv8qi<mode>,
	aarch64_reinterpretv4hi<mode>, aarch64_reinterpretv2si<mode>,
	aarch64_reinterpretv2sf<mode>, aarch64_reinterpretdi<mode>,
	aarch64_reinterpretv1df<mode>, aarch64_reinterpretv16qi<mode>,
	aarch64_reinterpretv8hi<mode>, aarch64_reinterpretv4si<mode>,
	aarch64_reinterpretv4sf<mode>, aarch64_reinterpretv2di<mode>,
	aarch64_reinterpretv2df<mode>): Delete.

	* config/aarch64/aarch64.c (aarch64_simd_reinterpret): Delete.

	* config/aarch64/arm_neon.h (vreinterpret_p8_f64,
	vreinterpret_p16_f64, vreinterpret_f32_f64, vreinterpret_f64_f32,
	vreinterpret_f64_p8, vreinterpret_f64_p16, vreinterpret_f64_s8,
	vreinterpret_f64_s16, vreinterpret_f64_s32, vreinterpret_f64_u8,
	vreinterpret_f64_u16, vreinterpret_f64_u32, vreinterpret_s64_f64,
	vreinterpret_u64_f64, vreinterpret_s8_f64, vreinterpret_s16_f64,
	vreinterpret_s32_f64, vreinterpret_u8_f64, vreinterpret_u16_f64,
	vreinterpret_u32_f64): Use cast.

	* config/aarch64/iterators.md (VD_RE): Delete.

From-SVN: r215180
2014-09-11 16:16:24 +00:00
Alan Lawrence fdaddc1b0b [AArch64] Replace temporary inline assembler for vset_lane
* config/aarch64/arm_neon.h (aarch64_vset_lane_any): New (*2).
	(vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16,
	vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64,
	vset_lane_u8, vset_lane_u16, vset_lane_u32, vset_lane_u64,
	vsetq_lane_f32, vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16,
	vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64,
	vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64):
	Replace inline assembler with __aarch64_vset_lane_any.

From-SVN: r215179
2014-09-11 15:34:11 +00:00
Alan Lawrence 8acf549a44 [AArch64 Testsuite] Add execution test of vset(q?)_lane intrinsics.
* gcc.target/aarch64/vset_lane_1.c: New test.

From-SVN: r215177
2014-09-11 14:49:23 +00:00
James Greenhalgh dd57b790a4 [AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32}
gcc/

	* config/aarch64/arm_neon.h (vmull_high_lane_s16): Fix argument
	types.
	(vmull_high_lane_s32): Likewise.
	(vmull_high_lane_u16): Likewise.
	(vmull_high_lane_u32): Likewise.

From-SVN: r215176
2014-09-11 14:39:41 +00:00
Jason Merrill c9e8561ef6 re PR c++/63139 (Class-scope typedef overwrites typedef of previously defined class)
PR c++/63139
	* pt.c (tsubst_pack_expansion): Simplify substitution into T....
	(tsubst): Don't throw away PACK_EXPANSION_EXTRA_ARGS.

From-SVN: r215171
2014-09-11 09:50:27 -04:00
Jason Merrill 89632536fc re PR c++/58678 (pykde4-4.11.2 link error (devirtualization too trigger happy))
PR c++/58678
	* ipa-devirt.c (ipa_devirt): Don't check DECL_COMDAT.

From-SVN: r215168
2014-09-11 08:12:28 -04:00
Jonathan Wakely 8aed2f2f63 re PR libstdc++/63219 (Superfluous template parameter in match_result::format overload)
PR libstdc++/63219
	* include/bits/regex.h (match_results::format): Remove stray template
	parameter.
	* include/bits/regex_compiler.h (_RegexTranslator::_RegexTranslator):
	Remove parameter name to avoid -Wunused-parameter warning.
	* include/bits/regex_executor.h (_State_info::_State_info): Reorder
	mem-initializers to avoid -Wreorder warning.
	* include/bits/regex_executor.tcc (_Executor::_M_word_boundary):
	Remove parameter name to avoid -Wunused-parameter warning.
	* include/bits/regex_scanner.tcc (_Scanner::_M_advance): Add braces
	to avoid -Wempty-body warning when not in debug mode.

From-SVN: r215160
2014-09-11 11:01:20 +01:00
Bernd Schmidt 21a16932df Fix declarations in some tests.
* gcc.dg/compat/struct-by-value-13_main.c (struct_by_value_13_x):
	Fix declaration.
	* gcc.dg/compat/struct-by-value-16a_main.c (struct_by_value_16a_x):
	Fix declaration.
	* gcc.dg/compat/struct-by-value-17a_main.c (struct_by_value_17a_x):
	Fix declaration.
	* gcc.dg/compat/struct-by-value-18a_main.c (struct_by_value_18a_x):
	Fix declaration.

From-SVN: r215158
2014-09-11 09:07:23 +00:00
Jakub Jelinek 1138382be4 linux64.S: Emit .note.GNU-stack even when POWERPC64 is not defined.
* src/powerpc/linux64.S: Emit .note.GNU-stack even when
	POWERPC64 is not defined.
	* src/powerpc/linux64_closure.S: Likewise.  Also test _CALL_ELF == 2.

From-SVN: r215155
2014-09-11 11:03:49 +02:00
Georg-Johann Lay ea3f2b240f re PR target/63223 ([avr] Make jumptables work with -Wl,--section-start,.text=)
gcc/
	PR target/63223
	* config/avr/avr.md (*tablejump.3byte-pc): New insn.
	(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL.  Add void clobber.
	(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
	PR target/63223
	* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
	and R24 as needed.  Make work for all devices and .text locations.
	(__do_global_ctors, __do_global_dtors): Use word addresses.
	(__tablejump__, __tablejump_elpm__): Remove functions.
	* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
	Add _tablejump2.
	(XICALL, XIJMP): New macros.

From-SVN: r215152
2014-09-11 08:08:17 +00:00
Alexander Ivchenko c883e5fb6a AVX-512. Add vperm[it]2 insns support.
gcc/
	* config/i386/sse.md
	(define_expand "<avx512>_vpermi2var<VI48F:mode>3_maskz"): Rename from
	"avx512f_vpermi2var<mode>3_maskz" and update mode iterator.
	(define_expand "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_maskz"):
	New.
	(define_insn "<avx512>_vpermi2var<VI48F:mode>3<sd_maskz_name>"): Rename
	from "avx512f_vpermi2var<mode>3<sd_maskz_name>" and update mode
	iterator.
	(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
	New.
	(define_insn "<avx512>_vpermi2var<VI48F:mode>3_mask"): Rename from
	"avx512f_vpermi2var<mode>3_mask" and update mode iterator.
	(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_mask"): New.
	(define_expand "<avx512>_vpermt2var<VI48F:mode>3_maskz"): Rename from
	"avx512f_vpermt2var<mode>3_maskz" and update mode iterator.
	(define_expand "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_maskz"): New.
	(define_insn "<avx512>_vpermt2var<VI48F:mode>3<sd_maskz_name>"): Rename
	from "avx512f_vpermt2var<mode>3<sd_maskz_name>" and update mode
	iterator.
	(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
	New.
	(define_insn "<avx512>_vpermt2var<VI48F:mode>3_mask"): Rename from
	"avx512f_vpermt2var<mode>3_mask" and update mode iterator.
	(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_mask"): New.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215151
2014-09-11 06:52:30 +00:00
Jan Hubicka 7c46e07ba4 varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try to access removed nodes.
* varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try
	to access removed nodes.

From-SVN: r215150
2014-09-11 06:48:23 +00:00
Jan Hubicka 412c4af7f1 re PR middle-end/63186 (Undefined .L* symbols because of fnsplit)
PR tree-optimization/63186
	* ipa-split.c (test_nonssa_use): Skip nonforced labels.
	(mark_nonssa_use): Likewise.
	(verify_non_ssa_vars): Verify all header blocks for label
	definitions.

	* gcc.dg/pr63186.c: New testcase.

From-SVN: r215149
2014-09-11 06:46:23 +00:00
Alexander Ivchenko cf92ae7f06 AVX-512. Extend vpermvar insn patterns.
gcc/
	* config/i386/sse.md
	(define_mode_attr avx2_avx512): Rename from avx2_avx512bw.
	(define_mode_iterator VI48F_256_512): Extend to AVX-512VL.
	(define_insn "<avx2_avx512>_permvar<mode><mask_name>"): Rename from
	"<avx2_avx512f>_permvar<mode><mask_name>".
	(define_insn "<avx512>_permvar<mode><mask_name>"): New.
	(define_insn "<avx2_avx512>_ashrv<VI48_AVX512F_AVX512VL:mode><mask_name>"):
	Rename from "<avx2_avx512f>_ashrv<mode><mask_name>".
	(define_insn "<avx2_avx512>_ashrv<VI2_AVX512VL:mode><mask_name>"):
	Ditto.
	(define_insn "<avx2_avx512>_<shift_insn>v<VI48_AVX512F:mode><mask_name>"):
	Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".
	(define_insn "<avx2_avx512>_<shift_insn>v<VI2_AVX512VL:mode><mask_name>"):
	Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215148
2014-09-11 06:42:29 +00:00
GCC Administrator dec3f82af2 Daily bump.
From-SVN: r215147
2014-09-11 00:16:43 +00:00
Michael Meissner 29aafbc413 vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes.
2014-09-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
	V2DF, V4SF, DF, and DI modes.
	(vsx_fmav2df2): Likewise.
	(vsx_float_fix_<mode>2): Likewise.
	(vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise.

From-SVN: r215138
2014-09-10 21:13:37 +00:00
Xinliang David Li 971ea67cc0 Fix PR target/63209.
From-SVN: r215136
2014-09-10 20:10:25 +00:00
Jakub Jelinek 7bee00c373 i386.exp: Only run vect-args.c tests if runtest_file_p says they should be run.
* gcc.target/i386/i386.exp: Only run vect-args.c tests
	if runtest_file_p says they should be run.

From-SVN: r215135
2014-09-10 22:02:00 +02:00
Jason Merrill ca78482dcd re PR ipa/61659 (Extra undefined symbol because of devirtualization)
PR c++/61659
	* decl.c (grokfndecl): Don't set DECL_COMDAT on static inlines.
	(duplicate_decls, start_decl): Likewise.
	* pt.c (check_explicit_specialization): Likewise.
	(push_template_decl_real): Or static templates.

From-SVN: r215134
2014-09-10 13:28:59 -04:00
David Malcolm 1c22488e18 error_for_asm and warning_for_asm take const rtx_insn *
gcc/ChangeLog:
2014-09-10  David Malcolm  <dmalcolm@redhat.com>

	* final.c (this_is_asm_operands): Strengthen this variable from
	rtx to const rtx_insn *.
	* output.h (this_is_asm_operands): Likewise.
	* rtl-error.c (location_for_asm): Strengthen param "insn" from
	const_rtx to const rtx_insn *.
	(diagnostic_for_asm): Likewise.
	* rtl-error.h (error_for_asm): Likewise.
	(warning_for_asm): Likewise.

From-SVN: r215133
2014-09-10 14:42:05 +00:00
David Malcolm d0bffe555a insn_extract takes an rtx_insn
gcc/ChangeLog:
2014-09-10  David Malcolm  <dmalcolm@redhat.com>

	* genextract.c (print_header): When writing out insn_extract to
	insn-extract.c, strengthen the param "insn" from rtx to rtx_insn *.
	* recog.h (insn_extract): Strengthen the param from rtx to
	rtx_insn *.

From-SVN: r215132
2014-09-10 14:35:16 +00:00
Alan Lawrence 86b8825bfe [AArch64 Testsuite] Add a test of the vst[234](q?) intrinics
* gcc.target/aarch64/vstN_1.c: New test.

From-SVN: r215129
2014-09-10 13:20:47 +00:00
Siva Chandra Reddy e9e08827bf hook.in: Load the xmethods.
2014-09-10  Siva Chandra Reddy  <sivachandra@google.com>

	* python/hook.in: Load the xmethods.
	* python/Makefile.am (nobase_python_DATA): Add xmethods.py.
	* python/Makefile.in: Regenerated.
	* python/libstdcxx/v6/xmethods.py: New file.
	* testsuite/lib/gdb-test.exp (gdb_version_check_xmethods): New
	function.
	(gdb-test): New optional argument LOAD_XMETHODS.  Load xmethods
	python script if LOAD_XMETHODS is true.
	* testsuite/libstdc++-xmethods/unique_ptr.cc: New file.
	* testsuite/libstdc++-xmethods/vector.cc: New file.
	* testsuite/libstdc++-xmethods/xmethods.exp: New file.

From-SVN: r215128
2014-09-10 14:18:04 +01:00
Mike Stump f15b287f2d install.texi (Prerequisites): Note Tcl 8.6 bug fixed in 8.6.1.
* doc/install.texi (Prerequisites): Note Tcl 8.6 bug fixed in
	8.6.1.

From-SVN: r215127
2014-09-10 12:35:11 +00:00
Alan Lawrence d9aa6e1122 [AArch64 Testsuite] Add a test of the vldN_lane intrinsic
* gcc.target/aarch64/vldN_lane_1.c: New test.

From-SVN: r215126
2014-09-10 12:33:59 +00:00
Martin Jambor 77b7d74bf6 cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.
2014-09-10  Martin Jambor  <mjambor@suse.cz>

	* cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.
	(analyze): Do not set analyze flag if expand_thunk returns false;.
	(create_wrapper): Likewise.
	* cgraphclones.c (duplicate_thunk_for_node): Likewise.

From-SVN: r215123
2014-09-10 13:36:29 +02:00
Martin Jambor bec6320858 re PR middle-end/61654 (ICE in release_function_body, at cgraph.c:1699)
2014-09-10  Martin Jambor  <mjambor@suse.cz>

	PR ipa/61654
	* cgraphclones.c (duplicate_thunk_for_node): Copy arguments of the
	new decl properly.  Analyze the new thunk if it is expanded.

gcc/testsuite/
	* g++.dg/ipa/pr61654.C: New test.

From-SVN: r215122
2014-09-10 13:34:09 +02:00
Andreas Schwab f3955ea361 coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn): Define.
* coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn)
[USED_FOR_TARGET]: Define.

From-SVN: r215121
2014-09-10 11:01:35 +00:00
Matthew Fortune 99a5c6b06a MIPS: Do not reload unallocated FP_REGS pseudos via GR_REGS
gcc/

	* config/mips/mips.c (mips_secondary_reload_class): Handle
	regno < 0 case.

From-SVN: r215120
2014-09-10 10:52:39 +00:00
Robert Suchanek 5625bd33a2 Fix ICE in bitmap routines with LRA and inline assembly language
gcc/

	* lra-lives.c (process_bb_lives): Replace assignment with bitwise OR
	assignment.

From-SVN: r215119
2014-09-10 10:36:00 +00:00
Jakub Jelinek 126edc3fe2 flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE and SANITIZE_RETURNS_NONNULL_ATTRIBUTE...
gcc/
	* flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE
	and SANITIZE_RETURNS_NONNULL_ATTRIBUTE, or them into SANITIZE_UNDEFINED.
	* opts.c (common_handle_option): Handle SANITIZE_NONNULL_ATTRIBUTE and
	SANITIZE_RETURNS_NONNULL_ATTRIBUTE and disable
	flag_delete_null_pointer_checks for them.
	* sanitizer.def (BUILT_IN_UBSAN_HANDLE_NONNULL_ARG,
	BUILT_IN_UBSAN_HANDLE_NONNULL_ARG_ABORT,
	BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN,
	BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN_ABORT): New.
	* ubsan.c (instrument_bool_enum_load): Set *gsi back to
	stmt's iterator.
	(instrument_nonnull_arg, instrument_nonnull_return): New functions.
	(pass_ubsan::gate): Return true even for SANITIZE_NONNULL_ATTRIBUTE
	or SANITIZE_RETURNS_NONNULL_ATTRIBUTE.
	(pass_ubsan::execute): Call instrument_nonnull_{arg,return}.
	* doc/invoke.texi (-fsanitize=nonnull-attribute,
	-fsanitize=returns-nonnull-attribute): Document.
gcc/testsuite/
	* c-c++-common/ubsan/attrib-3.c: New test.
	* c-c++-common/ubsan/nonnull-1.c: New test.
	* c-c++-common/ubsan/nonnull-2.c: New test.
	* c-c++-common/ubsan/nonnull-3.c: New test.
	* c-c++-common/ubsan/nonnull-4.c: New test.
	* c-c++-common/ubsan/nonnull-5.c: New test.
libsanitizer/
	* ubsan/ubsan_handlers.cc, ubsan/ubsan_handlers.h: Cherry pick
	upstream r215485, r217389, r217391 and r217400.

From-SVN: r215118
2014-09-10 11:23:16 +02:00
Jakub Jelinek 570a11fe5a ubsan.h (struct ubsan_mismatch_data): Removed.
* ubsan.h (struct ubsan_mismatch_data): Removed.
	(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
	* ubsan.c (ubsan_source_location): For unknown locations,
	pass { NULL, 0, 0 } instead of { "<unknown>", x, y }.
	(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
	Allow more than one location and arbitrary extra arguments passed
	in ... instead of through MISMATCH pointer.
	(ubsan_instrument_unreachable, ubsan_expand_bounds_ifn,
	ubsan_expand_null_ifn, ubsan_build_overflow_builtin,
	instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
	callers.
c-family/
	* c-ubsan.c (ubsan_instrument_division, ubsan_instrument_shift,
	ubsan_instrument_vla, ubsan_instrument_return): Adjust
	ubsan_create_data callers.
	(ubsan_instrument_bounds): Don't emit UBSAN_BOUNDS at all if
	index is constant or BIT_AND_EXPR with constant mask and is
	small enough for the bound.
	* c-gimplify.c (ubsan_walk_array_refs_r): For ADDR_EXPR of
	ARRAY_REF, make sure the inner ARRAY_REF is not walked again.

From-SVN: r215117
2014-09-10 11:21:25 +02:00
Alexander Ivchenko f7be73c862 AVX-512. Add patterns for compress, expand.
gcc/
	* config/i386/sse.md
	(define_mode_iterator VI48F): New.
	(define_insn "<avx512>_compress<mode>_mask"): Rename from
	"avx512f_compress<mode>_mask" and update mode iterator.
	(define_insn "<avx512>_compressstore<mode>_mask"): Rename from
	"avx512f_compressstore<mode>_mask" and update mode iterator.
	(define_expand "<avx512>_expand<mode>_maskz"): Rename from
	"avx512f_expand<mode>_maskz" and update mode iterator.
	(define_insn "<avx512>_expand<mode>_mask"): Rename from
	"avx512f_expand<mode>_mask" and update mode iterator.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215108
2014-09-10 07:05:31 +00:00
Alexander Ivchenko b982628645 AVX-512. Add reduce, range, fpclass insn patterns.
gcc/
	* config/i386/i386.c
	(ix86_expand_args_builtin): Handle avx512dq_rangepv8df_mask_round,
	avx512dq_rangepv16sf_mask_round, avx512dq_rangepv4df_mask,
	avx512dq_rangepv8sf_mask, avx512dq_rangepv2df_mask,
	avx512dq_rangepv4sf_mask.
	* config/i386/sse.md
	(define_c_enum "unspec"): Add UNSPEC_REDUCE, UNSPEC_FPCLASS,
	UNSPEC_RANGE.
	(define_insn "<mask_codefor>reducep<mode><mask_name>"): New.
	(define_insn "reduces<mode>"): Ditto.
	(define_insn "avx512dq_rangep<mode><mask_name><round_saeonly_name>"):
	Ditto.
	(define_insn "avx512dq_ranges<mode><round_saeonly_name>"): Ditto.
	(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Ditto.
	(define_insn "avx512dq_vmfpclass<mode>"): Ditto..


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215107
2014-09-10 06:54:51 +00:00
Alexander Ivchenko b040ded3c6 AVX-512. Update float unspecs: storeu, rcp14, rsqrt14, scalef, getexp, fixupimm, rndscale, getmant.
gcc/
	* config/i386/i386.c
	(avx512f_vgetmantv2df_round): Rename from "avx512f_getmantv2df_round".
	(avx512f_vgetmantv4sf_round): Rename from "avx512f_vgetmantv4sf_round".
	(ix86_expand_args_builtin): Handle avx512vl_getmantv8sf_mask,
	avx512vl_getmantv4df_mask, avx512vl_getmantv4sf_mask,
	avx512vl_getmantv2df_mask.
	(ix86_expand_round_builtin): Handle avx512f_vgetmantv2df_round,
	avx512f_vgetmantv4sf_round.
	* config/i386/sse.md
	(define_insn "<avx512>_storeu<ssemodesuffix><avxsizesuffix>_mask"):
	Rename from "avx512f_storeu<ssemodesuffix>512_mask" and update
	mode iterator.
	(define_insn "<mask_codefor>rcp14<mode><mask_name>"): Use VF_AVX512VL.
	(define_insn "<mask_codefor>rsqrt14<mode><mask_name>"): Ditto.
	(define_insn "<avx512>_scalef<mode><mask_name><round_name>"): Rename
	from "avx512f_scalef<mode><mask_name><round_name>" and update mode
	iterator..
	(define_insn "<avx512>_getexp<mode><mask_name><round_saeonly_name>"):
	Rename from "avx512f_getexp<mode><mask_name><round_saeonly_name>" and
	update mode iterator.
	(define_expand
	"<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>"): Rename from
	"avx512f_fixupimm<mode>_maskz<round_saeonly_expand_name>" and update
	mode iterator.
	(define_insn
	"<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>"): Rename
	from "avx512f_fixupimm<mode><sd_maskz_name><round_saeonly_name>" and
	update mode iterator.
	(define_insn "<avx512>_fixupimm<mode>_mask<round_saeonly_name>"): Rename
	from "avx512f_fixupimm<mode>_mask<round_saeonly_name>" and update mode
	iterator..
	(define_insn
	"<avx512>_rndscale<mode><mask_name><round_saeonly_name>"): rename from
	"avx512f_rndscale<mode><mask_name><round_saeonly_name>" and update
	mode iterator..
	(define_insn "<avx512>_getmant<mode><mask_name><round_saeonly_name>"):
	Rename from "avx512f_getmant<mode><mask_name><round_saeonly_name>" and
	update mode iterator.
	(define_insn "avx512f_vgetmant<mode><round_saeonly_name>"): Rename from
	"avx512f_getmant<mode><round_saeonly_name>".


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215106
2014-09-10 06:51:20 +00:00
Jan Hubicka 21833f2df0 re PR lto/63166 (ICE (LTO): ipa_intraprocedural_devirtualization, at ipa-prop.c:2611)
PR ipa/63166
	* ipa-prop.c (compute_known_type_jump_func): Fix conditional.

	* g++.dg/lto/pr63166_0.ii: New testcase.
	* g++.dg/lto/pr63166_1.ii: New testcase.

From-SVN: r215105
2014-09-10 06:33:36 +00:00
Alexander Ivchenko e274629ef8 AVX-512. Extend FMA patterns.
gcc/
	* config/i386/sse.md (define_mode_iterator VF_AVX512VL): New.
	(define_mode_iterator FMAMODEM): Allow 128/256bit EVEX version.
	(define_mode_iterator FMAMODE_AVX512): New.
	(define_mode_iterator FMAMODE): Remove conditions.
	(define_expand "fma4i_fmadd_<mode>"): Use FMAMODE_AVX512 mode iterator.
	(define_expand "<avx512>_fmadd_<mode>_maskz<round_expand_name>"): Rename
	from "<avx512>_fmadd_<mode>_maskz<round_expand_name>" and use VF_AVX512VL
	mode iterator.
	(define_mode_iterator FMAMODE_NOVF512): Remove.
	(define_insn "*fma_fmadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_mode_iterator VF_SF_AVX512VL): New.
	(define_insn "<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fmsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fnmadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>" and
	use FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fnmadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fnmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fnmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fnmsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>" and use
	FMAMODE mode iterator.
	(define_insn "<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fnmsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fnmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fnmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_expand "<avx512>_fmaddsub_<mode>_maskz<round_expand_name>"):
	Rename from "avx512f_fmaddsub_<mode>_maskz<round_expand_name>" and
	use VF_AVX512VL mode iterator.
	(define_insn "*fma_fmaddsub_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>" and
	remove subst usage.
	(define_insn "<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmaddsub_<mode>_mask<round_name>"): Rename from
	"avx512f_fmaddsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmaddsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "*fma_fmsubadd_<mode>"): Rename from
	"<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>" and
	remove usage of subst.
	(define_insn "<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>"):
	Use VF_SF_AVX512VL mode iterator.
	(define_insn "<avx512>_fmsubadd_<mode>_mask<round_name>"): Rename from
	"avx512f_fmsubadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
	iterator.
	(define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>"): Rename from
	"avx512f_fmsubadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
	iterator.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215104
2014-09-10 06:28:03 +00:00
Tony Wang 0876bdf57b re PR libgcc/56846 (_Unwind_Backtrace on ARM and noexcept)
2014-09-10  Tony Wang  <tony.wang@arm.com>

    libstdc++-v3/
    PR target/56846
    * libsupc++/eh_personality.cc (PERSONALITY_FUNCTION):
    Return with CONTINUE_UNWINDING when the state pattern
    contains: _US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND

From-SVN: r215101
2014-09-10 04:45:32 +00:00
Kugan Vivekanandarajah 27be0c3223 revert: calls.c (precompute_arguments): Check promoted_for_signed_and_unsigned_p and set the promoted mode.
gcc/ChangeLog:

2014-09-10  Kugan Vivekanandarajah  <kuganv@linaro.org>

	Revert r213751:
	* calls.c (precompute_arguments): Check
	 promoted_for_signed_and_unsigned_p and set the promoted mode.
	(promoted_for_signed_and_unsigned_p): New function.
	(expand_expr_real_1): Check promoted_for_signed_and_unsigned_p
	and set the promoted mode.
	* expr.h (promoted_for_signed_and_unsigned_p): New function definition.
	* cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if
	SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.

From-SVN: r215100
2014-09-10 00:19:23 +00:00
GCC Administrator 6e8962a5a0 Daily bump.
From-SVN: r215099
2014-09-10 00:16:26 +00:00
Manuel López-Ibáñez b559c810f3 opth-gen.awk: Generate mapping from cpp message reasons to the options that enable them.
gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* opth-gen.awk: Generate mapping from cpp message reasons to the
	options that enable them.
	* doc/options.texi (CppReason): Document.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* c.opt: Add CppReason to various flags.
	(Wdate-time): Re-sort.
	* c-common.c: Include c-common.h earlier.
	(struct reason_option_codes_t): Delete.
	(c_option_controlling_cpp_error): Prefix global type and struct
	with cpp_.

From-SVN: r215095
2014-09-09 22:17:54 +00:00
Manuel López-Ibáñez 1ef33fd4cd invoke.texi (Wnormalized=): Update.
gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* doc/invoke.texi (Wnormalized=): Update.

libcpp/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* include/cpplib.h (struct cpp_options): Declare warn_normalize as
	int instead of enum.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* c.opt	(Wnormalized): New.
	(Wnormalized=): Use Enum and Reject Negative.
	* c-opts.c (c_common_handle_option): Do not handle Wnormalized here.

gcc/testsuite/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* gcc.dg/cpp/warn-normalized-3.c: Delete useless dg-prune-output.

From-SVN: r215093
2014-09-09 21:41:43 +00:00
Janne Blomqvist 00c7a3c72a Fix pad status check.
2014-09-10  Janne Blomqvist  <jb@gcc.gnu.org>

	* io/transfer.c (read_block_form): Fix pad status check (found by
	Thomas Schwinge with -Wlogical-not-parentheses).

From-SVN: r215092
2014-09-10 00:23:25 +03:00
Segher Boessenkool 4abf82644e re PR target/63195 (stage3 build/gengtype miscompiled)
2014-09-09  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/63195
	* config/rs6000/rs6000.md (*bool<mode>3): Allow only register
	operands.  Split off the constant operand alternative to ...
	(*bool<mode>3_imm): New.

From-SVN: r215091
2014-09-09 20:49:08 +02:00
Jonathan Wakely fd18c76ac8 Make std::deque meet C++11 allocator requirements.
* include/bits/deque.tcc (deque::operator=(const deque&)): Handle
	allocator propagation.
	(deque::emplace_front, deque::emplace_back): Use allocator traits.
	(deque::_M_push_back_aux, deque::_M_push_front_aux): Likewise.
	(deque::_M_pop_back_aux, deque::_M_pop_front_aux): Likewise.
	* include/bits/stl_deque.h (__deque_buf_size): Add constexpr.
	(_Deque_iterator): Handle allocators with custom pointers.
	(_Deque_base): Likewise. Use allocator traits.
	(deque): Likewise. Add allocator-extended constructors.
	(deque::_M_move_assign1, deque::_M_move_assign2): Implement move
	assignment via tag dispatching.
	(deque::_M_replace_map): Replace existing data.
	* include/debug/deque (deque): Add allocator-extended constructors.
	* include/profile/deque (deque): Likewise.
	* testsuite/23_containers/deque/allocator/copy.cc: New.
	* testsuite/23_containers/deque/allocator/copy_assign.cc: New.
	* testsuite/23_containers/deque/allocator/ext_ptr.cc: New.
	* testsuite/23_containers/deque/allocator/minimal.cc: New.
	* testsuite/23_containers/deque/allocator/move.cc: New.
	* testsuite/23_containers/deque/allocator/move_assign-2.cc: New.
	* testsuite/23_containers/deque/allocator/move_assign.cc: New.
	* testsuite/23_containers/deque/allocator/noexcept.cc: New.
	* testsuite/23_containers/deque/allocator/swap.cc: New.
	* testsuite/23_containers/deque/requirements/dr438/assign_neg.cc:
	Adjust dg-error line number.
	* testsuite/23_containers/deque/requirements/dr438/
	constructor_1_neg.cc: Likewise.
	* testsuite/23_containers/deque/requirements/dr438/
	constructor_2_neg.cc: Likewise.
	* testsuite/23_containers/deque/requirements/dr438/insert_neg.cc:
	Likewise.
	* testsuite/23_containers/vector/52591.cc: Test both the propagating
	and always-equal cases.

From-SVN: r215090
2014-09-09 18:29:32 +01:00
David Malcolm e8a54173bc single_set takes an insn
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* rtl.h (single_set_2): Strengthen first param from const_rtx to
	const rtx_insn *, and move prototype to above...
	(single_set): ...this.  Convert this from a macro to an inline
	function, enforcing the requirement that the param is a const
	rtx_insn *.
	(find_args_size_adjust): Strengthen param from rtx to rtx_insn *.

	* config/arm/aarch-common-protos.h (aarch_crypto_can_dual_issue):
	Strengthen both params from rtx to rtx_insn *.
	* config/arm/aarch-common.c (aarch_crypto_can_dual_issue):
	Likewise; introduce locals "producer_set", "consumer_set", using
	them in place of "producer" and "consumer" when dealing with SET
	rather than insn.
	* config/avr/avr.c (avr_out_plus): Add checked cast to rtx_insn *
	when invoking single_set in region guarded by INSN_P.
	(avr_out_bitop): Likewise.
	(_reg_unused_after): Introduce local rtx_sequence * "seq" in
	region guarded by GET_CODE check, using methods to strengthen
	local "this_insn" from rtx to rtx_insn *, and for clarity.
	* config/avr/avr.md (define_insn_and_split "xload8<mode>_A"):
	Strengthen local "insn" from rtx to rtx_insn *.
	(define_insn_and_split "xload<mode>_A"): Likewise.
	* config/bfin/bfin.c (trapping_loads_p): Likewise for param
	"insn".
	(find_load): Likewise for return type.
	(workaround_speculation): Likewise for both locals named
	"load_insn".
	* config/cris/cris.c (cris_cc0_user_requires_cmp): Likewise for
	local "cc0_user".
	* config/cris/cris.md (define_peephole2 ; moversideqi): Likewise
	for local "prev".
	* config/h8300/h8300-protos.h (notice_update_cc): Likewise for
	param 2.
	* config/h8300/h8300.c (notice_update_cc): Likewise.
	* config/i386/i386.c (ix86_flags_dependent): Likewise for params
	"insn" and "dep_insn".
	(exact_store_load_dependency): Likewise for both params.
	(ix86_macro_fusion_pair_p): Eliminate local named "single_set"
	since this now clashes with inline function.  Instead, delay
	calling single_set until the point where its needed, and then
	assign the result to "compare_set" and rework the conditional that
	follows.
	* config/ia64/ia64.md (define_expand "tablejump"): Strengthen
	local "last" from rtx to rtx_insn *.
	* config/mips/mips-protos.h (mips_load_store_insns): Likewise for
	second param.
	(mips_store_data_bypass_p): Likewise for both params.
	* config/mips/mips.c (mips_load_store_insns): Likewise for second
	param.
	(mips_store_data_bypass_p): Likewise for both params.
	(mips_orphaned_high_part_p): Likewise for param "insn".
	* config/mn10300/mn10300.c (extract_bundle): Likewise.
	(mn10300_bundle_liw): Likewise for locals "r", "insn1", "insn2".
	Introduce local rtx "insn2_pat".
	* config/rl78/rl78.c (move_elim_pass): Likewise for locals "insn",
	"ninsn".
	(rl78_remove_unused_sets): Likewise for locals "insn", "ninsn".
	Introduce local rtx "set", using it in place of "insn" for the
	result of single_set.  This appears to fix a bug, since the call
	to find_regno_note on a SET does nothing.
	* config/rs6000/rs6000.c (set_to_load_agen): Strengthen both
	params from rtx to rtx_insn *.
	(set_to_load_agen): Likewise.
	* config/s390/s390.c (s390_label_align): Likewise for local
	"prev_insn".  Introduce new rtx locals "set" and "src", using
	them in place of "prev_insn" for the results of single_set
	and SET_SRC respectively.
	(s390_swap_cmp): Strengthen local "jump" from rtx to rtx_insn *.
	Introduce new rtx local "set" using in place of "jump" for the
	result of single_set.  Use SET_SRC (set) rather than plain
	XEXP (set, 1).
	* config/sh/sh.c (noncall_uses_reg): Strengthen param 2from
	rtx to rtx_insn *.
	(noncall_uses_reg): Likewise.
	(reg_unused_after): Introduce local rtx_sequence * "seq" in region
	guarded by GET_CODE check, using its methods for clarity, and to
	enable strengthening local "this_insn" from rtx to rtx_insn *.
	* config/sh/sh.md (define_expand "mulhisi3"): Strengthen local
	"insn" from rtx to rtx_insn *.
	(define_expand "umulhisi3"): Likewise.
	(define_expand "smulsi3_highpart"): Likewise.
	(define_expand "umulsi3_highpart"): Likewise.
	* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
	local "after".  Replace GET_CODE check with a dyn_cast,
	introducing new local rtx_sequence * "seq", using insn method for
	typesafety.

	* dwarf2cfi.c (dwarf2out_frame_debug): Strengthen param "insn"
	from rtx to rtx_insn *.  Introduce local rtx "pat", using it in
	place of "insn" once we're dealing with patterns rather than the
	input insn.
	(scan_insn_after): Strengthen param "insn" from rtx to rtx_insn *.
	(scan_trace): Likewise for local "elt", updating lookups within
	sequence to use insn method rather than element method.
	* expr.c (find_args_size_adjust): Strengthen param "insn" from rtx
	to rtx_insn *.
	* gcse.c (gcse_emit_move_after): Likewise for local "new_rtx".
	* ifcvt.c (noce_try_abs): Likewise for local "insn".
	* ira.c (fix_reg_equiv_init): Add checked cast to rtx_insn * when
	invoking single_set.
	* lra-constraints.c (insn_rhs_dead_pseudo_p): Strengthen param
	"insn" from rtx to rtx_insn *.
	(skip_usage_debug_insns): Likewise for return type, adding a
	checked cast.
	(check_secondary_memory_needed_p): Likewise for local "insn".
	(inherit_reload_reg): Likewise.
	* modulo-sched.c (sms_schedule): Likewise for local "count_init".
	* recog.c (peep2_attempt): Likewise for local "old_insn", adding
	checked casts.
	(store_data_bypass_p): Likewise for both params.
	(if_test_bypass_p): Likewise.
	* recog.h (store_data_bypass_p): Likewise for both params.
	(if_test_bypass_p): Likewise.
	* reload.c (find_equiv_reg): Likewise for local "where".
	* reorg.c (delete_jump): Likewise for param "insn".
	* rtlanal.c (single_set_2): Strenghen param "insn" from const_rtx
	to const rtx_insn *.
	* store-motion.c (replace_store_insn): Likewise for param "del".
	(delete_store): Strengthen local "i" from rtx to rtx_insn_list *,
	and use its methods for clarity, and to strengthen local "del"
	from rtx to rtx_insn *.
	(build_store_vectors): Use insn method of "st" when calling
	replace_store_insn for typesafety and clarity.

From-SVN: r215089
2014-09-09 17:02:34 +00:00
Bill Schmidt 65cf8039d3 rs6000.c (rtx_is_swappable_p): Add UNSPEC_VSX_CVDPSPN as an unswappable operand...
[gcc]

2014-09-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rtx_is_swappable_p): Add
	UNSPEC_VSX_CVDPSPN as an unswappable operand, and add commentary
	on how to make it legal in future.

[gcc/testsuite]

2014-09-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/swaps-p8-15.c: Remove scan-assembler-not for
	xxpermdi and add commentary about adding it back later; remove
	unused typedef.

From-SVN: r215088
2014-09-09 16:53:07 +00:00
David Malcolm 647d790d2f recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09  David Malcolm  <dmalcolm@redhat.com>

	* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
	to rtx_insn *.
	(restinsn): Likewise.
	* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
	Likewise for param.
	* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
	Likewise.
	* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
	first param.
	(arc_hazard): Likewise for both params.
	* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
	checked casts to rtx_sequence * and uses of the insn method for
	type-safety.
	(arc_hazard): Strengthen both params from rtx to rtx_insn *.
	(arc_adjust_insn_length): Likewise for param "insn".
	(struct insn_length_parameters_s): Likewise for first param of
	"get_variants" callback field.
	(arc_get_insn_variants): Likewise for first param and local
	"inner".  Replace a check of GET_CODE with a dyn_cast to
	rtx_sequence *, using methods for type-safety and clarity.
	* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
	rtx_sequence * and uses of the insn method for type-safety when
	invoking arc_adjust_insn_length.
	* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
	for param.
	(arm_address_offset_is_imm): Likewise.
	(struct tune_params): Likewise for params 1 and 3 of the
	"sched_adjust_cost" callback field.
	* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
	params 1 and 3 ("insn" and "dep").
	(xscale_sched_adjust_cost): Likewise.
	(fa726te_sched_adjust_cost): Likewise.
	(cortexa7_older_only): Likewise for param "insn".
	(cortexa7_younger): Likewise.
	(arm_attr_length_move_neon): Likewise.
	(arm_address_offset_is_imm): Likewise.
	* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
	* config/avr/avr.c (avr_notice_update_cc): Likewise.
	* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
	(workaround_speculation): Likewise for local "last_condjump".
	* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
	(shadow_or_blockage_p): Likewise.
	(get_unit_reqs): Likewise.
	(get_unit_operand_masks): Likewise.
	(c6x_registers_update): Likewise.
	(returning_call_p): Likewise.
	(can_use_callp): Likewise.
	(convert_to_callp): Likewise.
	(find_last_same_clock): Likwise for local "t".
	(reorg_split_calls): Likewise for local "shadow".
	(hwloop_pattern_reg): Likewise for param "insn".
	* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
	* config/frv/frv.c (frv_final_prescan_insn): Likewise.
	(frv_extract_membar): Likewise.
	(frv_optimize_membar_local): Strengthen param "last_membar" from
	rtx * to rtx_insn **.
	(frv_optimize_membar_global): Strengthen param "membar" from rtx
	to rtx_insn *.
	(frv_optimize_membar): Strengthen local "last_membar" from rtx *
	to rtx_insn **.
	* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
	both params from rtx to rtx_insn *.
	(ia64_ld_address_bypass_p): Likewise.
	* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
	"insn".
	(ia64_safe_type): Likewise.
	(group_barrier_needed): Likewise.
	(safe_group_barrier_needed): Likewise.
	(ia64_single_set): Likewise.
	(is_load_p): Likewise.
	(record_memory_reference): Likewise.
	(get_mode_no_for_insn): Likewise.
	(important_for_bundling_p): Likewise.
	(unknown_for_bundling_p): Likewise.
	(ia64_st_address_bypass_p): Likewise for both params.
	(ia64_ld_address_bypass_p): Likewise.
	(expand_vselect): Introduce new local rtx_insn * "insn", using it
	in place of rtx "x" after the emit_insn call.
	* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
	Strengthen param from rtx to rtx_insn *.
	(ix86_agi_dependent): Likewise for both params.
	(ix86_attr_length_immediate_default): Likewise for param 1.
	(ix86_attr_length_address_default): Likewise for param.
	(ix86_attr_length_vex_default): Likewise for param 1.
	* config/i386/i386.c (ix86_attr_length_immediate_default):
	Likewise for param "insn".
	(ix86_attr_length_address_default): Likewise.
	(ix86_attr_length_vex_default): Likewise.
	(ix86_agi_dependent): Likewise for both params.
	(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
	(vselect_insn): Likewise for this variable.
	* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
	for param 1.
	(m68k_sched_attr_opy_type): Likewise.
	* config/m68k/m68k.c (sched_get_operand): Likewise.
	(sched_attr_op_type): Likewise.
	(m68k_sched_attr_opx_type): Likewise.
	(m68k_sched_attr_opy_type): Likewise.
	(sched_get_reg_operand): Likewise.
	(sched_get_mem_operand): Likewise.
	(m68k_sched_address_bypass_p): Likewise for both params.
	(sched_get_indexed_address_scale): Likewise.
	(m68k_sched_indexed_address_bypass_p): Likewise.
	* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
	(m68k_sched_indexed_address_bypass_p): Likewise.
	* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
	"label", "ret" from rtx to rtx_insn *, adding a checked cast and
	removing another.
	* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
	params from rtx to rtx_insn *.
	(mips_fmadd_bypass): Likewise.
	* config/mips/mips.c (mips_fmadd_bypass): Likewise.
	(mips_linked_madd_p): Likewise.
	(mips_macc_chains_last_hilo): Likewise for this variable.
	(mips_macc_chains_record): Likewise for param.
	(vr4130_last_insn): Likewise for this variable.
	(vr4130_swap_insns_p): Likewise for both params.
	(mips_ls2_variable_issue): Likewise for param.
	(mips_need_noat_wrapper_p): Likewise for param "insn".
	(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
	in place of "x" after the emit_insn.
	* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
	params from rtx to rtx_insn *.
	* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
	(pa_combine_instructions): Introduce local "par" for result of
	gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
	to make_insn_raw.
	(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
	* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
	(rl78_alloc_physical_registers_op1): Likewise.
	(rl78_alloc_physical_registers_op2): Likewise.
	(rl78_alloc_physical_registers_ro1): Likewise.
	(rl78_alloc_physical_registers_cmp): Likewise.
	(rl78_alloc_physical_registers_umul): Likewise.
	(rl78_alloc_address_registers_macax): Likewise.
	(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
	* config/s390/predicates.md (execute_operation): Likewise for
	local "insn".
	* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
	params.
	* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
	(addr_generation_dependency_p): Likewise for param "insn".
	(s390_agen_dep_p): Likewise for both params.
	(s390_fpload_toreg): Likewise for param "insn".
	* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
	* config/sh/sh.c (sh_loop_align): Likewise for param and local
	"next".
	* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
	* config/sh/sh_treg_combine.cc
	(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
	and local "i".
	(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
	* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
	"and_insn", "load", "shift".
	* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
	"insn".
	* final.c (final_scan_insn): Introduce local rtx_insn * "other"
	for XEXP (note, 0) of the REG_CC_SETTER note.
	(cleanup_subreg_operands): Strengthen param "insn" from rtx to
	rtx_insn *, eliminating a checked cast made redundant by this.
	* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
	to rtx_insn *.
	* genattr.c (main): When writing out the prototype to
	const_num_delay_slots, strengthen the param from rtx to
	rtx_insn *.
	* genattrtab.c (write_const_num_delay_slots): Likewise when
	writing out the implementation of const_num_delay_slots.
	* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
	"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
	* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
	favor of new rtx locals "src" and "set" and new local rtx_insn *
	"insn" and "seq".
	(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
	to rtx_insn *.
	(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
	locals "cond", "if_then_else", "set" and new rtx_insn * locals
	"insn" and "seq".
	(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
	"last" from rtx to rtx_insn *.  Likewise for a local "tmp",
	renaming to "tmp_insn".  Eliminate the other local rtx "tmp" from
	the top-level scope, replacing with new more tightly-scoped rtx
	locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
	"new_insn", "copy_of_insn_b", and make local rtx "set" more
	tightly-scoped.
	* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
	rtx_insn *.
	* ira.c (setup_prohibited_mode_move_regs): Likewise for local
	"move_insn".
	(ira_setup_alts): Likewise for param "insn".
	* lra-constraints.c (emit_inc): Likewise for local "add_insn".
	* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
	and an rtx_insn *.
	(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
	new more-tightly scoped rtx locals "add3_insn", "insn",
	"add2_insn" and rtx_insn * "move_insn".
	* postreload-gcse.c (eliminate_partially_redundant_load): Add
	checked cast on result of gen_move_insn when invoking
	extract_insn.
	* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(verify_changes): Add a checked cast on "object" when invoking
	insn_invalid_p.
	(extract_insn_cached): Strengthen param "insn" from rtx to
	rtx_insn *.
	(extract_constrain_insn_cached): Likewise.
	(extract_insn): Likewise.
	* recog.h (insn_invalid_p): Likewise for param 1.
	(recog_memoized): Likewise for param.
	(extract_insn): Likewise.
	(extract_constrain_insn_cached): Likewise.
	(extract_insn_cached): Likewise.
	* reload.c (can_reload_into): Likewise for local "test_insn".
	* reload.h (cleanup_subreg_operands): Likewise for param.
	* reload1.c (emit_insn_if_valid_for_reload): Rename param from
	"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
	result of emit_insn.  Remove a checked cast made redundant by this
	change.
	* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
	rtx to rtx_insn *.
	* sel-sched.c (get_reg_class): Likewise.

From-SVN: r215087
2014-09-09 16:34:56 +00:00