PR c++/80297
* genmatch.c (capture::gen_transform): For GENERIC unshare_expr
captures used multiple times, except for the last use.
* generic-match-head.c: Include gimplify.h.
* g++.dg/torture/pr80297.C: New test.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r246693
2017-04-03 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/80307
* config/arm/arm.c (thumb1_rtx_costs): Give a cost of 32
instructions for small multiply cores.
gcc/testsuite/
PR target/80307
* gcc.target/arm/small-multiply-m0-1.c: Do not skip test if not
targeting any CPU or architecture.
* gcc.target/arm/small-multiply-m0-2.c: Likewise.
* gcc.target/arm/small-multiply-m0-3.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
* gcc.target/arm/small-multiply-m1-1.c: Likewise.
* gcc.target/arm/small-multiply-m1-2.c: Likewise.
* gcc.target/arm/small-multiply-m1-3.c: Likewise.
From-SVN: r246682
* config/mips/mips.c (mips_multi_add): Zero initialize the newly
added member.
(mips_expand_vec_perm_const): Initialize elements in orig_perm
that are not set by the loop over the elements.
From-SVN: r246681
PR target/80286
* config/i386/i386.c (ix86_expand_args_builtin): If op has scalar
int mode, convert_modes it to mode as unsigned, otherwise use
lowpart_subreg to mode rather than SImode.
* config/i386/sse.md (<mask_codefor>ashr<mode>3<mask_name>,
ashr<mode>3, ashr<mode>3<mask_name>, <shift_insn><mode>3<mask_name>):
Use DImode instead of SImode for the shift count operand.
* config/i386/mmx.md (mmx_ashr<mode>3, mmx_<shift_insn><mode>3):
Likewise.
testsuite/
* gcc.target/i386/avx-pr80286.c: New test.
* gcc.dg/pr80286.c: New test.
From-SVN: r246676
2017-04-04 Richard Biener <rguenther@suse.de>
PR middle-end/80281
* match.pd (A + (-B) -> A - B): Make sure to preserve unsigned
arithmetic done for the negate or the plus. Simplify.
(A - (-B) -> A + B): Likewise.
* fold-const.c (split_tree): Make sure to not negate pointers.
* gcc.dg/torture/pr80281.c: New testcase.
From-SVN: r246674
The function simplify_binary_operation_1 has code that does
/* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
but this transformation is only valid if "flags" has the same machine
mode as the outer compare. This fixes it.
PR rtl-optimization/60818
* simplify-rtx.c (simplify_binary_operation_1): Do not replace
a compare of comparisons with the thing compared if this results
in a different machine mode.
gcc/testsuite/
PR rtl-optimization/60818
* gcc.c-torture/compile/pr60818.c: New testcase.
From-SVN: r246666
PR rtl-optimization/79405
* fwprop.c (propagations_left): New variable.
(forward_propagate_into): Decrement it.
(fwprop_init): Initialize it.
(fw_prop): If the variable has reached zero, stop propagating.
(fwprop_addr): Ditto.
gcc/testsuite/
PR rtl-optimization/79405
gcc.dg/pr79405.c: New testcase.
From-SVN: r246627
PR debug/79255
* dwarf2out.c (decls_for_scope): If BLOCK_NONLOCALIZED_VAR is
a FUNCTION_DECL, pass it as decl instead of origin to
process_scope_var.
* gcc.dg/pr79255.c: New test.
From-SVN: r246622
This fixes a build-failure with gcc.c-torture/execute/20050604-1.c when
using -mabi=32 -mmsa -mno-odd-spreg.
gcc/
* config/mips/mips-msa.md (msa_vec_extract_<msafmt_f>): Update
extraction from odd-numbered MSA register.
From-SVN: r246613
PR middle-end/80173
* expmed.c (store_bit_field_1): Don't attempt to create
a word subreg out of hard registers wider than word if they
have HARD_REGNO_NREGS of 1 for their mode.
* gcc.target/i386/pr80173.c: New test.
From-SVN: r246608
PR middle-end/80163
* varasm.c (initializer_constant_valid_p_1): Disallow sign-extending
conversions to integer types wider than word and pointer.
* gcc.dg/pr80163.c: New test.
From-SVN: r246607
PR debug/80025
* cselib.h (rtx_equal_for_cselib_1): Add depth argument.
(rtx_equal_for_cselib_p): Pass 0 to it.
* cselib.c (cselib_hasher::equal): Likewise.
(rtx_equal_for_cselib_1): Add depth argument. If depth
is 128, don't look up VALUE locs and punt. Increment
depth in recursive calls when walking VALUE locs.
* gcc.dg/torture/pr80025.c: New test.
From-SVN: r246606
2017-03-31 Bernd Edlinger <bernd.edlinger@hotmail.de>
* gcov.c (md5sum_to_hex): Fix output of MD5 hex bytes.
(make_gcov_file_name): Use the canonical path name for generating
the MD5 value.
(read_line): Fix handling of files with ascii null bytes.
From-SVN: r246605
gcc/
* config/mips/mips.c (mips_expand_vector_init): Create
a const_vector to initialise a vector register instead of
using a const_int.
From-SVN: r246601
2017-03-30 Martin Jambor <mjambor@suse.cz>
PR ipa/77333
* cgraph.h (cgraph_build_function_type_skip_args): Declare.
* cgraph.c (redirect_call_stmt_to_callee): Set gimple fntype so that
it reflects the signature changes performed at the callee side.
* cgraphclones.c (build_function_type_skip_args): Make public, renamed
to cgraph_build_function_type_skip_args.
(build_function_decl_skip_args): Adjust call to the above function.
testsuite/
* g++.dg/ipa/pr77333.C: New test.
From-SVN: r246589
PR target/80206
* config/i386/sse.md
(<extract_type>_vextract<shuffletype><extract_suf>_mask): Use
register as dest whenever it is a MEM not rtx_equal_p to the
corresponding dup operand, and when forcing into reg move the
reg into the memory afterwards.
(<extract_type_2>_vextract<shuffletype><extract_suf_2>_mask):
Likewise. Use <ssehalfvecmode> instead of <ssequartermode>
for the force_reg mode.
(avx512vl_vextractf128<mode>): Use register as dest either
always when a MEM, or when it is a MEM not rtx_equal_p to the
corresponding dup operand, or even not when it is a CONST_VECTOR
depending on the mode and lo vs. hi.
(avx512dq_vextract<shuffletype>64x2_1_maskm): Remove extraneous
parens.
(avx512f_vextract<shuffletype>32x4_1_maskm): Likewise.
(<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>):
Likewise. Require that operands[2] is even.
(<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>):
Remove extraneous parens. Require that operands[2] is a multiple
of 4.
(vec_extract_lo_<mode><mask_name>): Don't bother testing if
operands[0] is a MEM if <mask_applied>, the predicates/constraints
disallow memory then.
* gcc.target/i386/pr80206.c: New test.
From-SVN: r246588
2017-03-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/77498
* tree-ssa-pre.c (phi_translate_1): Do not allow simplifications
to non-constants over backedges.
* gfortran.dg/pr77498.f: New testcase.
From-SVN: r246583
If combine has added an unconditional trap there will be a new basic
block as well. It will then end up considering the NOTE_INSN_BASIC_BLOCK
as the last_combined_insn, but then it tries to take the DF_INSN_LUID
of that and that dereferences a NULL pointer (since such a note is not
an INSN_P).
This fixes it by not taking non-insns as last_combined_insn.
PR rtl-optimization/80233
* combine.c (combine_instructions): Only take NONDEBUG_INSN_P insns
as last_combined_insn. Do not test for BARRIER_P separately.
gcc/testsuite/
PR rtl-optimization/80233
* gcc.c-torture/compile/pr80233.c: New testcase.
From-SVN: r246575
2017-03-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/80158
* gimple-ssa-strength-reduction.c (replace_mult_candidate):
Handle possible future case of more than one alternate
interpretation.
(replace_rhs_if_not_dup): Likewise.
(replace_one_candidate): Likewise.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r246567
* tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and
mark new edge's irreducible flag accordign to it.
(vect_do_peeling): Check loop preheader edge's irreducible flag
and pass it to function slpeel_add_loop_guard.
gcc/testsuite
* gcc.c-torture/compile/irreducible-loop.c: New.
From-SVN: r246540
2017-03-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/78644
* tree-ssa-ccp.c (evaluate_stmt): When we may not use the value
of a simplification result we may not use it at all.
* gcc.dg/pr78644-1.c: New testcase.
* gcc.dg/pr78644-2.c: Likewise.
From-SVN: r246534
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80205
* g++.dg/ipa/pr80205.C: New test.
2017-03-28 Richard Biener <rguenther@suse.de>
PR ipa/80205
* tree-inline.c (copy_phis_for_bb): Do not create PHI node
without arguments, generate default definition of a SSA name.
From-SVN: r246530
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* cgraphunit.c (cgraph_node::expand_thunk): Mark argument of a
thunk call as DECL_GIMPLE_REG_P when vector or complex type.
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* gcc.dg/ipa/pr80104.c: New test.
From-SVN: r246525
The compiler is supposed to have the builtin defined _REENTRANT defined
when -pthread is passed, which wasn't done on the ARC architecture.
When _REENTRANT is not passed, the C library will not use reentrant
functions, and the latest version of ax_pthread.m4 from the
autoconf-archive will no longer detect that thread support is
available (see https://savannah.gnu.org/patch/?8186).
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* config/arc/arc.h (CPP_SPEC): Add subtarget_cpp_spec.
(EXTRA_SPECS): Define.
(SUBTARGET_EXTRA_SPECS): Likewise.
(SUBTARGET_CPP_SPEC): Likewise.
* config/arc/elf.h (EXTRA_SPECS): Renamed to
SUBTARGET_EXTRA_SPECS.
* config/arc/linux.h (SUBTARGET_CPP_SPEC): Define.
Co-Authored-By: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
From-SVN: r246524
vec_select expects in selection a list of subparts. The old ARC SIMD
extension instructions were not up-to-date.
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/simdext.md (vst64_insn): Update pattern.
(vld32wh_insn): Likewise.
(vld32wl_insn): Likewise.
(vld64_insn): Likewise.
(vld32_insn): Likewise.
From-SVN: r246523
/home/markus/gcc/gcc/tree.c: In function ‘void inchash::add_expr(const_tree, inchash::hash&, unsigned int)’:
/home/markus/gcc/gcc/tree.c:8013:11: warning: name lookup of ‘i’ changed
for (i = TREE_OPERAND_LENGTH (t) - 1; i >= 0; --i)
^
/home/markus/gcc/gcc/tree.c:7773:7: warning: matches this ‘i’ under ISO standard rules
int i;
^
/home/markus/gcc/gcc/tree.c:7869:16: warning: matches this ‘i’ under old rules
for (int i = 0; i < TREE_VEC_LENGTH (t); ++i)
^
From-SVN: r246519