libgcc/
* config/aarch64/aarch64-unwind.h: New file.
(DWARF_REGNUM_AARCH64_RA_STATE): Define.
(MD_POST_EXTRACT_ROOT_ADDR): New target marcro and define it on AArch64.
(MD_POST_EXTRACT_FRAME_ADDR): Likewise.
(MD_POST_FROB_EH_HANDLER_ADDR): Likewise.
(MD_FROB_UPDATE_CONTEXT): Define it on AArch64.
(aarch64_post_extract_frame_addr): New function.
(aarch64_post_frob_eh_handler_addr): New function.
(aarch64_frob_update_context): New function.
* config/aarch64/linux-unwind.h: Include aarch64-unwind.h
* config.host (aarch64*-*-elf, aarch64*-*-rtems*,
aarch64*-*-freebsd*):
Initialize md_unwind_header to include aarch64-unwind.h.
* unwind-dw2.c (struct _Unwind_Context): Define "RA_A_SIGNED_BIT".
(execute_cfa_program): Multiplex DW_CFA_GNU_window_save for
__aarch64__.
(uw_update_context): Honor MD_POST_EXTRACT_FRAME_ADDR.
(uw_init_context_1): Honor MD_POST_EXTRACT_ROOT_ADDR.
(uw_frob_return_addr): New function.
(uw_install_context): Use uw_frob_return_addr.
From-SVN: r244673
The MIPS sfp-machine.h has an _FP_CHOOSENAN implementation which
emulates hardware semantics of not preserving signaling NaN payloads
for an operation with two NaN arguments (although that doesn't suffice
to avoid sNaN payload preservation in any case with just one NaN
argument).
However, those are only hardware semantics in the legacy NaN case; in
the NAN2008 case, the architecture documentation says hardware
preserves payloads in such cases. Furthermore, this implementation
assumes legacy NaN semantics, so in the NAN2008 case the
implementation actually has the effect of preserving sNaN payloads but
not preserving qNaN payloads, when both should be preserved.
This patch fixes the code just to copy from the first argument (at the
level of libgcc, it's not meaningful which argument is the first and
which is the second).
Tested for mips64-linux-gnu (soft float, NAN2008) with the glibc math/
tests.
* config/mips/sfp-machine.h (_FP_CHOOSENAN): Always preserve NaN
payload if [__mips_nan2008].
From-SVN: r244059
libgcc/
2016-12-12 George Spelvin <linux@sciencehorizons.net>
* config/avr/lib1funcs.S (__ashldi3): Use __tmp_reg__ to restore
R16 instead of push + pop.
(__ashrdi3, __lshrdi3): Same. And use __zero_reg__ for signs.
From-SVN: r243545
gcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config/arc/arc.h (STARTFILE_SPEC): Use default linux specs.
(ENDFILE_SPEC): Likewise.
libgcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config.host (arc*-*-linux-uclibc*): Use default extra
objects. Include linux-android header.
* config/arc/crti.S (_init): Declare symbol as function.
(_fini): Likewise.
From-SVN: r243245
PR gcc/74748
* libgcc/config/bfin/libgcc-glibc.ver, libgcc/config/bfin/t-linux:
use generic linker version information on Blackfin.
2016-11-27 Iain Sandoe <iain@codesourcery.com>
From-SVN: r242934
A/ Newer versions of ld64 check the min_version command, and newer versions of
the system assembler inserts this in response to "-mmacosx-version-min=" on
the assembler line. Unless one makes sensible versions, some object is bound
to conflict.
B/ Additionally, there's a difference in behaviour between "as" and "ld" when
presented with xx.yy.zz (ld truncates to xx.yy, as doesn't); net result is
that one needs to pass a truncated version to "as".
So (if the assembler supports minversion commands)
(a) provide a truncated minversion (as asm_macosx_version_min, which is a
driver-only var).
(b) pass this to "as"
(c) Update tests to determine 'HAVE_AS_MMACOSX_VERSION_MIN_OPTION'
(Rainer's patch)
(d) For some reason the testcases are "run" (it's not obvious they need to be,
they are checking compile-time issues)
- anyway, to preserve the status quo, I've left them as exec. However, the
minimum version that can be code-gened for is target-dependent (there are no
released x86 versions before 10.4, for example). To avoid conflicts where
the "as" is assuming some minimum, I've set the testversion to 10.5 (which
is supported by all the archs we have)
(e) We need to ensure that libgcc and crts are generated with a sufficiently
old minversion not to conflict.
gcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config.in: Regenerate
* config/darwin-driver.c (darwin_driver_init): Emit a version string
for the assembler.
* config/darwin.h(ASM_MMACOSX_VERSION_MIN_SPEC): New, new tests.
* config/darwin.opt(asm_macosx_version_min): New.
* config/i386/darwin.h: Handle ASM_MMACOSX_VERSION_MIN_SPEC.
* configure: Regenerate
* configure.ac: Check for mmacosx-version-min handling.
gcc/testsuite/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/67710
* gcc.dg/darwin-minversion-1.c: Update min version check.
* gcc.dg/darwin-minversion-2.c: Likewise.
* gcc.dg/darwin-minversion-3.c: Likewise.
libgcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config/t-darwin: Default builds to 10.5 codegen.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r242898
libgcc/
* config/arm/fp16.c (struct format): New.
(binary32): New.
(__gnu_float2h_internal): New. Body moved from
__gnu_f2h_internal and generalize.
(_gnu_f2h_internal): Move body to function __gnu_float2h_internal.
Call it with binary32.
Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242781
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
From-SVN: r242268
Define LIB2ADDEH_XTENSA_UNWIND_DW2_FDE to unwind-dw2-fde.c in
xtensa/t-elf and to unwind-dw2-fde-dip.c in xtensa/t-linux and use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE in LIB2ADDEH definition.
This fixes build for elf target with windowed xtensa core that currently
breaks with the following error message:
unwind-dw2-fde-dip.c:36:40: fatal error: elf.h: No such file or directory
2016-10-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-elf (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-linux (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-windowed (LIB2ADDEH): Use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE defined by either xtensa/t-elf
or xtensa/t-linux.
From-SVN: r241313
Use new FPU instruction sequences documented in the ISA book to
implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2,
__rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt.
2016-10-18 Ding-Kai Chen <dkchen@cadence.com>
libgcc/
* config/xtensa/ieee754-df.S (__recipdf2, __rsqrtdf2,
__ieee754_sqrt): New functions.
(__divdf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_DFP_DIV.
* config/xtensa/ieee754-sf.S (__recipsf2, __rsqrtsf2,
__ieee754_sqrtf): New functions.
(__divsf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_FP_DIV.
* config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _sqrtf, _recipsf2
_rsqrtsf2, _sqrt, _recipdf2 and _rsqrtdf2.
From-SVN: r241312
For Aurelien Jarno <aurelien@aurel32.net>
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard mandates:
"Under default exception handling, any operation signaling an invalid
operation exception and for which a floating-point result is to be
delivered shall deliver a quiet NaN."
Given the soft float ARM code ignores exceptions and always provides a
result, a float to double conversion of a signaling NaN should return a
quiet NaN. Fix this in extendsfdf2.
gcc/ChangeLog:
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
gcc/testsuite/ChangeLog:
* gcc.dg/pr59833.c: New testcase.
From-SVN: r238584
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r238215
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
gcc/ChangeLog
* config/tilegx/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
* config/tilepro/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
libgcc/ChangeLog
* config/tilepro/atomic.h: Do not include arch/spr_def.h and
asm/unistd.h.
(SPR_CMPEXCH_VALUE): Define for tilegx.
(__NR_FAST_cmpxchg): Define for tilepro.
(__NR_FAST_atomic_update): Define for tilepro.
(__NR_FAST_cmpxchg64): Define for tilepro.
From-SVN: r237824
