Commit Graph

170497 Commits

Author SHA1 Message Date
Jakub Jelinek bb522e2eea c-parser.c (check_no_duplicate_clause): Simplify using omp_find_clause.
c/
	* c-parser.c (check_no_duplicate_clause): Simplify using
	omp_find_clause.
	(c_parser_omp_clause_if): Fix up printing of target {enter,exit} data
	directive name modifiers.
	(c_parser_omp_clause_proc_bind): Check for duplicate proc_bind clause.
cp/
	* parser.c (check_no_duplicate_clause): Simplify using
	omp_find_clause.
	(cp_parser_omp_clause_if): Fix up printing of target {enter,exit} data
	directive name modifiers.
testsuite/
	* c-c++-common/gomp/if-4.c: New test.
	* c-c++-common/gomp/clause-dups-1.c: New test.

From-SVN: r274227
2019-08-09 09:24:51 +02:00
Jakub Jelinek 2c3b8badaa re PR c/91401 (schedule + dist_schedule clauses rejected on distribute parallel for)
PR c/91401
c/
	* c-parser.c (c_parser_omp_clause_dist_schedule): Fix up typos in the
	check_no_duplicate_clause call.  Comment it out, instead emit a
	warning for duplicate dist_schedule clauses.
cp/
	* parser.c (cp_parser_omp_clause_dist_schedule): Comment out the
	check_no_duplicate_clause call, instead emit a warning for duplicate
	dist_schedule clauses.
testsuite/
	* c-c++-common/gomp/pr91401-1.c: New test.
	* c-c++-common/gomp/pr91401-2.c: New test.

From-SVN: r274226
2019-08-09 09:23:03 +02:00
Alexandre Oliva 5dd6b2daae use rand instead of random
rand is in ISO C, whereas random is only in POSIX, so it makes sense
to use the more portable function everywhere instead of falling back
from one to the other on systems that miss the less portable one.


for  gcc/testsuite/ChangeLog

	* gcc.target/i386/sse2-mul-1.c: Use rand.  Drop fallback.
	* gcc.target/i386/sse4_1-blendps-2.c: Likewise.
	* gcc.target/i386/sse4_1-blendps.c: Likewise.
	* gcc.target/i386/xop-vshift-1.c: Likewise.
	* gcc.target/powerpc/direct-move.h: Likewise.

From-SVN: r274225
2019-08-09 03:48:53 +00:00
GCC Administrator 4e9d3fdb5c Daily bump.
From-SVN: r274224
2019-08-09 00:16:23 +00:00
Paolo Carlini 327d3fd01c decl.c (grokdeclarator): Use id_loc and EXPR_LOCATION in a few error messages.
/cp
2019-08-08  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (grokdeclarator): Use id_loc and EXPR_LOCATION in
	a few error messages.

/testsuite
2019-08-08  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/enum20.C: Test location(s) too.
	* g++.dg/other/friend3.C: Likewise.
	* g++.dg/parse/dtor5.C: Likewise.
	* g++.dg/parse/friend7.C: Likewise.
	* g++.dg/template/error22.C: Likewise.
	* g++.old-deja/g++.brendan/err-msg5.C: Likewise.

From-SVN: r274220
2019-08-08 22:15:40 +00:00
Mihailo Stojanovic be15aa901d * doc/extend.texi: Add const qualifier to ld intrinsics.
From-SVN: r274219
2019-08-08 15:06:17 -06:00
Segher Boessenkool e35f75d35c rs6000: Rename DFP iterator and attr to DDTD and q
This is more in line with the other iterators we have, and a bit easier
to read and write.


	* config/rs6000/dfp.md (D64_D128): Rename to ...
	(DDTD): ... this, throughout.
	(dfp_suffix): Rename to ...
	(q): ... this, throughout.

From-SVN: r274218
2019-08-08 22:18:56 +02:00
Segher Boessenkool b1bb81608e rs6000: Use iterators in more DFP patterns
I noticed some patterns in dfp.md could use the D64_D128 iterator but
don't yet.  This converts all remaining simple cases.


	* config/rs6000/dfp.md (D64_D128): Move earlier in the file.
	(dfp_suffix): Ditto.
	(adddd3, addtd3): Merge to ...
	(add<mode>3 for D64_D128): ... this.
	(subdd3, subtd3): Merge to ...
	(sub<mode>3 for D64_D128): ... this.
	(muldd3, multd3): Merge to ...
	(mul<mode>3 for D64_D128): ... this.
	(divdd3, divtd3): Merge to ...
	(div<mode>3 for D64_D128): ... this.
	(*cmpdd_internal1, *cmptd_internal1): Merge to ...
	(*cmp<mode>_internal1 for D64_D128): ... this.
	(ftruncdd2, ftrunctd2): Merge to ...
	(ftrunc<mode>2 for D64_D128): ... this.
	(fixdddi2, fixtddi2): Merge to ...
	(fix<mode>di2 for D64_D128): ... this.

From-SVN: r274217
2019-08-08 22:16:53 +02:00
Jim Wilson e98c3ee971 RISC-V: Fix C ABI for flattened struct with 0-length bitfield.
gcc/
	PR target/91229
	* config/riscv/riscv.c (riscv_flatten_aggregate_field): New arg
	ignore_zero_width_bit_field_p.  Skip zero size bitfields when true.
	Pass into recursive call.
	(riscv_flatten_aggregate_argument): New arg.  Pass to
	riscv_flatten_aggregate_field.
	(riscv_pass_aggregate_in_fpr_pair_p): New local warned.  Call
	riscv_flatten_aggregate_argument twice, with false and true as last
	arg.  Process result twice.  Compare results and warn if different.
	(riscv_pass_aggregate_in_fpr_and_gpr_p): Likewise.

	gcc/testsuite/
	* gcc.target/riscv/flattened-struct-abi-1.c: New test.
	* gcc.target/riscv/flattened-struct-abi-2.c: New test.

From-SVN: r274215
2019-08-08 12:04:56 -07:00
Marek Polacek 355229f22a re PR c++/79520 (Spurious caching for constexpr arguments)
PR c++/79520
	* g++.dg/cpp1y/constexpr-79520.C: New test.

From-SVN: r274214
2019-08-08 17:54:58 +00:00
Richard Sandiford 99769e7fb6 [C] Fix bogus nested enum error message
For:

    enum a { A };
    enum a { B };

we emit a bogus error about nested definitions before the real error:

foo.c:2:6: error: nested redefinition of ‘enum a’
    2 | enum a { B };
      |      ^
foo.c:2:6: error: redeclaration of ‘enum a’
foo.c:1:6: note: originally defined here
    1 | enum a { A };
      |      ^

This is because we weren't clearing C_TYPE_BEING_DEFINED once the
definition was over.

I think it's OK to clear C_TYPE_BEING_DEFINED even for a definition
that actually is nested (and so whose outer definition is still open),
since we'll already have given an error by then.  It means that second
and subsequent attempts to define a nested enum will usually get the
redeclaration error instead of the nested error, but that seems just
as accurate (nested_first and nested_second in the test).  The only
exception is if the first nested enum was also invalid by being empty,
but then the enum as a whole has already produced two errors
(nested_empty in the test).

2019-08-08  Richard Sandiford  <richard.sandiford@arm.com>

gcc/c/
	* c-decl.c (finish_enum): Clear C_TYPE_BEING_DEFINED.

gcc/testsuite/
	* gcc.dg/pr79983.c (enum E): Don't allow an error about nested
	definitions.
	* gcc.dg/enum-redef-1.c: New test.

From-SVN: r274213
2019-08-08 17:12:05 +00:00
Marek Polacek 60bb944817 PR c++/87519 - bogus warning with -Wsign-conversion.
* typeck.c (cp_build_binary_op): Use same_type_p instead of comparing
	the types directly.

	* g++.dg/warn/Wsign-conversion-5.C: New test.

From-SVN: r274211
2019-08-08 15:37:46 +00:00
Marek Polacek 7c81497574 constexpr.c (inline_asm_in_constexpr_error): New.
* constexpr.c (inline_asm_in_constexpr_error): New.
	(cxx_eval_constant_expression) <case ASM_EXPR>: Call it.
	(potential_constant_expression_1) <case ASM_EXPR>: Likewise.

	* g++.dg/cpp2a/inline-asm3.C: New test.

From-SVN: r274210
2019-08-08 14:55:52 +00:00
Jonathan Wakely cb0de9b60c P0325R4 to_array from LFTS with updates
As an extension to what the standard requires, this also adds
conditional noexcept-specifiers to the std::to_array functions.

	P0325R4 to_array from LFTS with updates
	* include/experimental/array (to_array): Qualify call to __to_array.
	* include/std/array (__cpp_lib_to_array, to_array): Define for C++20.
	* include/std/version (__cpp_lib_to_array): Likewise.
	* testsuite/23_containers/array/creation/1.cc: New test.
	* testsuite/23_containers/array/creation/2.cc: New test.
	* testsuite/23_containers/array/creation/3_neg.cc: New test.
	* testsuite/23_containers/array/tuple_interface/tuple_element_neg.cc:
	Use zero for dg-error line number.

From-SVN: r274209
2019-08-08 11:18:53 +01:00
Martin Liska 0fddb18470 Fix file descriptor existence of MinGW.
2019-08-08  Martin Liska  <mliska@suse.cz>

	PR bootstrap/91352
	* gcc.c (driver::detect_jobserver): Use is_valid_fd.
	* lto-wrapper.c (jobserver_active_p): Likewise.
2019-08-08  Martin Liska  <mliska@suse.cz>

	PR bootstrap/91352
	* libiberty.h (is_valid_fd): New function.
2019-08-08  Martin Liska  <mliska@suse.cz>

	PR bootstrap/91352
	* lrealpath.c (is_valid_fd): New function.

From-SVN: r274208
2019-08-08 07:50:28 +00:00
Martin Liska fe8e21fd73 When cloning set operator new/delete to false.
2019-08-08  Martin Liska  <mliska@suse.cz>

	* cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
	IS_OPERATOR_NEW and IS_OPERATOR_DELETE.
	(create_version_clone_with_body): Likewise.

From-SVN: r274207
2019-08-08 07:43:11 +00:00
Jakub Jelinek 8860d2706d gimplify.c (omp_add_variable): Use GOVD_PRIVATE | GOVD_EXPLICIT for VLA helper variables on target data even if...
* gimplify.c (omp_add_variable): Use GOVD_PRIVATE | GOVD_EXPLICIT
	for VLA helper variables on target data even if not GOVD_FIRSTPRIVATE.
	(gimplify_scan_omp_clauses): For OMP_CLAUSE_USE_DEVICE_* use just
	GOVD_EXPLICIT flags.
	(gimplify_omp_workshare): For OMP_TARGET_DATA move all
	OMP_CLAUSE_USE_DEVICE_* clauses to the end of clauses chain.
	* omp-low.c (scan_sharing_clauses): For OMP_CLAUSE_USE_DEVICE_*
	call install_var_field with mask 11 instead of 3.
	(lower_omp_target): For OMP_CLAUSE_USE_DEVICE_* use pass
	(splay_tree_key) &DECL_UID (var) to build_sender_ref instead of var.
gcc/c/
	* c-typeck.c (c_finish_omp_clauses): For C_ORT_OMP
	OMP_CLAUSE_USE_DEVICE_* clauses use oacc_reduction_head bitmap
	instead of generic_head to track duplicates.
gcc/cp/
	* semantics.c (finish_omp_clauses): For C_ORT_OMP
	OMP_CLAUSE_USE_DEVICE_* clauses use oacc_reduction_head bitmap
	instead of generic_head to track duplicates.
libgomp/
	* target.c (gomp_map_vars_internal): For GOMP_MAP_USE_DEVICE_PTR
	perform the lookup in the first loop only if !not_found_cnt, otherwise
	perform lookups for it in the second loop guarded with
	if (not_found_cnt || has_firstprivate).
	* testsuite/libgomp.c/target-37.c: New test.
	* testsuite/libgomp.c++/target-22.C: New test.

From-SVN: r274206
2019-08-08 08:39:02 +02:00
GCC Administrator 34f3ec0757 Daily bump.
From-SVN: r274205
2019-08-08 00:16:29 +00:00
Steven G. Kargl aec233aa50 re PR fortran/91359 (logical function X returns .TRUE. - Warning: spaghetti code)
2019-08-07  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91359
	* pr91359_2.f:  Fix missing hyphen in dg-do
	* pr91359_1.f:  Ditto.  Remove RESULT variable to test actual fix!

From-SVN: r274201
2019-08-07 22:33:27 +00:00
Marek Polacek f2f9d24da8 re PR c++/67533 (internal compiler error: in build_call_a, at cp/call.c:372)
PR c++/67533
	* g++.dg/tls/thread_local-ice5.C: New test.

From-SVN: r274200
2019-08-07 21:21:57 +00:00
Richard Sandiford 9b6fb97c99 [AArch64] Fix INSR for zero floats
We used INSR to handle zero integers but not zero floats.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/constraints.md (Z): Handle floating-point zeros too.
	* config/aarch64/predicates.md (aarch64_reg_or_zero): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/sve/init_13.c: New test.

From-SVN: r274193
2019-08-07 19:15:58 +00:00
Richard Sandiford 61ee25b9e7 [AArch64] Prefer FPRs over GPRs for INSR
INSR of GPRs involves a cross-file move while INSR of FPRs doesn't.
We should therefore disparage the GPR version relative to the FPR
version.

The patch also adds MOVPRFX handling, but this is only tested
properly by the ACLE.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): Add
	MOVPRFX alternatives.  Make the GPR alternatives more expensive
	than the FPR ones.

gcc/testsuite/
	* gcc.target/aarch64/sve/init_12.c: Expect w1 to be moved into
	a temporary FPR.

From-SVN: r274192
2019-08-07 19:12:15 +00:00
Richard Sandiford 801790b37c [AArch64] Prefer FPRs over GPRs for CLASTB
This patch makes the SVE CLASTB GPR alternative more expensive than the
FPR alternative in order to avoid unnecessary cross-file moves.  It also
fixes the prefix used to print the FPR; <vw> only handles 32-bit and
64-bit elements.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (fold_extract_last_<mode>):
	Disparage the GPR alternative relative to the FPR one.
	Fix handling of 8-bit and 16-bit FPR values.

gcc/testsuite/
	* gcc.target/aarch64/sve/clastb_8.c: New test.

From-SVN: r274191
2019-08-07 19:08:55 +00:00
Richard Sandiford b0760a40be [AArch64] Merge SVE reduction patterns
The reorg showed that we had an unnecessary separation between
the bitwise and max/min reductions for integers, and the
addition and max/min reductions for fp.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (BITWISEV): Delete.
	(SVE_INT_REDUCTION, SVE_FP_REDUCTION): New int iterators.
	(optab): Handle UNSPEC_UMAXV, UNSPEC_UMINV, UNSPEC_SMAXV,
	UNSPEC_SMINV, UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
	UNSPEC_FMINNMV, UNSPEC_FMINV.
	(bit_reduc_op): Delete.
	(sve_int_op): New int attribute.
	(sve_fp_op): Handle UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
	UNSPEC_FMINNMV, UNSPEC_FMINV.
	* config/aarch64/aarch64-sve.md
	(reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
	(*reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
	(reduc_<BITWISEV:optab>_scal_<SVE_I:mode>)
	(*reduc_<BITWISEV:optab>_scal_<SVE_I:mode>): Merge into...
	(reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>)
	(*reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>): ...these
	new patterns.
	(reduc_plus_scal_<SVE_F:mode>, *reduc_plus_scal_<SVE_I:mode>)
	(reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>)
	(*reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>): Merge into...
	(reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>)
	(*reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>): ...these
	new patterns.

From-SVN: r274190
2019-08-07 19:05:42 +00:00
Richard Sandiford 0d80d083a2 [AArch64] Merge SVE ternary FP operations
This patch combines the four individual fused multiply-add optabs
into one pattern and uses unspecs instead of rtx codes.  This is
part of a series of patches that change the SVE FP patterns so that
they can describe cases in which the predicate isn't all-true.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (fma<mode>4, *fma<mode>4)
	(fnma<mode>4, *fnma<mode>4, fnms<mode>4, *fnms<mode>4)
	(fms<mode>4, *fms<mode>4): Replace with...
	(<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4)
	(*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): ...these new patterns.
	Use unspecs instead of rtx codes.
	(cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_4)
	(*cond_<optab><mode>_any): Add the predicate to SVE_COND_FP_TERNARY.

From-SVN: r274189
2019-08-07 19:01:37 +00:00
Richard Sandiford 214c42faa0 [AArch64] Merge SVE FMAXNM/FMINNM patterns
This patch makes us use the same define_insn for both the smax/smin
and fmax/fmin optabs.  It also continues the process started by
the earlier FP unary patch of moving predicated FP patterns from
rtx codes to unspecs.

There's no need to handle the FMAX and FMIN instructions until
the ACLE patch, since we only use FMAXNM and FMINNM at present.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (SVE_COND_FP_MAXMIN_PUBLIC): New
	int iterator.
	(maxmin_uns_op): Handle UNSPEC_COND_FMAXNM and UNSPEC_COND_FMINNM.
	* config/aarch64/aarch64-sve.md
	(<FMAXMIN:su><FMAXMIN:maxmin><SVE_F:mode>3): Rename to...
	(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): ...this and
	use a single unspec for the rhs.
	(*<su><maxmin><mode>3): Delete.
	(<maxmin_uns><SVE_F:mode>3): Use a single unspec for the rhs.

From-SVN: r274188
2019-08-07 18:56:48 +00:00
Richard Sandiford d45b20a553 [AArch64] Merge SVE FP unary patterns
This patch merges the SVE FP rounding patterns with the other SVE
FP unary patterns.

At the moment, we only generate unary FP operations for full vectors,
so we can use (sqrt:VNx4SF ...) etc. in the rtl pattern.  With the ACLE,
it's also possible to generate predicated operations on partial vectors
without specifying a value for inactive lanes.  (sqrt:VNx4SF ...) would
then have different faulting behaviour from the instruction that the
pattern generates.

This patch therefore uses unspecs to represent the operations instead.
Later patches make this change for other patterns.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (UNSPEC_COND_FABS, UNSPEC_COND_FNEG)
	(UNSPEC_COND_FRINTA, UNSPEC_COND_FRINTI, UNSPEC_COND_FRINTM)
	(UNSPEC_COND_FRINTN, UNSPEC_COND_FRINTP, UNSPEC_COND_FRINTX)
	(UNSPEC_COND_FRINTZ, UNSPEC_COND_FSQRT): New unspecs.
	(optab, sve_fp_op): Handle them.
	(SVE_FP_UNARY): Delete.
	(optab): Remove sqrt entry.
	(sve_fp_op): Remove neg, abs and sqrt entries.
	(SVE_COND_FP_UNARY): New int iterator.
	* config/aarch64/aarch64-sve.md (<frint_pattern><mode>2)
	(*<frint_pattern><mode>2): Delete.
	(<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
	(<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.
	(*<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
	(*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.

From-SVN: r274187
2019-08-07 18:51:40 +00:00
Richard Sandiford 8ad84de26e [AArch64] Remove redundant SVE FADDA pattern
*pred_fold_left_plus_<mode> could no longer match anything, since
UNSPEC_FADDA now takes three operands.  Predicated FADDAs should
now go through mask_fold_left_plus_<mode> instead.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete.

From-SVN: r274186
2019-08-07 18:47:26 +00:00
Richard Sandiford cb18e86dd0 [AArch64] Make SVE UNSPEC_COND_*s match the insn mnemonic
This patch makes the UNSPEC_COND* names match the instruction mnemonics,
rather than having the previous mixture in which some used instructions
while others used operator names.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (UNSPEC_COND_ADD): Rename to...
	(UNSPEC_COND_FADD): ...this.
	(UNSPEC_COND_SUB): Rename to...
	(UNSPEC_COND_FSUB): ...this.
	(UNSPEC_COND_MUL): Rename to...
	(UNSPEC_COND_FMUL): ...this.
	(UNSPEC_COND_DIV): Rename to...
	(UNSPEC_COND_FDIV): ...this.
	(UNSPEC_COND_MAX): Rename to...
	(UNSPEC_COND_FMAXNM): ...this.
	(UNSPEC_COND_MIN): Rename to...
	(UNSPEC_COND_FMINNM): ...this.
	(UNSPEC_COND_LT): Rename to...
	(UNSPEC_COND_FCMLT): ...this.
	(UNSPEC_COND_LE): Rename to...
	(UNSPEC_COND_FCMLE): ...this.
	(UNSPEC_COND_EQ): Rename to...
	(UNSPEC_COND_FCMEQ): ...this.
	(UNSPEC_COND_NE): Rename to...
	(UNSPEC_COND_FCMNE): ...this.
	(UNSPEC_COND_GE): Rename to...
	(UNSPEC_COND_FCMGE): ...this.
	(UNSPEC_COND_GT): Rename to...
	(UNSPEC_COND_FCMGT): ...this.
	(SVE_COND_FP_BINARY, SVE_COND_FP_CMP, optab, cmp_op, sve_fp_op)
	(sve_fp_op_rev): Update accordingly.
	* config/aarch64/aarch64.c (aarch64_unspec_cond_code): Likewise.

From-SVN: r274185
2019-08-07 18:43:01 +00:00
Richard Sandiford 915d28fe74 [AArch64] Reorganise aarch64-sve.md
aarch64-sve.md was getting a bit jumbled, with related operations
separated by unrelated operations.  Also, many SVE instructions need
to have several patterns due to the various ways in which predication
can be used, and it was getting hard to tell which instructions had a
complete set of patterns.

This patch therefore tries to use an explicit grouping scheme.
Banner comments are usually frowned on, but md files have been
a traditional exception (e.g. when using Mike's template for
new targets).

The patch also lists the instructions implemented by each section,
so that it's possible to search the file by instruction mnemonic.

I wouldn't be surprised if I end up having to rip out the contents
section, but I found it useful for the month or so that that I've
been using it locally.  The patch checks that the contents remain
up-to-date by running a checking script during an early stage of
the build.

No functional change intended.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md: Reorganize contents and add
	banner comments.
	* config/aarch64/check-sve-md.awk: New file.
	* config/aarch64/t-aarch64 (s-check-sve-md): New rule.
	(insn-conditions.md): Depend on it.

From-SVN: r274184
2019-08-07 18:37:21 +00:00
Uros Bizjak e3b4d9d702 re PR target/91385 (Zero-extended negation (*negsi2_1_zext) is not generated)
PR target/91385
	* config/i386/sse.md (*negsi2_1_zext): Simplify insn pattern.
	(*negsi2_cmpz_zext): Ditto.

testsuite/ChangeLog:

	PR target/91385
	* gcc.target/i386/pr91385.c: New test.

From-SVN: r274183
2019-08-07 20:34:11 +02:00
Richard Sandiford 871b49afaf [AArch64] Remove unused commutative attribute
The commutative attribute was once used by the SVE conditional binary
expanders, but it's now dead code.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (commutative): Remove.

From-SVN: r274182
2019-08-07 18:32:21 +00:00
Marek Polacek 842901d0ca PR c++/81429 - wrong parsing of constructor with C++11 attribute.
* parser.c (cp_parser_constructor_declarator_p): Handle the scenario
	when a parameter declaration begins with [[attribute]].

	* g++.dg/cpp0x/gen-attrs-68.C: New test.
	* g++.dg/cpp0x/gen-attrs-69.C: New test.

From-SVN: r274181
2019-08-07 17:32:12 +00:00
Richard Earnshaw c822ac7daa PR driver/91130 Use CL_DRIVER when handling of COLLECT_GCC_OPTIONS in lto-wrapper.c
Some options are handled differently by the main driver (gcc, g++,
etc) from the back-end compiler programs (cc1, cc1plus, etc) in that
in the driver they do not take an additional argument, while in the
compiler programs they do.  The processing option option CL_DRIVER
controls this alternative interpretation of the options.

The environment variable COLLECT_GCC_OPTIONS is the list of options to
add to a compile if the compiler re-invokes itself at some point.  As
such, the options are driver options, so CL_DRIVER should be used when
processing this list.  Currently lto-wrapper is doing this
incorrectly.

	PR driver/91130
	* lto-wrapper.c (find_and_merge_options): Use CL_DRIVER when
	processing COLLECT_GCC_OPTIONS.
	(run_gcc): Likewise.

From-SVN: r274176
2019-08-07 16:15:35 +00:00
Marek Polacek 529bc4103b PR c++/91346 - Implement P1668R1, allow unevaluated asm in constexpr.
* constexpr.c (cxx_eval_constant_expression): Handle ASM_EXPR.
	(potential_constant_expression_1) <case ASM_EXPR>: Allow.
	* cp-tree.h (finish_asm_stmt): Adjust.
	* parser.c (cp_parser_asm_definition): Grab the locaion of "asm" and
	use it.  Change an error to a pedwarn.  Allow asm in C++2a, warn
	otherwise.
	* pt.c (tsubst_expr): Pass a location down to finish_asm_stmt.
	* semantics.c (finish_asm_stmt): New location_t parameter.  Use it.

	* g++.dg/cpp2a/inline-asm1.C: New test.
	* g++.dg/cpp2a/inline-asm2.C: New test.
	* g++.dg/cpp1y/constexpr-neg1.C: Adjust dg-error.

From-SVN: r274169
2019-08-07 14:20:40 +00:00
Bernd Edlinger 699ce759c2 re PR tree-optimization/91109 ([arm] gcc.c-torture/execute/20040709-1.c fails since r273135)
2019-08-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR tree-optimization/91109
        * lra-remat.c (update_scratch_ops): Remove assignment of the
        hard register.

From-SVN: r274163
2019-08-07 13:45:06 +00:00
Richard Sandiford 8600364582 Make IPA predicate::size a poly_int64
This patch changes the IPA predicate::size field from a HOST_WIDE_INT
to a poly_int64.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* data-streamer.h (streamer_write_poly_uint64): Declare.
	(streamer_read_poly_uint64): Likewise.
	* data-streamer-in.c (streamer_read_poly_uint64): New function.
	* data-streamer-out.c (streamer_write_poly_uint64): Likewise.
	* ipa-predicate.h (condition::size): Turn into a poly_int64.
	(add_condition): Take a poly_int64 size.
	* ipa-predicate.c (add_condition): Likewise.
	* ipa-prop.h (ipa_load_from_parm_agg): Take a poly_int64 size pointer.
	* ipa-prop.c (ipa_load_from_parm_agg): Likewise.
	(ipcp_modif_dom_walker::before_dom_children): Update accordingly.
	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Handle
	condition::size as a poly_int64.
	(unmodified_parm_1): Take a poly_int64 size pointer.
	(unmodified_parm): Likewise.
	(unmodified_parm_or_parm_agg_item): Likewise.
	(set_cond_stmt_execution_predicate): Update accordingly.
	(set_switch_stmt_execution_predicate): Likewise.
	(will_be_nonconstant_expr_predicate): Likewise.
	(will_be_nonconstant_predicate): Likewise.
	(inline_read_section): Stream condition::size as a poly_int.
	(ipa_fn_summary_write): Likewise.

From-SVN: r274162
2019-08-07 13:18:35 +00:00
Martin Liska 12bbb1f78e Replace int with boolean in predicate functions.
2019-08-07  Martin Liska  <mliska@suse.cz>

	* fold-const.c (twoval_comparison_p): Replace int
	with bool as a return type.
	(simple_operand_p): Likewise.
	(operand_equal_p): Replace int with bool as a return type.
	* fold-const.h (operand_equal_p): Likewise.

From-SVN: r274161
2019-08-07 12:45:57 +00:00
Janne Blomqvist 4047bab96d PR 53796 Make inquire(file=, recl=) conform to F2018
In my original patch to fix PR 53796 I forgot to fix the behavior for
unconnected units when inquiring via filename. This patch fixes that.

Regtested on x86_64-pc-linux-gnu, committed as obvious.

libgfortran/ChangeLog:

2019-08-07  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/53796
	* io/inquire.c (inquire_via_filename): Set recl to -1 for
	unconnected units.

gcc/testsuite/ChangeLog:

2019-08-07  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/53796
	* gfortran.dg/inquire_recl_f2018.f90: Test for unconnected unit
	with inquire via filename.

From-SVN: r274160
2019-08-07 10:34:10 +03:00
Jakub Jelinek 398e3feb8a tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR OpenMP description.
* tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR
	OpenMP description.  Add OMP_CLAUSE_USE_DEVICE_ADDR clause.
	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries
	for OMP_CLAUSE_USE_DEVICE_ADDR clause.
	(walk_tree_1): Handle OMP_CLAUSE_USE_DEVICE_ADDR.
	* tree-pretty-print.c (dump_omp_clause): Likewise.
	* tree-nested.c (convert_nonlocal_omp_clauses,
	convert_local_omp_clauses): Likewise.
	* gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses):
	Likewise.
	* omp-low.c (scan_sharing_clauses, lower_omp_target): Likewise.
	Treat OMP_CLAUSE_USE_DEVICE_ADDR like OMP_CLAUSE_USE_DEVICE_PTR
	clause with array or reference to array types, no matter what type
	except for reference it has.
gcc/c-family/
	* c-pragma.h (enum pragma_omp_clause): Add
	PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.  Set PRAGMA_OACC_CLAUSE_USE_DEVICE
	equal to PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR instead of being a separate
	enumeration value.
gcc/c/
	* c-parser.c (c_parser_omp_clause_name): Parse use_device_addr clause.
	(c_parser_omp_clause_use_device_addr): New function.
	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(OMP_TARGET_DATA_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(c_parser_omp_target_data): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR
	like PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR, adjust diagnostics about no
	map or use_device_* clauses.
	* c-typeck.c (c_finish_omp_clauses): For OMP_CLAUSE_USE_DEVICE_PTR
	in OpenMP, require pointer type rather than pointer or array type.
	Handle OMP_CLAUSE_USE_DEVICE_ADDR.
gcc/cp/
	* parser.c (cp_parser_omp_clause_name): Parse use_device_addr clause.
	(cp_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(OMP_TARGET_DATA_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(cp_parser_omp_target_data): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR
	like PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR, adjust diagnostics about no
	map or use_device_* clauses.
	* semantics.c (finish_omp_clauses): For OMP_CLAUSE_USE_DEVICE_PTR
	in OpenMP, require pointer or reference to pointer type rather than
	pointer or array or reference to pointer or array type. Handle
	OMP_CLAUSE_USE_DEVICE_ADDR.
	* pt.c (tsubst_omp_clauses): Handle OMP_CLAUSE_USE_DEVICE_ADDR.
gcc/testsuite/
	* c-c++-common/gomp/target-data-1.c (foo): Use use_device_addr clause
	instead of use_device_ptr clause where required by OpenMP 5.0, add
	further tests for both use_device_ptr and use_device_addr clauses.
libgomp/
	* testsuite/libgomp.c/target-18.c (struct S): New type.
	(foo): Use use_device_addr clause instead of use_device_ptr clause
	where required by OpenMP 5.0, add further tests for both use_device_ptr
	and use_device_addr clauses.
	* testsuite/libgomp.c++/target-9.C (struct S): New type.
	(foo): Use use_device_addr clause instead of use_device_ptr clause
	where required by OpenMP 5.0, add further tests for both use_device_ptr
	and use_device_addr clauses.  Add t and u arguments.
	(main): Adjust caller.

From-SVN: r274159
2019-08-07 09:27:10 +02:00
Kewen Lin 4e708f5ebd rs6000: support vector int type rotatert
gcc/ChangeLog

2019-08-07  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/vector.md (vrotr<mode>3): New define_expand.

gcc/testsuite/ChangeLog

2019-08-07  Kewen Lin  <linkw@gcc.gnu.org>

    * gcc.target/powerpc/vec_rotate-1.c: New test.
    * gcc.target/powerpc/vec_rotate-2.c: New test.
    * gcc.target/powerpc/vec_rotate-3.c: New test.
    * gcc.target/powerpc/vec_rotate-4.c: New test.

From-SVN: r274158
2019-08-07 07:11:14 +00:00
Alexandre Oliva b69e0fabc2 wrap math.h for M_PI et al in target/i386 tests
Most but not all of the tests that expect M_PI, M_PI_2 and/or M_PI_4
to be defined in math.h explicitly exclude one target system that does
not satisfy this non-standard assumption.

This patch introduces a wrapper header that includes math.h and then
conditionally supplies the missing non-standard macro definitions.
With that, we can drop the dg-skip-if "no M_PI" exclusions.


for  gcc/testsuite/ChangeLog

	* gcc.target/i386/math_m_pi.h: New.
	* gcc.target/i386/sse4_1-round.h: Use it.
	* gcc.target/i386/pr73350.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmpd-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmps-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmsd-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmss-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmss-2.c: Likewise.
	* gcc.target/i386/avx-ceil-sfix-2-vec.c: Likewise.  Drop
	dg-skip-if "no M_PI".
	* gcc.target/i386/avx-cvt-2-vec.c: Likewise.
	* gcc.target/i386/avx-floor-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx-rint-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx-round-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx512f-ceil-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceil-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceilf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceilf-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floor-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floor-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floorf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floorf-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-rint-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-rintf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-round-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-roundf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-trunc-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-truncf-vec-1.c: Likewise.
	* gcc.target/i386/sse2-cvt-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceil-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceil-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceilf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceilf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floor-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floor-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floorf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floorf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rint-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rint-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rintf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rintf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-round-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-round-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundsd-4.c: Likewise.
	* gcc.target/i386/sse4_1-roundss-4.c: Likewise.
	* gcc.target/i386/sse4_1-trunc-vec.c: Likewise.
	* gcc.target/i386/sse4_1-truncf-vec.c: Likewise.

From-SVN: r274157
2019-08-07 06:35:39 +00:00
Kito Cheng 609d9bdeab RISC-V: Handle g extension in multilib-generator
gcc/ChangeLog

	* gcc/config/riscv/multilib-generator: (canonical_order): Add 'g'.
	(arch_canonicalize): Support rv32g and rv64g and fix error
	handling.

From-SVN: r274156
2019-08-07 03:12:34 +00:00
GCC Administrator 8a54b93d0c Daily bump.
From-SVN: r274155
2019-08-07 00:16:44 +00:00
Steven G. Kargl e0af8f52b1 re PR fortran/91359 (logical function X returns .TRUE. - Warning: spaghetti code)
2019-08-06  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91359
	* trans-decl.c (gfc_generate_return): Ensure something is returned
	from a function.

2019-08-06  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91359
	* gfortran.dg/pr91359_1.f: New test.
	* gfortran.dg/pr91359_2.f: Ditto.

From-SVN: r274149
2019-08-06 21:32:09 +00:00
Steven G. Kargl 1a3920654f re PR fortran/42546 (ALLOCATED statement typo in the docs and for scalar variables)
2019-08-01  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/42546
	* check.c(gfc_check_allocated): Add comment pointing to ...
	* intrinsic.c(sort_actual): ... the checking done here.
 
2019-08-01  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/42546
	* gfortran.dg/allocated_1.f90: New test.
	* gfortran.dg/allocated_2.f90: Ditto.

From-SVN: r274147
2019-08-06 19:46:29 +00:00
Jonathan Wakely ffc500dd41 P1651R0 bind_front should not unwrap reference_wrapper
P1651R0 bind_front should not unwrap reference_wrapper
	* include/std/functional (bind_front): Don't unwrap reference_wrapper.
	* include/std/version (__cpp_lib_bind_front): Update value.
	* testsuite/20_util/function_objects/bind_front/1.cc: Fix test for
	feature test macro.
	* testsuite/20_util/function_objects/bind_front/2.cc: New test.

From-SVN: r274146
2019-08-06 16:57:55 +01:00
Jonathan Wakely a38b51bc3a Specialize std::numbers constants for __float128
* include/std/numbers [!__STRICT_ANSI__ && _GLIBCXX_USE_FLOAT128]
	(e_v, log2e_v, log10e_v, pi_v, inv_pi_v, inv_sqrtpi_v, ln2_v, ln10_v)
	(sqrt2_v, sqrt3_v, inv_sqrt3, egamma_v, phi_v): Add explicit
	specializations for __float128.
	* testsuite/26_numerics/numbers/float128.cc: New test.

From-SVN: r274145
2019-08-06 16:57:51 +01:00
Rainer Orth 1934e97d51 Fix gcc.target/i386/avx512vp2intersect-2intersect-1b.c etc. execution tests
gcc/testsuite:
	* gcc.target/i386/avx512vp2intersect-2intersect-1b.c (AVX512F):
	Remove.
	(AVX512VP2INTERSECT): Define.
	* gcc.target/i386/avx512vp2intersect-2intersectvl-1b.c (AVX512F):
	Remove.
	(AVX512VP2INTERSECT): Define.

From-SVN: r274144
2019-08-06 14:53:24 +00:00
Jason Merrill d40e363107 PR c++/91378 - ICE with noexcept and auto return type.
Here, since the call to g is not type-dependent, we call mark_used on it to
determine its return type.  This also wants to instantiate the
noexcept-expression.  But since nothing in maybe_instantiate_noexcept was
calling push_to_top_level, we substituted b.i with processing_template_decl
set, so we left it unresolved for later access checking.  As a result, the
type of C::g<int> remained instantiation-dependent, leading to an ICE in
type_dependent_expression_p on the assert that the type of a function
template with no dependent template arguments must be non-dependent.

	* pt.c (maybe_instantiate_noexcept): push_to_top_level.

From-SVN: r274143
2019-08-06 10:07:59 -04:00