It is a bit confusing, it looks as if the compiler tried to print
something there.
* config/rs6000/rs6000.c (rs6000_register_move_cost): Fix typo.
From-SVN: r270426
The standard says the std::variant copy constructor is defined as
deleted unless all alternative types are copy constructible, but we were
making it also depend on move constructible. Fix the condition and
enhance the tests to check the semantics with pathological copy-only
types (i.e. supporting copying but having deleted moves).
The enhanced tests revealed a regression in copy assignment for
non-trivial alternative types, where the assignment would not be
performed because the condition in the _Copy_assign_base visitor is
false: is_same_v<remove_reference_t<T&>, remove_reference_t<const T&>>.
* include/std/variant (__detail::__variant::_Traits::_S_copy_assign):
Do not depend on whether all alternative types are move constructible.
(__detail::__variant::_Copy_assign_base::operator=): Remove cv-quals
from the operand when deciding whether to perform the assignment.
* testsuite/20_util/variant/compile.cc (DeletedMoves): Define type
with deleted move constructor and deleted move assignment operator.
(default_ctor, copy_ctor, move_ctor, copy_assign, move_assign): Check
behaviour of variants with DeletedMoves as an alternative.
* testsuite/20_util/variant/run.cc (DeletedMoves): Define same type.
(move_ctor, move_assign): Check that moving a variant with a
DeletedMoves alternative falls back to copying instead of moving.
From-SVN: r270425
The string literal is optional in C++17 and all these are empty so add
no value.
* testsuite/20_util/variant/compile.cc: Remove empty string literals
from static_assert declarations.
From-SVN: r270424
* testsuite/20_util/variant/compile.cc (MoveCtorOnly): Fix type to
actually match its name.
(MoveCtorAndSwapOnly): Define new type that adds swap to MoveCtorOnly.
(test_swap()): Fix result for MoveCtorOnly and check
MoveCtorAndSwapOnly.
From-SVN: r270423
PR target/90125
* config/i386/avx512fintrin.h (_mm_maskz_fmadd_round_sd,
_mm_maskz_fmadd_round_ss, _mm_maskz_fmsub_round_sd,
_mm_maskz_fmsub_round_ss, _mm_maskz_fnmadd_round_sd,
_mm_maskz_fnmadd_round_ss, _mm_maskz_fnmsub_round_sd,
_mm_maskz_fnmsub_round_ss): Use _maskz builtin instead of _mask3.
PR target/90125
* gcc.target/i386/avx512f-vfmsubXXXss-2.c (avx512f_test): Adjust
constants to ensure precise result even when not using fma.
* gcc.target/i386/avx512f-vfnmaddXXXss-2.c (avx512f_test): Likewise.
* gcc.target/i386/avx512f-vfmaddXXXsd-3.c: New test.
* gcc.target/i386/avx512f-vfmaddXXXss-3.c: New test.
* gcc.target/i386/avx512f-vfmsubXXXsd-3.c: New test.
* gcc.target/i386/avx512f-vfmsubXXXss-3.c: New test.
* gcc.target/i386/avx512f-vfnmaddXXXsd-3.c: New test.
* gcc.target/i386/avx512f-vfnmaddXXXss-3.c: New test.
* gcc.target/i386/avx512f-vfnmsubXXXsd-3.c: New test.
* gcc.target/i386/avx512f-vfnmsubXXXss-3.c: New test.
From-SVN: r270421
gcc/
* ira-conflicts.c (print_allocno_conflicts): Always print something,
even for allocno's with no conflicts.
(print_conflicts): Print an extra newline.
From-SVN: r270420
When auto-inc-dec creates a new mem to compute the cost of doing some
transform, it forgets to copy over the alignment of the original mem.
This gives wrong costs, for example, for rs6000 a floating point load
or store is hugely expensive if unaligned. This patch fixes it.
* auto-inc-dec.c (attempt_change): Set the alignment of the
temporary memory to that of the original.
From-SVN: r270419
* dg-extract-results.sh: Only handle WARNING: program timed out
lines specially in "$MODE" == "sum". Restore previous behavior
for "$MODE" != "sum". Clear has_timeout and timeout_cnt if in
a different variant or curfile is empty.
* dg-extract-results.py: Fix a typo.
From-SVN: r270415
In C++1z drafts up to N4606 the constexpr keyword was missing from the
detailed description of this function, despite being shown in the class
synopsis. That was fixed editorially for N4618, but our implementation
was not corrected to match.
* include/std/optional (optional::value_or(U&&) &&): Add missing
constexpr specifier.
* testsuite/20_util/optional/constexpr/observers/4.cc: Check value_or
for disengaged optionals and rvalue optionals.
* testsuite/20_util/optional/observers/4.cc: Likewise.
From-SVN: r270409
Many of these patterns only worked in 32-bit mode, and some only worked
in 64-bit mode. This patch makes these use Pmode, fixing the PR. On
the other hand, the stack updates have to use the same mode for the
stack pointer as for the value stored, so let's simplify that a bit.
Many of these patterns pass the wrong mode to
avoiding_indexed_address_p (it should be the mode of the datum
accessed, not the mode of the pointer).
Finally, I merge some patterns into one (using iterators).
PR target/17108
* config/rs6000/rs6000.c (rs6000_split_multireg_move): Adjust pattern
name.
(rs6000_emit_allocate_stack_1): Simplify condition. Adjust pattern
name.
* config/rs6000/rs6000.md (bits): Add entries for SF and DF.
(*movdi_update1): Use Pmode.
(movdi_<mode>_update): Fix argument to avoiding_indexed_address_p.
(movdi_<mode>_update_stack): Rename to ...
(movdi_update_stack): ... this. Fix comment. Change condition. Don't
use Pmode.
(*movsi_update1): Use Pmode.
(*movsi_update2): Use Pmode.
(movsi_update): Rename to ...
(movsi_<mode>_update): ... this. Use Pmode.
(movsi_update_stack): Fix condition.
(*movhi_update1): Use Pmode. Fix argument to
avoiding_indexed_address_p.
(*movhi_update2): Ditto.
(*movhi_update3): Ditto.
(*movhi_update4): Ditto.
(*movqi_update1): Ditto.
(*movqi_update2): Ditto.
(*movqi_update3): Ditto.
(*movsf_update1, *movdf_update1): Merge, rename to...
(*mov<mode>_update1): This. Use Pmode. Fix argument to
avoiding_indexed_address_p. Add "size" attribute.
(*movsf_update2, *movdf_update2): Merge, rename to...
(*mov<mode>_update2): This. Ditto.
(*movsf_update3): Use Pmode. Fix argument to
avoiding_indexed_address_p.
(*movsf_update4): Ditto.
(allocate_stack): Simplify condition. Adjust pattern names.
From-SVN: r270407
Updated build and invocation of idgen and impcnvgen, ensuring that they
are removed when cleaning the build directory.
Added BUILD_LIBDEPS on the link command for the generator programs as
well, which is necessary when the system installed compiler is not GCC.
gcc/d/ChangeLog:
2019-04-16 Iain Buclaw <ibuclaw@gdcproject.org>
* Make-lang.in (d.mostyclean): Clean idgen and impcnvgen.
(d/idgen): Rename to d/idgen$(build_exeext), add BUILD_LIBDEPS.
(d/impcnvgen): Rename to d/impcnvgen$(build_exeext), add
BUILD_LIBDEPS.
(d/id.c): Call idgen$(build_exeext).
(d/impcnvtab.c): Call impcnvgen$(build_exeext).
From-SVN: r270397
When we remove an RTL call, we wouldn't clean up references to the
return value of the call in debug insns. Make it so that we do.
for gcc/ChangeLog
PR debug/89528
* valtrack.c (dead_debug_insert_temp): Reset debug references
to the return value of a call being removed.
for gcc/testsuite/ChangeLog
PR debug/89528
* gcc.dg/guality/pr89528.c: New.
From-SVN: r270389
The test fell back to long long and long when __int128 is not
available, but it assumed sizeof(long) < sizeof(long long) because of
a shift count that would be out of range for a long long if their
widths are the same. Fixed by splitting it up into two shifts.
for gcc/testsuite/ChangeLog
PR rtl-optimization/86438
* gcc.dg/torture/pr86438.c: Split up too-wide shift.
From-SVN: r270388
New LRA algorithms require the all the register constraints to be
defined using define_register_constraint keyword. However, Rs5
constraint was not LRA proof. Remove it and replace it by equivalent
Rcd constraint.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (sibcall_insn): Use Rcd constraint.
(sibcall_value_insn): Likewise.
* config/arc/constraints.md (Rs5): Remove.
From-SVN: r270386
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_hard_regno_modes): Add two missing modes
for last two fake registers.
(arc_conditional_register_usage): Make sure fake frame and arg
pointer regs are in general regs class.
(FRAME_POINTER_MASK): Remove.
(RETURN_ADDR_MASK): Remove.
(arc_must_save_register): Use hard frame regnum.
(frame_restore_reg): Use hard_frame_pointer_rtx.
(arc_save_callee_saves): Likewise.
(arc_restore_callee_saves): Likewise.
(arc_save_callee_enter): Likewise.
(arc_restore_callee_leave): Likewise.
(arc_save_callee_milli): Likewise.
(arc_eh_return_address_location): Likewise.
(arc_check_multi): Use hard frame regnum.
(arc_can_eliminate): Likewise.
* config/arc/arc.h (FIXED_REGISTERS): Make FP register available
for register allocator.
(REG_CLASS_CONTENTS): Update GENERAL_REGS.
(REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM.
(FRAME_POINTER_REGNUM): Change it to a fake register.
(HARD_FRAME_POINTER_REGNUM): Defined.
(ARG_POINTER_REGNUM): Change it to a new fake register.
(ELIMINABLE_REGS): Update.
(REGISTER_NAMES): Update names.
* config/arc/arc.md (LP_START): Remove.
(LP_END): Likewise.
(shift_si3_loop): Update pattern.
From-SVN: r270385
1.The delay slot scheduler can reschedule some of the frame related
instructions resulting in having incorect CFI information. This patch
introduces a schedule blockage to avoid this problem.
2.There are cases when an interrupt may happen and not all the current
function stack operations are done, which may result in stack
corruption. Such an example is accessing an returning a local
structure members, which members are allocated on stack. The stack
adjustment and the accessing of the struct member can be reorder as
they may not use both the SP register for the access.
3.Also, do not save/restore SP when in interrupt. The SP is switch by
the core IRQ machinery.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_expand_prologue): Emit blockage regardless
to avoid delay slot scheduling.
(arc_must_save_register): Don't save SP.
* config/arc/arc.md (stack_tie): Remove.
(UNSPEC_ARC_STKTIE): Likewise.
From-SVN: r270384
PR target/90096
* config/i386/i386.c (ix86_target_string): Add ADD_ABI_P argument, only
print -m64/-mx32/-m32 if it is true.
(ix86_debug_options, ix86_function_specific_print): Pass true as
ADD_ABI_P to ix86_target_string.
(ix86_expand_builtin): Adjust ix86_target_string caller, pass true as
ADD_ABI_P only if OPTION_MASK_ISA_64BIT is set in bisa and in that case
or into it OPTION_MASK_ISA_ABI_64 or OPTION_MASK_ISA_ABI_X32.
* gcc.target/i386/pr90096.c: New test.
* gcc.target/i386/pr69255-1.c: Adjust expected diagnostics.
* gcc.target/i386/pr69255-2.c: Likewise.
* gcc.target/i386/pr69255-3.c: Likewise.
From-SVN: r270381
PR rtl-optimization/90082
* dce.c (can_delete_call): New function.
(deletable_insn_p, mark_insn): Use it.
* gcc.dg/pr90082.c: New test.
From-SVN: r270380
2019-04-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/56049
* tree-ssa-loop-im.c (mem_ref_hasher::equal): Elide alias-set
equality check if alias-set zero will prevail.
* gfortran.dg/pr56049.f90: New testcase.
From-SVN: r270378
2019-04-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/90071
* tree-ssa-reassoc.c (init_range_entry): Do not pick up
abnormal operands from def stmts.
* gcc.dg/torture/pr90071.c: New testcase.
From-SVN: r270369
The code that checks if an auto-increment from i0 or i1 is not lost is
a bit shaky. The code to check the same for i2 is non-existent, and
cannot be implemented in a similar way at all. So, this patch counts
all auto-increments, and makes sure we end up with the same number as
we started with. This works because we still have a check that we
will not duplicate any.
We should do this some better way, but not while we are in stage 4.
PR rtl-optimization/89794
* combine.c (count_auto_inc): New function.
(try_combine): Count how many auto_inc expressions there were in the
original instructions. Ensure we have the same number in the new
instructions. Remove the code that tried to ensure auto_inc side
effects on i1 and i0 are not lost.
gcc/testsuite/
PR rtl-optimization/89794
* gcc.dg/torture/pr89794.c: New testcase.
From-SVN: r270368
2019-04-15 Richard Biener <rguenther@suse.de>
PR ipa/88936
* tree.h (auto_var_p): Declare.
* tree.c (auto_var_p): New function, split out from ...
(auto_var_in_fn_p): ... here.
* tree-ssa-structalias.c (struct variable_info): Add shadow_var_uid
member.
(new_var_info): Initialize it.
(set_uids_in_ptset): Also set the shadow variable uid if required.
(ipa_pta_execute): Postprocess points-to solutions assigning
shadow variable uids for locals that may reach their containing
function recursively.
* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Do not
assert but instead check whether the points-to solution is
a singleton.
* gcc.dg/torture/pr88936-1.c: New testcase.
* gcc.dg/torture/pr88936-2.c: Likewise.
* gcc.dg/torture/pr88936-3.c: Likewise.
From-SVN: r270366
2019-04-15 Martin Jambor <mjambor@suse.cz>
PR ipa/pr89693
* cgraph.c (clone_of_p): Loop over clone chain for each step in
the thunk chain.
testsuite/
* g++.dg/ipa/pr89693.C: New test.
From-SVN: r270364
