Jason Merrill
fd2bfee51e
PR c++/71972 - constexpr array self-modification
...
* constexpr.c (cxx_eval_array_reference): Handle looking for the
value of an element we're currently modifying.
From-SVN: r238729
2016-07-25 14:32:06 -04:00
Jason Merrill
8d6833755c
* g++.dg/init/elide5.C: Don't use unsigned long for size_t.
...
From-SVN: r238728
2016-07-25 14:32:00 -04:00
John David Anglin
007b405bbf
re PR middle-end/71732 (FAIL: gcc.dg/torture/pr71532.c at -O2 and above)
...
PR middle-end/71732
* cselib.c (cselib_process_insn): Invalidate argument slots for
const/pure calls.
From-SVN: r238727
2016-07-25 17:32:44 +00:00
Alexander Monakov
7d575fffd2
testsuite: add two missing label_values annotations
...
2016-07-25 Alexander Monakov <amonakov@ispras.ru>
* gcc.c-torture/execute/pr71494.c: Require label_values.
* gcc.dg/pr16973.c: Ditto.
From-SVN: r238726
2016-07-25 19:16:27 +03:00
Jiong Wang
bb6131dbd1
[AArch64][10/10] ARMv8.2-A FP16 lane scalar intrinsics
...
gcc/
* config/aarch64/arm_neon.h (vfmah_lane_f16, vfmah_laneq_f16,
vfmsh_lane_f16, vfmsh_laneq_f16, vmulh_lane_f16, vmulh_laneq_f16,
vmulxh_lane_f16, vmulxh_laneq_f16): New.
From-SVN: r238725
2016-07-25 16:15:34 +00:00
Jiong Wang
9a594ad6ef
[AArch64][9/10] ARMv8.2-A FP16 three operands scalar intrinsics
...
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (fma, fnma): Support HF.
* config/aarch64/arm_fp16.h (vfmah_f16, vfmsh_f16): New.
From-SVN: r238724
2016-07-25 16:13:22 +00:00
Jiong Wang
68ad28c34a
[AArch64][8/10] ARMv8.2-A FP16 two operands scalar intrinsics
...
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (<FCVT_F2FIXED:fcvt_fixed_insn>hf<mode>3):
New.
(<FCVT_FIXED2F:fcvt_fixed_insn><mode>hf3): Likewise.
(add<mode>3): Likewise.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
(<fmaxmin><mode>3): Extend to HF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts<mode>): Likewise.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_HSDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_HSDI:mode>3): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn>hfhi3): New.
(<FCVT_FIXED2F:fcvt_fixed_insn>hihf3): Likewise.
* config/aarch64/iterators.md (VHSDF_SDF): Delete.
(VSDQ_HSDI): Support HI.
(fcvt_target, FCVT_TARGET): Likewise.
* config/aarch64/arm_fp16.h (vaddh_f16, vsubh_f16, vabdh_f16,
vcageh_f16, vcagth_f16, vcaleh_f16, vcalth_f16, vceqh_f16, vcgeh_f16,
vcgth_f16, vcleh_f16, vclth_f16, vcvth_n_f16_s16, vcvth_n_f16_s32,
vcvth_n_f16_s64, vcvth_n_f16_u16, vcvth_n_f16_u32, vcvth_n_f16_u64,
vcvth_n_s16_f16, vcvth_n_s32_f16, vcvth_n_s64_f16, vcvth_n_u16_f16,
vcvth_n_u32_f16, vcvth_n_u64_f16, vdivh_f16, vmaxh_f16, vmaxnmh_f16,
vminh_f16, vminnmh_f16, vmulh_f16, vmulxh_f16, vrecpsh_f16,
vrsqrtsh_f16): New.
From-SVN: r238723
2016-07-25 16:10:52 +00:00
Jiong Wang
d7f33f07d8
[AArch64][7/10] ARMv8.2-A FP16 one operand scalar intrinsics
...
gcc/
* config.gcc (aarch64*-*-*): Install arm_fp16.h.
* config/aarch64/aarch64-builtins.c (hi_UP): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_frsqrte<mode>): Extend to HF
mode.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.md (<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Likewise.
(fix_trunc<GPF:mode><GPI:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(abs<mode>2): Likewise.
(<optab><mode>hf2): New pattern for HF mode.
(<optab>hihf2): Likewise.
* config/aarch64/arm_neon.h: Include arm_fp16.h.
* config/aarch64/iterators.md (GPF_F16, GPI_F16, VHSDF_HSDF): New.
(w1, w2, v, s, q, Vmtype, V_cmp_result, fcvt_iesize, FCVT_IESIZE):
Support HF mode.
* config/aarch64/arm_fp16.h: New file.
(vabsh_f16, vceqzh_f16, vcgezh_f16, vcgtzh_f16, vclezh_f16, vcltzh_f16,
vcvth_f16_s16, vcvth_f16_s32, vcvth_f16_s64, vcvth_f16_u16,
vcvth_f16_u32, vcvth_f16_u64, vcvth_s16_f16, vcvth_s32_f16,
vcvth_s64_f16, vcvth_u16_f16, vcvth_u32_f16, vcvth_u64_f16,
vcvtah_s16_f16, vcvtah_s32_f16, vcvtah_s64_f16, vcvtah_u16_f16,
vcvtah_u32_f16, vcvtah_u64_f16, vcvtmh_s16_f16, vcvtmh_s32_f16,
vcvtmh_s64_f16, vcvtmh_u16_f16, vcvtmh_u32_f16, vcvtmh_u64_f16,
vcvtnh_s16_f16, vcvtnh_s32_f16, vcvtnh_s64_f16, vcvtnh_u16_f16,
vcvtnh_u32_f16, vcvtnh_u64_f16, vcvtph_s16_f16, vcvtph_s32_f16,
vcvtph_s64_f16, vcvtph_u16_f16, vcvtph_u32_f16, vcvtph_u64_f16,
vnegh_f16, vrecpeh_f16, vrecpxh_f16, vrndh_f16, vrndah_f16, vrndih_f16,
vrndmh_f16, vrndnh_f16, vrndph_f16, vrndxh_f16, vrsqrteh_f16,
vsqrth_f16): New.
From-SVN: r238722
2016-07-25 16:00:28 +00:00
Jiong Wang
703bbcdfe9
[AArch64][6/14] ARMv8.2-A FP16 reduction vector intrinsics
...
gcc/
* config/aarch64/aarch64-simd-builtins.def (reduc_smax_scal_,
reduc_smin_scal_): Use VDQIF_F16.
(reduc_smax_nan_scal_, reduc_smin_nan_scal_): Use VHSDF.
* config/aarch64/aarch64-simd.md (reduc_<maxmin_uns>_scal_<mode>):
Use VHSDF.
(aarch64_reduc_<maxmin_uns>_internal<mode>): Likewise.
* config/aarch64/iterators.md (VDQIF_F16): New.
(vp): Support HF modes.
* config/aarch64/arm_neon.h (vmaxv_f16, vmaxvq_f16, vminv_f16,
vminvq_f16, vmaxnmv_f16, vmaxnmvq_f16, vminnmv_f16, vminnmvq_f16): New.
From-SVN: r238721
2016-07-25 15:00:14 +00:00
Jiong Wang
ab2e8f01f1
[AArch64][5/10] ARMv8.2-A FP16 lane vector intrinsics
...
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_mulx_elt_to_64v2df): Rename to
"*aarch64_mulx_elt_from_dup<mode>".
(*aarch64_mul3_elt<mode>): Update schedule type.
(*aarch64_mul3_elt_from_dup<mode>): Likewise.
(*aarch64_fma4_elt_from_dup<mode>): Likewise.
(*aarch64_fnma4_elt_from_dup<mode>): Likewise.
* config/aarch64/iterators.md (VMUL): Supprt half precision float modes.
(f, fp): Support HF modes.
* config/aarch64/arm_neon.h (vfma_lane_f16, vfmaq_lane_f16,
vfma_laneq_f16, vfmaq_laneq_f16, vfma_n_f16, vfmaq_n_f16, vfms_lane_f16,
vfmsq_lane_f16, vfms_laneq_f16, vfmsq_laneq_f16, vfms_n_f16,
vfmsq_n_f16, vmul_lane_f16, vmulq_lane_f16, vmul_laneq_f16,
vmulq_laneq_f16, vmul_n_f16, vmulq_n_f16, vmulx_lane_f16,
vmulxq_lane_f16, vmulx_laneq_f16, vmulxq_laneq_f16): New.
From-SVN: r238719
2016-07-25 14:49:57 +00:00
Jiong Wang
89ed6d5f5e
[AArch64][4/10] ARMv8.2-A FP16 three operands vector intrinsics
...
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (fma<mode>4, fnma<mode>4): Extend to HF
modes.
* config/aarch64/arm_neon.h (vfma_f16, vfmaq_f16, vfms_f16,
vfmsq_f16): New.
From-SVN: r238718
2016-07-25 14:44:24 +00:00
Jiong Wang
33d72b6386
[AArch64][3/10] ARMv8.2-A FP16 two operands vector intrinsics
...
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md
(aarch64_rsqrts<mode>): Extend to HF modes.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_SDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_SDI:mode>3): Likewise.
(aarch64_<maxmin_uns>p<mode>): Likewise.
(<su><maxmin><mode>3): Likewise.
(<maxmin_uns><mode>3): Likewise.
(<fmaxmin><mode>3): Likewise.
(aarch64_faddp<mode>): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(*aarch64_fac<optab><mode>): Rename to aarch64_fac<optab><mode>.
(add<mode>3): Extend to HF modes.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_div): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VDQ_HSDI, VSDQ_HSDI): New mode iterator.
* config/aarch64/arm_neon.h (vadd_f16): New.
(vaddq_f16, vabd_f16, vabdq_f16, vcage_f16, vcageq_f16, vcagt_f16,
vcagtq_f16, vcale_f16, vcaleq_f16, vcalt_f16, vcaltq_f16, vceq_f16,
vceqq_f16, vcge_f16, vcgeq_f16, vcgt_f16, vcgtq_f16, vcle_f16,
vcleq_f16, vclt_f16, vcltq_f16, vcvt_n_f16_s16, vcvtq_n_f16_s16,
vcvt_n_f16_u16, vcvtq_n_f16_u16, vcvt_n_s16_f16, vcvtq_n_s16_f16,
vcvt_n_u16_f16, vcvtq_n_u16_f16, vdiv_f16, vdivq_f16, vdup_lane_f16,
vdup_laneq_f16, vdupq_lane_f16, vdupq_laneq_f16, vdups_lane_f16,
vdups_laneq_f16, vmax_f16, vmaxq_f16, vmaxnm_f16, vmaxnmq_f16, vmin_f16,
vminq_f16, vminnm_f16, vminnmq_f16, vmul_f16, vmulq_f16, vmulx_f16,
vmulxq_f16, vpadd_f16, vpaddq_f16, vpmax_f16, vpmaxq_f16, vpmaxnm_f16,
vpmaxnmq_f16, vpmin_f16, vpminq_f16, vpminnm_f16, vpminnmq_f16,
vrecps_f16, vrecpsq_f16, vrsqrts_f16, vrsqrtsq_f16, vsub_f16,
vsubq_f16): Likewise.
From-SVN: r238717
2016-07-25 14:30:52 +00:00
Jiong Wang
daef0a8c7e
[AArch64][2/10] ARMv8.2-A FP16 one operand vector intrinsics
...
gcc/
* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_rsqrte<mode>): Extend to HF modes.
(neg<mode>2): Likewise.
(abs<mode>2): Likewise.
(<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): Likewise.
(<optab><VDQF:mode><fcvt_target>2): Likewise.
(<fix_trunc_optab><VDQF:mode><fcvt_target>2): Likewise.
(ftrunc<VDQF:mode>2): Likewise.
(<optab><fcvt_target><VDQF:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(aarch64_frecpe<mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Return
false for V4HF and V8HF.
* config/aarch64/iterators.md (VHSDF, VHSDF_DF, VHSDF_SDF): New.
(VDQF_COND, fcvt_target, FCVT_TARGET, hcon): Extend mode attribute to HF modes.
(stype): New.
* config/aarch64/arm_neon.h (vdup_n_f16): New.
(vdupq_n_f16): Likewise.
(vld1_dup_f16): Use vdup_n_f16.
(vld1q_dup_f16): Use vdupq_n_f16.
(vabs_f16): New.
(vabsq_f16, vceqz_f16, vceqzq_f16, vcgez_f16, vcgezq_f16, vcgtz_f16,
vcgtzq_f16, vclez_f16, vclezq_f16, vcltz_f16, vcltzq_f16, vcvt_f16_s16,
vcvtq_f16_s16, vcvt_f16_u16, vcvtq_f16_u16, vcvt_s16_f16, vcvtq_s16_f16,
vcvt_u16_f16, vcvtq_u16_f16, vcvta_s16_f16, vcvtaq_s16_f16,
vcvta_u16_f16, vcvtaq_u16_f16, vcvtm_s16_f16, vcvtmq_s16_f16,
vcvtm_u16_f16, vcvtmq_u16_f16, vcvtn_s16_f16, vcvtnq_s16_f16,
vcvtn_u16_f16, vcvtnq_u16_f16, vcvtp_s16_f16, vcvtpq_s16_f16,
vcvtp_u16_f16, vcvtpq_u16_f16, vneg_f16, vnegq_f16, vrecpe_f16,
vrecpeq_f16, vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16, vrndi_f16,
vrndiq_f16, vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16, vrndp_f16,
vrndpq_f16, vrndx_f16, vrndxq_f16, vrsqrte_f16, vrsqrteq_f16, vsqrt_f16,
vsqrtq_f16): Likewise.
From-SVN: r238716
2016-07-25 14:20:37 +00:00
Jiong Wang
358decd5bb
[AArch64][1/10] ARMv8.2-A FP16 data processing intrinsics
...
gcc/
* config/aarch64/aarch64-simd.md
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Use VALL_F16.
(aarch64_ext<mode>): Likewise.
(aarch64_rev<REVERSE:rev_op><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_evpc_trn): Support V4HFmode and
V8HFmode.
(aarch64_evpc_uzp): Likewise.
(aarch64_evpc_zip): Likewise.
(aarch64_evpc_ext): Likewise.
(aarch64_evpc_rev): Likewise.
* config/aarch64/arm_neon.h (__aarch64_vdup_lane_f16): New.
(__aarch64_vdup_laneq_f16): New..
(__aarch64_vdupq_lane_f16): New.
(__aarch64_vdupq_laneq_f16): New.
(vbsl_f16): New.
(vbslq_f16): New.
(vdup_n_f16): New.
(vdupq_n_f16): New.
(vdup_lane_f16): New.
(vdup_laneq_f16): New.
(vdupq_lane_f16): New.
(vdupq_laneq_f16): New.
(vduph_lane_f16): New.
(vduph_laneq_f16): New.
(vext_f16): New.
(vextq_f16): New.
(vmov_n_f16): New.
(vmovq_n_f16): New.
(vrev64_f16): New.
(vrev64q_f16): New.
(vtrn1_f16): New.
(vtrn1q_f16): New.
(vtrn2_f16): New.
(vtrn2q_f16): New.
(vtrn_f16): New.
(vtrnq_f16): New.
(__INTERLEAVE_LIST): Support float16x4_t, float16x8_t.
(vuzp1_f16): New.
(vuzp1q_f16): New.
(vuzp2_f16): New.
(vuzp2q_f16): New.
(vzip1_f16): New.
(vzip2q_f16): New.
(vmov_n_f16): Reimplement using vdup_n_f16.
(vmovq_n_f16): Reimplement using vdupq_n_f16..
From-SVN: r238715
2016-07-25 14:02:42 +00:00
Jiong Wang
37d6a4b779
[AArch64][3/3] Migrate aarch64_expand_prologue/epilogue to aarch64_add_constant
...
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter
"frame_related_p". Generate CFA annotation when it's necessary.
(aarch64_expand_prologue): Use aarch64_add_constant.
(aarch64_expand_epilogue): Likewise.
(aarch64_output_mi_thunk): Pass "false" when calling
aarch64_add_constant.
From-SVN: r238714
2016-07-25 13:42:43 +00:00
Jiong Wang
c4ddc43acc
[AArch64][2/3] Optimize aarch64_add_constant to generate better addition sequences
...
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): Optimize instruction
sequences.
From-SVN: r238713
2016-07-25 13:36:33 +00:00
Jiong Wang
f43657b49f
[AArch64][1/3] Migrate aarch64_add_constant to new interface & kill aarch64_build_constant
...
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter "mode".
Use aarch64_internal_mov_immediate instead of aarch64_build_constant.
(aarch64_output_mi_thunk): Pass Pmode when calling aarch64_add_constant.
(aarch64_build_constant): Delete.
From-SVN: r238712
2016-07-25 13:31:44 +00:00
Georeth Chow
a837417c79
Fix missing qualification in <ext/rope>
...
2016-07-25 Georeth Chow <georeth2010@gmail.com>
* include/ext/ropeimpl.h (rope<>::_S_dump(_RopeRep*, int)): Qualify
_S_concat enumerator.
* testsuite/ext/rope/6.cc: New test.
From-SVN: r238711
2016-07-25 13:56:12 +01:00
Alexander Monakov
3d339d5ed0
revert: nvptx: do not implicitly enable -ftoplevel-reorder
...
Revert
2016-07-20 Alexander Monakov <amonakov@ispras.ru>
* config/nvptx/nvptx.c (nvptx_option_override): Do not set
flag_toplevel_reorder.
From-SVN: r238710
2016-07-25 15:37:29 +03:00
Richard Biener
ea6e17d5c0
cgraph.c (cgraph_node::verify_node): Compare against builtin by using DECL_BUILT_IN_CLASS and DECL_FUNCTION_CODE.
...
2016-07-25 Richard Biener <rguenther@suse.de>
* cgraph.c (cgraph_node::verify_node): Compare against builtin
by using DECL_BUILT_IN_CLASS and DECL_FUNCTION_CODE.
* tree-chkp.c (chkp_gimple_call_builtin_p): Likewise.
* tree-streamer.h (streamer_handle_as_builtin_p): Remove.
(streamer_get_builtin_tree): Likewise.
(streamer_write_builtin): Likewise.
* lto-streamer.h (LTO_builtin_decl): Remove.
* lto-streamer-in.c (lto_read_tree_1): Remove assert.
(lto_input_scc): Remove LTO_builtin_decl handling.
(lto_input_tree_1): Liekwise.
* lto-streamer-out.c (lto_output_tree_1): Remove special
handling of builtins.
(DFS::DFS): Likewise.
* tree-streamer-in.c (streamer_get_builtin_tree): Remove.
* tree-streamer-out.c (pack_ts_function_decl_value_fields): Remove
assert.
(streamer_write_builtin): Remove.
lto/
* lto.c (compare_tree_sccs_1): Remove streamer_handle_as_builtin_p uses.
(unify_scc): Likewise.
(lto_read_decls): Likewise.
From-SVN: r238709
2016-07-25 12:35:08 +00:00
Senthil Kumar Selvaraj
bf01e070a6
Fix tests for targets with sizeof(int) != 32.
...
gcc/testsuite/
* gcc.dg/torture/pr69352.c (foo): Cast to intptr_t instead of long.
* gcc.dg/torture/pr69771.c: Require int32plus.
* gcc.dg/torture/pr71866.c (inb): Add cast to intptr_t.
From-SVN: r238708
2016-07-25 11:55:45 +00:00
Martin Liska
10c9ea62d6
Don't call get_working_sets w/ LTO and -fauto-profile (PR
...
* lto-cgraph.c (input_symtab): Don't call get_working_sets
if flag_auto_profile is set to true.
From-SVN: r238707
2016-07-25 11:28:52 +00:00
Martin Liska
c1e1a688fb
Handle loops with loop->latch == NULL (PR gcov-profile/71868)
...
PR gcov-profile/71868
* cfgloopanal.c (expected_loop_iterations_unbounded): When we
have a function with multiple latches, count them all.
From-SVN: r238706
2016-07-25 10:56:08 +00:00
Martin Liska
ccae0c8546
Fix memory leak introduced in r238336
...
* tree-ssa-loop-niter.c (loop_only_exit_p): Release body array.
From-SVN: r238705
2016-07-25 10:52:30 +00:00
Martin Liska
16b0596564
Call get_ops just for SSA_NAMEs (PR tree-optimization/71987)
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PR tree-optimization/71987
* tree-ssa-reassoc.c (maybe_optimize_range_tests): Call get_ops
just for SSA_NAMEs. Fix GNU coding style.
* gcc.dg/torture/pr71987.c: New test.
From-SVN: r238704
2016-07-25 10:50:30 +00:00
Jonathan Wakely
19bb30c065
Use std::mt19937, std::thread and std::atomic to simplify tests
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* testsuite/20_util/shared_ptr/thread/default_weaktoshared.cc: Use
std::mt19937, std::thread and std::atomic to simplify test.
* testsuite/20_util/shared_ptr/thread/mutex_weaktoshared.cc: Likewise.
From-SVN: r238703
2016-07-25 11:31:53 +01:00
Martin Liska
e9e4348d68
Adapt the numbering scheme (PR gcov-profile/64874)
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PR gcov-profile/64874
* gcov-io.h: Update command about file format.
* gcov-iov.c (main): Adapt the numbering scheme.
From-SVN: r238702
2016-07-25 08:42:42 +00:00
Alan Modra
aa00995cd7
Revert 2015-11-09 sanitizer/obstack configury
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The 2015-11-23 sanitizer merge from upstream lost the changes from
f6528435 to sanitizer_common/sanitizer_common_interceptors.inc, which
made use of _OBSTACK_SIZE_T. So the configury changes to define
_OBSTACK_SIZE_T don't do anything. This wasn't such a bad thing
anyway.. The configure test wrongly adds -I${srcdir}/../include,
effectively resulting in a test of libiberty/obstack rather than libc
obstack support, and it's the latter that asan and tsan need to work
with.
So, remove the useless configure test. Upstream santizer project has
been made aware of the problem if glibc obstack support is ever
updated. Bootsrapped etc. x86_64-linux and committed as obvious.
Revert 2015-11-09 Alan Modra <amodra@gmail.com>
* configure.ac: Don't substitute OBSTACK_DEFS.
* asan/Makefile.am: Remove OBSTACK_DEFS from DEFS.
* tsan/Makefile.am: Likewise.
* configure: Regenerate.
* Makefile.in: Regenerate.
* asan/Makefile.in: Regenerate.
* interception/Makefile.in: Regenerate.
* libbacktrace/Makefile.in: Regenerate.
* lsan/Makefile.in: Regenerate.
* sanitizer_common/Makefile.in: Regenerate.
* tsan/Makefile.in: Regenerate.
* ubsan/Makefile.in: Regenerate.
From-SVN: r238701
2016-07-25 10:43:36 +09:30
GCC Administrator
7bfd96b7a6
Daily bump.
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From-SVN: r238700
2016-07-25 00:16:20 +00:00
Jason Merrill
8a61db89b2
PR c++/71515 - typename in partial specialization
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* pt.c (resolve_typename_type): Try to avoid calling
currently_open_class.
From-SVN: r238696
2016-07-24 19:40:05 -04:00
Kugan Vivekanandarajah
635c1074be
re PR tree-optimization/66726 (missed optimization, factor conversion out of COND_EXPR)
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gcc/ChangeLog:
2016-07-24 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/66726
* tree-ssa-reassoc.c (optimize_vec_cond_expr): Handle tcc_compare stmt
whose result is used in PHI.
(final_range_test_p): Likewise.
(maybe_optimize_range_tests): Likewise.
From-SVN: r238695
2016-07-24 12:47:29 +00:00
Jason Merrill
bd84e5607e
PR c++/66617 - virtual base list-initialization
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* call.c (add_list_candidates): Handle VTT parm.
(build_new_method_call_1): Likewise.
From-SVN: r238689
2016-07-23 22:59:34 -04:00
Jason Merrill
f388b7be18
PR c++/55922 - list-value-initialization of base
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PR c++/63151
* init.c (expand_aggr_init_1): Handle list-initialization from {}.
From-SVN: r238688
2016-07-23 22:56:22 -04:00
Jason Merrill
2dac37c091
PR c++/70709 - zero-length array member
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* class.c (walk_subobject_offsets): Handle 0-length array.
From-SVN: r238687
2016-07-23 22:52:33 -04:00
Jason Merrill
71b3723abb
PR c++/70778 - member template template parameter
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* pt.c (tsubst): Also substitute into the template of a
BOUND_TEMPLATE_TEMPLATE_PARM.
From-SVN: r238686
2016-07-23 22:50:16 -04:00
Jason Merrill
6970223f93
PR c++/71738 - nested template friend
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* pt.c (lookup_template_class_1): Handle getting template from tsubst.
From-SVN: r238685
2016-07-23 22:39:41 -04:00
Jason Merrill
a6c690f41e
PR c++/71350 - error recursion with initializer-list
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* decl.c (reshape_init_r): Check complain for missing braces warning.
From-SVN: r238684
2016-07-23 22:35:37 -04:00
Jason Merrill
478ed1fae7
PR c++/71576 - bitfield and rvalue reference
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* call.c (convert_like_real): Use lvalue_kind.
From-SVN: r238683
2016-07-23 22:25:36 -04:00
Jason Merrill
76178f6767
PR c++/71748 - call to base destructor in template.
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PR c++/52746
* pt.c (tsubst_baselink): Call
adjust_result_of_qualified_name_lookup for unqualified
destructors.
From-SVN: r238681
2016-07-23 22:19:46 -04:00
GCC Administrator
ca32b47320
Daily bump.
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From-SVN: r238680
2016-07-24 00:16:22 +00:00
Michael Meissner
c1b99241bd
rs6000-c.c (altivec_resolve_overloaded_builtin): Reformat two multi-line strings.
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2016-07-22 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Reformat two multi-line strings.
From-SVN: r238675
2016-07-23 02:54:53 +00:00
GCC Administrator
36f80e647a
Daily bump.
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From-SVN: r238674
2016-07-23 00:16:21 +00:00
Steven G. Kargl
d52d376733
re PR fortran/71935 (ICE is_c_interoperable(): gfc_simplify_expr failed)
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2016-07-22 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71935
* check.c (is_c_interoperable): Simplify right expression.
2016-07-22 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71935
* gfortran.dg/c_sizeof_1.f90: Move invalid code to ...
* gfortran.dg/c_sizeof_6.f90: here. Test for error.
* gfortran.dg/pr71935.f90: New test.
From-SVN: r238665
2016-07-22 18:53:11 +00:00
Martin Sebor
2e6b45afba
PR c++/71675 - __atomic_compare_exchange_n returns wrong type for typed enum
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gcc/c-family/ChangeLog:
PR c++/71675
* c-common.c (resolve_overloaded_builtin): Avoid converting
__atomic_compare_exchange_n return type to that of what its
first argument points to.
gcc/testsuite/ChangeLog:
PR c++/71675
* g++.dg/ext/atomic-3.C: New test.
* gcc.dg/atomic/pr71675.c: New test.
From-SVN: r238664
2016-07-22 12:32:08 -06:00
Ian Lance Taylor
22b955cca5
libgo: update to go1.7rc3
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Reviewed-on: https://go-review.googlesource.com/25150
From-SVN: r238662
2016-07-22 18:15:38 +00:00
Martin Sebor
9d04a3af4c
extend.texi (Compound Literals): Add '@' missed in last commit.
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gcc/ChangeLog:
* doc/extend.texi (Compound Literals): Add '@' missed in last commit.
From-SVN: r238652
2016-07-22 10:16:17 -06:00
Martin Sebor
e040f9bd4b
PR c/71560 - union compound literal initializes wrong union field
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gcc/ChangeLog:
* doc/extend.texi (Compound Literals): Correct and clarify.
(Cast to Union): Same.
From-SVN: r238651
2016-07-22 09:40:51 -06:00
Kelvin Nilsen
1610d41097
rs6000.c (rs6000_option_override_internal): Add comments to explain why certain error messages make mention of undocumented...
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gcc/ChangeLog:
2016-07-22 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
comments to explain why certain error messages make mention of
undocumented options.
(rs6000_invalid_builtin): Change error messages to replace mention
of undocumented options with mention of the -mcpu=power9 option
that enables those undocumented options.
* config/rs6000/rs6000.h (MASK_FLOAT128): New macro.
(RS6000_BTM_FLOAT128): Use the new MASK_FLOAT128 macro in the
definition of this macro to correct an existing error.
* config/rs6000/rs6000.opt: Add the Undocumented qualifier to the
mpower9-fusion, mpower9-vector, mpower9-dform, and mmodulo entries.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Modify
descriptions of built-in functions so that they depend on
-mcpu=power9 instead of on the corresponding undocumented flags.
* doc/invoke.texi (Option Summary): Remove all mention of newly
undocumented flags.
(IBM RS/6000 and PowerPC Options): Likewise.
* doc/md.texi (Constraints for Particuliar Machines): Remove all
mention of newly undocumented flags.
From-SVN: r238648
2016-07-22 15:13:20 +00:00
Jonathan Wakely
8cab3d18f0
Move allocator in std::string and RB tree move constructors
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PR libstdc++/71964
* include/bits/basic_string.h [_GLIBCXX_USE_CXX11_ABI]
(basic_string::_Alloc_hider(pointer, _Alloc&&)): Add constructor.
* include/bits/stl_tree.h (_Rb_tree(_Rb_tree&&)): Move allocator.
* testsuite/21_strings/basic_string/allocator/71964.cc: New test.
* testsuite/23_containers/set/allocator/71964.cc: New test.
From-SVN: r238647
2016-07-22 16:03:11 +01:00
Evgeny Stupachenko
58b3986e34
ipa-cp.c (determine_versionability): Do not create constprop clones, when target_clones attribute is set.
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2016-07-22 Evgeny Stupachenko <evstupac@gmail.com>
gcc/
* ipa-cp.c (determine_versionability): Do not create constprop clones,
when target_clones attribute is set.
gcc/testsuite/
* gcc.target/i386/mvc8.c: New test.
From-SVN: r238645
2016-07-22 15:00:42 +00:00