1cb656f82c
This patch changes pr62178.c so that it now scans for two `ldr`s, one into an `s` register, instead of a `ld1r` as before. Also add a scan for an mla instruction. The `ld1r` was needed when this should have generated a mla by vector. Now that we can generate an mla by element instruction and can load directly into the simd register, it is cheaper to not do the ld1r which needlessly duplicates the single element used across the whole vector register. Committed on behalf of Jackson Woodruff gcc/testsuite/ * gcc.target/aarch64/pr62178.c: Updated testcase to scan for two ldrs and an mla. From-SVN: r252086 |
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