74b2bb19f3
2018-05-17 Olga Makhotina <olga.makhotina@intel.com> gcc/ * config.gcc: Support "goldmont-plus". * config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont-plus". * config/i386/i386-c.c (ix86_target_macros_internal): Handle PROCESSOR_GOLDMONT_PLUS. * config/i386/i386.c (m_GOLDMONT_PLUS): Define. (processor_target_table): Add "goldmont-plus". (PTA_GOLDMONT_PLUS): Define. (ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS. (get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS. (fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS. (fold_builtin_cpu): Add "goldmont-plus". (ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS. (ix86_option_override_internal): Add "goldmont-plus". * config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS. (processor_type): Add PROCESSOR_GOLDMONT_PLUS. * config/i386/x86-tune.def: Add m_GOLDMONT_PLUS. * doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type. libgcc/ * config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS. * config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus. gcc/testsuite/ * gcc.target/i386/builtin_target.c: Test goldmont-plus. * gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus. From-SVN: r260307
130 lines
2.9 KiB
C
130 lines
2.9 KiB
C
/* Get CPU type and Features for x86 processors.
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Copyright (C) 2012-2018 Free Software Foundation, Inc.
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Contributed by Sriraman Tallam (tmsriram@google.com)
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Processor Vendor and Models. */
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enum processor_vendor
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{
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VENDOR_INTEL = 1,
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VENDOR_AMD,
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VENDOR_OTHER,
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VENDOR_MAX
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};
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/* Any new types or subtypes have to be inserted at the end. */
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enum processor_types
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{
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INTEL_BONNELL = 1,
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INTEL_CORE2,
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INTEL_COREI7,
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AMDFAM10H,
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AMDFAM15H,
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INTEL_SILVERMONT,
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INTEL_KNL,
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AMD_BTVER1,
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AMD_BTVER2,
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AMDFAM17H,
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INTEL_KNM,
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INTEL_GOLDMONT,
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INTEL_GOLDMONT_PLUS,
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CPU_TYPE_MAX
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};
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enum processor_subtypes
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{
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INTEL_COREI7_NEHALEM = 1,
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INTEL_COREI7_WESTMERE,
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INTEL_COREI7_SANDYBRIDGE,
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AMDFAM10H_BARCELONA,
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AMDFAM10H_SHANGHAI,
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AMDFAM10H_ISTANBUL,
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AMDFAM15H_BDVER1,
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AMDFAM15H_BDVER2,
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AMDFAM15H_BDVER3,
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AMDFAM15H_BDVER4,
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AMDFAM17H_ZNVER1,
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INTEL_COREI7_IVYBRIDGE,
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INTEL_COREI7_HASWELL,
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INTEL_COREI7_BROADWELL,
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INTEL_COREI7_SKYLAKE,
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INTEL_COREI7_SKYLAKE_AVX512,
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INTEL_COREI7_CANNONLAKE,
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INTEL_COREI7_ICELAKE_CLIENT,
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INTEL_COREI7_ICELAKE_SERVER,
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CPU_SUBTYPE_MAX
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};
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/* ISA Features supported. New features have to be inserted at the end. */
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enum processor_features
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{
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FEATURE_CMOV = 0,
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FEATURE_MMX,
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FEATURE_POPCNT,
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FEATURE_SSE,
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FEATURE_SSE2,
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FEATURE_SSE3,
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FEATURE_SSSE3,
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FEATURE_SSE4_1,
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FEATURE_SSE4_2,
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FEATURE_AVX,
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FEATURE_AVX2,
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FEATURE_SSE4_A,
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FEATURE_FMA4,
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FEATURE_XOP,
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FEATURE_FMA,
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FEATURE_AVX512F,
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FEATURE_BMI,
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FEATURE_BMI2,
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FEATURE_AES,
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FEATURE_PCLMUL,
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FEATURE_AVX512VL,
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FEATURE_AVX512BW,
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FEATURE_AVX512DQ,
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FEATURE_AVX512CD,
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FEATURE_AVX512ER,
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FEATURE_AVX512PF,
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FEATURE_AVX512VBMI,
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FEATURE_AVX512IFMA,
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FEATURE_AVX5124VNNIW,
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FEATURE_AVX5124FMAPS,
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FEATURE_AVX512VPOPCNTDQ,
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FEATURE_AVX512VBMI2,
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FEATURE_GFNI,
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FEATURE_VPCLMULQDQ,
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FEATURE_AVX512VNNI,
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FEATURE_AVX512BITALG
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};
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extern struct __processor_model
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{
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unsigned int __cpu_vendor;
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unsigned int __cpu_type;
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unsigned int __cpu_subtype;
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unsigned int __cpu_features[1];
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} __cpu_model;
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extern unsigned int __cpu_features2;
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