bf7b94d407
Hardware multipliers that support widening 32-bit multiplication can be used to perform a 64-bit * 64-bit multiplication more efficiently than a software implementation. The following equation is used to perform 64-bit multiplication for devices with "32bit" or "f5series" hardware multiply versions: 64bit_result = (low32_op0 * lop32_op1) + ((low32_op0 * high32_op1) << 32) + ((high32_op0 * low32_op1) << 32) libgcc/ChangeLog: * config/msp430/lib2hw_mul.S (mult64_hw): New. (if MUL_32): Use mult64_hw for __muldi3. (if MUL_F5): Use mult64_hw for __muldi3. * config/msp430/lib2mul.c (__muldi3): New. * config/msp430/t-msp430 (LIB2FUNCS_EXCLUDE): Define. |
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cmpd.c | ||
cmpsi2.S | ||
epilogue.S | ||
floathidf.c | ||
floathisf.c | ||
floatunhidf.c | ||
floatunhisf.c | ||
lib2bitcountHI.c | ||
lib2divHI.c | ||
lib2divQI.c | ||
lib2divSI.c | ||
lib2hw_mul.S | ||
lib2mul.c | ||
lib2shift.c | ||
mpy.c | ||
msp430-divmod.h | ||
msp430-mul.h | ||
slli.S | ||
srai.S | ||
srli.S | ||
t-msp430 |