2006-06-26 09:25:12 +02:00
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#include <linux/clocksource.h>
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2007-02-16 10:28:04 +01:00
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#include <linux/clockchips.h>
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2008-09-06 14:19:17 +02:00
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#include <linux/interrupt.h>
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2011-05-26 18:22:53 +02:00
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#include <linux/export.h>
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2007-10-12 23:04:06 +02:00
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#include <linux/delay.h>
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2006-06-26 09:25:12 +02:00
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#include <linux/errno.h>
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2011-06-01 20:04:57 +02:00
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#include <linux/i8253.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 09:04:11 +01:00
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#include <linux/slab.h>
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2006-06-26 09:25:12 +02:00
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#include <linux/hpet.h>
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#include <linux/init.h>
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2008-09-06 03:02:17 +02:00
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#include <linux/cpu.h>
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2008-09-06 14:19:17 +02:00
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#include <linux/pm.h>
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#include <linux/io.h>
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2006-06-26 09:25:12 +02:00
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2007-10-12 23:04:06 +02:00
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#include <asm/fixmap.h>
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2008-09-06 14:19:17 +02:00
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#include <asm/hpet.h>
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2011-06-01 20:05:06 +02:00
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#include <asm/time.h>
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2006-06-26 09:25:12 +02:00
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2008-09-06 14:19:17 +02:00
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#define HPET_MASK CLOCKSOURCE_MASK(32)
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2006-06-26 09:25:12 +02:00
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2008-01-30 13:30:00 +01:00
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/* FSEC = 10^-15
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NSEC = 10^-9 */
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2008-09-06 14:19:17 +02:00
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#define FSEC_PER_NSEC 1000000L
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2006-06-26 09:25:12 +02:00
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2008-09-06 03:02:18 +02:00
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#define HPET_DEV_USED_BIT 2
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#define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
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#define HPET_DEV_VALID 0x8
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#define HPET_DEV_FSB_CAP 0x1000
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#define HPET_DEV_PERI_CAP 0x2000
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2010-12-13 12:43:23 +01:00
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#define HPET_MIN_CYCLES 128
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#define HPET_MIN_PROG_DELTA (HPET_MIN_CYCLES + (HPET_MIN_CYCLES >> 1))
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2007-02-16 10:28:04 +01:00
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/*
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* HPET address is set in acpi/boot.c, when an ACPI entry exists
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*/
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2008-09-06 14:19:17 +02:00
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unsigned long hpet_address;
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2009-08-04 21:07:09 +02:00
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u8 hpet_blockid; /* OS timer block num */
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2010-01-21 20:09:52 +01:00
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u8 hpet_msi_disable;
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2008-11-25 08:42:01 +01:00
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#ifdef CONFIG_PCI_MSI
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2008-11-23 20:19:33 +01:00
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static unsigned long hpet_num_timers;
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2008-11-25 08:42:01 +01:00
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#endif
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2008-09-06 14:19:17 +02:00
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static void __iomem *hpet_virt_address;
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2007-02-16 10:28:04 +01:00
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2008-09-06 03:02:17 +02:00
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struct hpet_dev {
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2008-09-06 14:19:17 +02:00
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struct clock_event_device evt;
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unsigned int num;
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int cpu;
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unsigned int irq;
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unsigned int flags;
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char name[10];
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2008-09-06 03:02:17 +02:00
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};
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2011-11-18 15:28:22 +01:00
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inline struct hpet_dev *EVT_TO_HPET_DEV(struct clock_event_device *evtdev)
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{
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return container_of(evtdev, struct hpet_dev, evt);
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}
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2009-08-19 09:44:24 +02:00
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inline unsigned int hpet_readl(unsigned int a)
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2007-02-16 10:28:04 +01:00
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{
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return readl(hpet_virt_address + a);
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}
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2009-08-19 09:44:24 +02:00
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static inline void hpet_writel(unsigned int d, unsigned int a)
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2007-02-16 10:28:04 +01:00
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{
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writel(d, hpet_virt_address + a);
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}
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2007-10-12 23:04:06 +02:00
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#ifdef CONFIG_X86_64
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#include <asm/pgtable.h>
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2008-07-13 23:50:56 +02:00
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#endif
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2007-10-12 23:04:06 +02:00
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2007-10-12 23:04:06 +02:00
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static inline void hpet_set_mapping(void)
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{
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hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
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2008-07-13 23:50:56 +02:00
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#ifdef CONFIG_X86_64
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2011-06-05 19:50:21 +02:00
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__set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VVAR_NOCACHE);
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2008-07-13 23:50:56 +02:00
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#endif
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2007-10-12 23:04:06 +02:00
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}
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static inline void hpet_clear_mapping(void)
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{
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iounmap(hpet_virt_address);
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hpet_virt_address = NULL;
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}
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2007-02-16 10:28:04 +01:00
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/*
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* HPET command line enable / disable
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*/
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static int boot_hpet_disable;
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2007-10-19 20:35:02 +02:00
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int hpet_force_user;
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2009-02-21 00:09:47 +01:00
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static int hpet_verbose;
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2007-02-16 10:28:04 +01:00
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2008-09-06 14:19:17 +02:00
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static int __init hpet_setup(char *str)
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2007-02-16 10:28:04 +01:00
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{
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2012-04-02 16:17:36 +02:00
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while (str) {
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char *next = strchr(str, ',');
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if (next)
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*next++ = 0;
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2007-02-16 10:28:04 +01:00
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if (!strncmp("disable", str, 7))
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boot_hpet_disable = 1;
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2007-10-19 20:35:02 +02:00
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if (!strncmp("force", str, 5))
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hpet_force_user = 1;
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2009-02-21 00:09:47 +01:00
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if (!strncmp("verbose", str, 7))
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hpet_verbose = 1;
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2012-04-02 16:17:36 +02:00
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str = next;
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2007-02-16 10:28:04 +01:00
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}
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return 1;
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}
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__setup("hpet=", hpet_setup);
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2007-10-12 23:04:06 +02:00
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static int __init disable_hpet(char *str)
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{
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boot_hpet_disable = 1;
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return 1;
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}
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__setup("nohpet", disable_hpet);
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2007-02-16 10:28:04 +01:00
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static inline int is_hpet_capable(void)
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{
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2008-09-06 14:19:17 +02:00
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return !boot_hpet_disable && hpet_address;
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2007-02-16 10:28:04 +01:00
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}
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/*
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* HPET timer interrupt enable / disable
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*/
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static int hpet_legacy_int_enabled;
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/**
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* is_hpet_enabled - check whether the hpet timer interrupt is enabled
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*/
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int is_hpet_enabled(void)
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{
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return is_hpet_capable() && hpet_legacy_int_enabled;
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}
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2008-01-30 13:33:28 +01:00
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EXPORT_SYMBOL_GPL(is_hpet_enabled);
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2007-02-16 10:28:04 +01:00
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2009-02-21 00:09:47 +01:00
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static void _hpet_print_config(const char *function, int line)
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{
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u32 i, timers, l, h;
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printk(KERN_INFO "hpet: %s(%d):\n", function, line);
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l = hpet_readl(HPET_ID);
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h = hpet_readl(HPET_PERIOD);
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timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
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printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
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l = hpet_readl(HPET_CFG);
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h = hpet_readl(HPET_STATUS);
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printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
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l = hpet_readl(HPET_COUNTER);
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h = hpet_readl(HPET_COUNTER+4);
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printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
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for (i = 0; i < timers; i++) {
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l = hpet_readl(HPET_Tn_CFG(i));
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h = hpet_readl(HPET_Tn_CFG(i)+4);
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printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
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i, l, h);
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l = hpet_readl(HPET_Tn_CMP(i));
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h = hpet_readl(HPET_Tn_CMP(i)+4);
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printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
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i, l, h);
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l = hpet_readl(HPET_Tn_ROUTE(i));
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h = hpet_readl(HPET_Tn_ROUTE(i)+4);
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printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
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i, l, h);
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}
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}
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#define hpet_print_config() \
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do { \
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if (hpet_verbose) \
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_hpet_print_config(__FUNCTION__, __LINE__); \
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} while (0)
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2007-02-16 10:28:04 +01:00
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/*
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* When the hpet driver (/dev/hpet) is enabled, we need to reserve
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* timer 0 and timer 1 in case of RTC emulation.
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*/
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#ifdef CONFIG_HPET
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x86: using HPET in MSI mode and setting up per CPU HPET timers, fix
On Sat, Sep 06, 2008 at 06:03:53AM -0700, Ingo Molnar wrote:
>
> it crashes two testsystems, the fault on a NULL pointer in hpet init,
> with:
>
> initcall print_all_ICs+0x0/0x520 returned 0 after 26 msecs
> calling hpet_late_init+0x0/0x1c0
> BUG: unable to handle kernel NULL pointer dereference at 000000000000008c
> IP: [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> PGD 0
> Oops: 0000 [1] SMP
> CPU 0
> Modules linked in:
> Pid: 1, comm: swapper Not tainted 2.6.27-rc5 #29725
> RIP: 0010:[<ffffffff80d228be>] [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP: 0018:ffff88003fa07dd0 EFLAGS: 00010246
> RAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000000
> RDX: ffffc20000000160 RSI: 0000000000000000 RDI: 0000000000000003
> RBP: ffff88003fa07e90 R08: 0000000000000000 R09: ffff88003fa07dd0
> R10: 0000000000000001 R11: 0000000000000000 R12: ffff88003fa07dd0
> R13: 0000000000000002 R14: ffffc20000000000 R15: 000000006f57e511
> FS: 0000000000000000(0000) GS:ffffffff80cf6a80(0000) knlGS:0000000000000000
> CS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b
> CR2: 000000000000008c CR3: 0000000000201000 CR4: 00000000000006e0
> DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
> Process swapper (pid: 1, threadinfo ffff88003fa06000, task ffff88003fa08000)
> Stack: 00000000fed00000 ffffc20000000000 0000000100000003 0000000800000002
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> Call Trace:
> [<ffffffff80d227c0>] ? hpet_late_init+0x0/0x1c0
> [<ffffffff80209045>] do_one_initcall+0x45/0x190
> [<ffffffff80296f39>] ? register_irq_proc+0x19/0xe0
> [<ffffffff80d0d140>] ? early_idt_handler+0x0/0x73
> [<ffffffff80d0dabc>] kernel_init+0x14c/0x1b0
> [<ffffffff80942ac1>] ? trace_hardirqs_on_thunk+0x3a/0x3f
> [<ffffffff8020dbd9>] child_rip+0xa/0x11
> [<ffffffff8020ceee>] ? restore_args+0x0/0x30
> [<ffffffff80d0d970>] ? kernel_init+0x0/0x1b0
> [<ffffffff8020dbcf>] ? child_rip+0x0/0x11
> Code: 20 48 83 c1 01 48 39 f1 75 e3 44 89 e8 4c 8b 05 29 29 22 00 31 f6 48 8d 78 01 66 66 90 89 f0 48 8d 04 80 48 c1 e0 05 4a 8d 0c 00 <f6> 81 8c 00 00 00 08 74 26 8b 81 80 00 00 00 8b 91 88 00 00 00
> RIP [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP <ffff88003fa07dd0>
> CR2: 000000000000008c
> Kernel panic - not syncing: Fatal exception
There was one code path, with CONFIG_PCI_MSI disabled, where we were accessing
hpet_devs without initialization. That resulted in the above crash. The change
below adds a check for hpet_devs.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-08 19:18:40 +02:00
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2008-09-24 19:03:17 +02:00
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static void hpet_reserve_msi_timers(struct hpet_data *hd);
|
x86: using HPET in MSI mode and setting up per CPU HPET timers, fix
On Sat, Sep 06, 2008 at 06:03:53AM -0700, Ingo Molnar wrote:
>
> it crashes two testsystems, the fault on a NULL pointer in hpet init,
> with:
>
> initcall print_all_ICs+0x0/0x520 returned 0 after 26 msecs
> calling hpet_late_init+0x0/0x1c0
> BUG: unable to handle kernel NULL pointer dereference at 000000000000008c
> IP: [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> PGD 0
> Oops: 0000 [1] SMP
> CPU 0
> Modules linked in:
> Pid: 1, comm: swapper Not tainted 2.6.27-rc5 #29725
> RIP: 0010:[<ffffffff80d228be>] [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP: 0018:ffff88003fa07dd0 EFLAGS: 00010246
> RAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000000
> RDX: ffffc20000000160 RSI: 0000000000000000 RDI: 0000000000000003
> RBP: ffff88003fa07e90 R08: 0000000000000000 R09: ffff88003fa07dd0
> R10: 0000000000000001 R11: 0000000000000000 R12: ffff88003fa07dd0
> R13: 0000000000000002 R14: ffffc20000000000 R15: 000000006f57e511
> FS: 0000000000000000(0000) GS:ffffffff80cf6a80(0000) knlGS:0000000000000000
> CS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b
> CR2: 000000000000008c CR3: 0000000000201000 CR4: 00000000000006e0
> DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
> Process swapper (pid: 1, threadinfo ffff88003fa06000, task ffff88003fa08000)
> Stack: 00000000fed00000 ffffc20000000000 0000000100000003 0000000800000002
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> Call Trace:
> [<ffffffff80d227c0>] ? hpet_late_init+0x0/0x1c0
> [<ffffffff80209045>] do_one_initcall+0x45/0x190
> [<ffffffff80296f39>] ? register_irq_proc+0x19/0xe0
> [<ffffffff80d0d140>] ? early_idt_handler+0x0/0x73
> [<ffffffff80d0dabc>] kernel_init+0x14c/0x1b0
> [<ffffffff80942ac1>] ? trace_hardirqs_on_thunk+0x3a/0x3f
> [<ffffffff8020dbd9>] child_rip+0xa/0x11
> [<ffffffff8020ceee>] ? restore_args+0x0/0x30
> [<ffffffff80d0d970>] ? kernel_init+0x0/0x1b0
> [<ffffffff8020dbcf>] ? child_rip+0x0/0x11
> Code: 20 48 83 c1 01 48 39 f1 75 e3 44 89 e8 4c 8b 05 29 29 22 00 31 f6 48 8d 78 01 66 66 90 89 f0 48 8d 04 80 48 c1 e0 05 4a 8d 0c 00 <f6> 81 8c 00 00 00 08 74 26 8b 81 80 00 00 00 8b 91 88 00 00 00
> RIP [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP <ffff88003fa07dd0>
> CR2: 000000000000008c
> Kernel panic - not syncing: Fatal exception
There was one code path, with CONFIG_PCI_MSI disabled, where we were accessing
hpet_devs without initialization. That resulted in the above crash. The change
below adds a check for hpet_devs.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-08 19:18:40 +02:00
|
|
|
|
2009-08-19 09:44:24 +02:00
|
|
|
static void hpet_reserve_platform_timers(unsigned int id)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
|
|
|
struct hpet __iomem *hpet = hpet_virt_address;
|
2008-01-30 13:30:03 +01:00
|
|
|
struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
|
|
|
|
unsigned int nrtimers, i;
|
2007-02-16 10:28:04 +01:00
|
|
|
struct hpet_data hd;
|
|
|
|
|
|
|
|
nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
|
|
|
|
|
2008-09-06 14:19:17 +02:00
|
|
|
memset(&hd, 0, sizeof(hd));
|
|
|
|
hd.hd_phys_address = hpet_address;
|
|
|
|
hd.hd_address = hpet;
|
|
|
|
hd.hd_nirqs = nrtimers;
|
2007-02-16 10:28:04 +01:00
|
|
|
hpet_reserve_timer(&hd, 0);
|
|
|
|
|
|
|
|
#ifdef CONFIG_HPET_EMULATE_RTC
|
|
|
|
hpet_reserve_timer(&hd, 1);
|
|
|
|
#endif
|
2008-04-04 16:26:10 +02:00
|
|
|
|
2008-07-29 21:47:38 +02:00
|
|
|
/*
|
|
|
|
* NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
|
|
|
|
* is wrong for i8259!) not the output IRQ. Many BIOS writers
|
|
|
|
* don't bother configuring *any* comparator interrupts.
|
|
|
|
*/
|
2007-02-16 10:28:04 +01:00
|
|
|
hd.hd_irq[0] = HPET_LEGACY_8254;
|
|
|
|
hd.hd_irq[1] = HPET_LEGACY_RTC;
|
|
|
|
|
2008-04-27 14:04:14 +02:00
|
|
|
for (i = 2; i < nrtimers; timer++, i++) {
|
2008-09-06 14:19:17 +02:00
|
|
|
hd.hd_irq[i] = (readl(&timer->hpet_config) &
|
|
|
|
Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
|
2008-04-27 14:04:14 +02:00
|
|
|
}
|
2008-04-04 16:26:10 +02:00
|
|
|
|
x86: using HPET in MSI mode and setting up per CPU HPET timers, fix
On Sat, Sep 06, 2008 at 06:03:53AM -0700, Ingo Molnar wrote:
>
> it crashes two testsystems, the fault on a NULL pointer in hpet init,
> with:
>
> initcall print_all_ICs+0x0/0x520 returned 0 after 26 msecs
> calling hpet_late_init+0x0/0x1c0
> BUG: unable to handle kernel NULL pointer dereference at 000000000000008c
> IP: [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> PGD 0
> Oops: 0000 [1] SMP
> CPU 0
> Modules linked in:
> Pid: 1, comm: swapper Not tainted 2.6.27-rc5 #29725
> RIP: 0010:[<ffffffff80d228be>] [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP: 0018:ffff88003fa07dd0 EFLAGS: 00010246
> RAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000000
> RDX: ffffc20000000160 RSI: 0000000000000000 RDI: 0000000000000003
> RBP: ffff88003fa07e90 R08: 0000000000000000 R09: ffff88003fa07dd0
> R10: 0000000000000001 R11: 0000000000000000 R12: ffff88003fa07dd0
> R13: 0000000000000002 R14: ffffc20000000000 R15: 000000006f57e511
> FS: 0000000000000000(0000) GS:ffffffff80cf6a80(0000) knlGS:0000000000000000
> CS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b
> CR2: 000000000000008c CR3: 0000000000201000 CR4: 00000000000006e0
> DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
> Process swapper (pid: 1, threadinfo ffff88003fa06000, task ffff88003fa08000)
> Stack: 00000000fed00000 ffffc20000000000 0000000100000003 0000000800000002
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> Call Trace:
> [<ffffffff80d227c0>] ? hpet_late_init+0x0/0x1c0
> [<ffffffff80209045>] do_one_initcall+0x45/0x190
> [<ffffffff80296f39>] ? register_irq_proc+0x19/0xe0
> [<ffffffff80d0d140>] ? early_idt_handler+0x0/0x73
> [<ffffffff80d0dabc>] kernel_init+0x14c/0x1b0
> [<ffffffff80942ac1>] ? trace_hardirqs_on_thunk+0x3a/0x3f
> [<ffffffff8020dbd9>] child_rip+0xa/0x11
> [<ffffffff8020ceee>] ? restore_args+0x0/0x30
> [<ffffffff80d0d970>] ? kernel_init+0x0/0x1b0
> [<ffffffff8020dbcf>] ? child_rip+0x0/0x11
> Code: 20 48 83 c1 01 48 39 f1 75 e3 44 89 e8 4c 8b 05 29 29 22 00 31 f6 48 8d 78 01 66 66 90 89 f0 48 8d 04 80 48 c1 e0 05 4a 8d 0c 00 <f6> 81 8c 00 00 00 08 74 26 8b 81 80 00 00 00 8b 91 88 00 00 00
> RIP [<ffffffff80d228be>] hpet_late_init+0xfe/0x1c0
> RSP <ffff88003fa07dd0>
> CR2: 000000000000008c
> Kernel panic - not syncing: Fatal exception
There was one code path, with CONFIG_PCI_MSI disabled, where we were accessing
hpet_devs without initialization. That resulted in the above crash. The change
below adds a check for hpet_devs.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-08 19:18:40 +02:00
|
|
|
hpet_reserve_msi_timers(&hd);
|
2008-09-06 03:02:18 +02:00
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
hpet_alloc(&hd);
|
2008-04-04 16:26:10 +02:00
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
#else
|
2009-08-19 09:44:24 +02:00
|
|
|
static void hpet_reserve_platform_timers(unsigned int id) { }
|
2007-02-16 10:28:04 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Common hpet info
|
|
|
|
*/
|
2011-05-18 23:33:43 +02:00
|
|
|
static unsigned long hpet_freq;
|
2007-02-16 10:28:04 +01:00
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
static void hpet_legacy_set_mode(enum clock_event_mode mode,
|
2007-02-16 10:28:04 +01:00
|
|
|
struct clock_event_device *evt);
|
2007-10-12 23:04:23 +02:00
|
|
|
static int hpet_legacy_next_event(unsigned long delta,
|
2007-02-16 10:28:04 +01:00
|
|
|
struct clock_event_device *evt);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The hpet clock event device
|
|
|
|
*/
|
|
|
|
static struct clock_event_device hpet_clockevent = {
|
|
|
|
.name = "hpet",
|
|
|
|
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
2007-10-12 23:04:23 +02:00
|
|
|
.set_mode = hpet_legacy_set_mode,
|
|
|
|
.set_next_event = hpet_legacy_next_event,
|
2007-02-16 10:28:04 +01:00
|
|
|
.irq = 0,
|
2007-10-12 23:04:23 +02:00
|
|
|
.rating = 50,
|
2007-02-16 10:28:04 +01:00
|
|
|
};
|
|
|
|
|
2009-02-21 00:10:44 +01:00
|
|
|
static void hpet_stop_counter(void)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
|
|
|
unsigned long cfg = hpet_readl(HPET_CFG);
|
|
|
|
cfg &= ~HPET_CFG_ENABLE;
|
|
|
|
hpet_writel(cfg, HPET_CFG);
|
2009-04-21 20:00:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void hpet_reset_counter(void)
|
|
|
|
{
|
2007-02-16 10:28:04 +01:00
|
|
|
hpet_writel(0, HPET_COUNTER);
|
|
|
|
hpet_writel(0, HPET_COUNTER + 4);
|
2009-02-21 00:10:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void hpet_start_counter(void)
|
|
|
|
{
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg = hpet_readl(HPET_CFG);
|
2007-02-16 10:28:04 +01:00
|
|
|
cfg |= HPET_CFG_ENABLE;
|
|
|
|
hpet_writel(cfg, HPET_CFG);
|
|
|
|
}
|
|
|
|
|
2009-02-21 00:10:44 +01:00
|
|
|
static void hpet_restart_counter(void)
|
|
|
|
{
|
|
|
|
hpet_stop_counter();
|
2009-04-21 20:00:37 +02:00
|
|
|
hpet_reset_counter();
|
2009-02-21 00:10:44 +01:00
|
|
|
hpet_start_counter();
|
|
|
|
}
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
static void hpet_resume_device(void)
|
|
|
|
{
|
2007-10-12 23:04:24 +02:00
|
|
|
force_hpet_resume();
|
2007-10-12 23:04:23 +02:00
|
|
|
}
|
|
|
|
|
2010-02-02 23:41:39 +01:00
|
|
|
static void hpet_resume_counter(struct clocksource *cs)
|
2007-10-12 23:04:23 +02:00
|
|
|
{
|
|
|
|
hpet_resume_device();
|
2009-02-21 00:10:44 +01:00
|
|
|
hpet_restart_counter();
|
2007-10-12 23:04:23 +02:00
|
|
|
}
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
static void hpet_enable_legacy_int(void)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg = hpet_readl(HPET_CFG);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
cfg |= HPET_CFG_LEGACY;
|
|
|
|
hpet_writel(cfg, HPET_CFG);
|
|
|
|
hpet_legacy_int_enabled = 1;
|
|
|
|
}
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
static void hpet_legacy_clockevent_register(void)
|
|
|
|
{
|
|
|
|
/* Start HPET legacy interrupts */
|
|
|
|
hpet_enable_legacy_int();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start hpet with the boot cpu mask and make it
|
|
|
|
* global after the IO_APIC has been initialized.
|
|
|
|
*/
|
2008-12-13 11:50:26 +01:00
|
|
|
hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
|
2011-05-18 23:33:43 +02:00
|
|
|
clockevents_config_and_register(&hpet_clockevent, hpet_freq,
|
|
|
|
HPET_MIN_PROG_DELTA, 0x7FFFFFFF);
|
2007-10-12 23:04:23 +02:00
|
|
|
global_clock_event = &hpet_clockevent;
|
|
|
|
printk(KERN_DEBUG "hpet clockevent registered\n");
|
|
|
|
}
|
|
|
|
|
2008-09-06 03:02:18 +02:00
|
|
|
static int hpet_setup_msi_irq(unsigned int irq);
|
|
|
|
|
2008-09-06 03:02:16 +02:00
|
|
|
static void hpet_set_mode(enum clock_event_mode mode,
|
|
|
|
struct clock_event_device *evt, int timer)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg, cmp, now;
|
2007-02-16 10:28:04 +01:00
|
|
|
uint64_t delta;
|
|
|
|
|
2008-09-06 14:19:17 +02:00
|
|
|
switch (mode) {
|
2007-02-16 10:28:04 +01:00
|
|
|
case CLOCK_EVT_MODE_PERIODIC:
|
2009-02-21 00:16:35 +01:00
|
|
|
hpet_stop_counter();
|
2008-09-06 03:02:16 +02:00
|
|
|
delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
|
|
|
|
delta >>= evt->shift;
|
2009-04-21 20:00:37 +02:00
|
|
|
now = hpet_readl(HPET_COUNTER);
|
2009-08-19 09:44:24 +02:00
|
|
|
cmp = now + (unsigned int) delta;
|
2008-09-06 03:02:16 +02:00
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
|
|
|
|
HPET_TN_SETVAL | HPET_TN_32BIT;
|
2008-09-06 03:02:16 +02:00
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(timer));
|
2009-04-21 20:00:37 +02:00
|
|
|
hpet_writel(cmp, HPET_Tn_CMP(timer));
|
|
|
|
udelay(1);
|
|
|
|
/*
|
|
|
|
* HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
|
|
|
|
* cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
|
|
|
|
* bit is automatically cleared after the first write.
|
|
|
|
* (See AMD-8111 HyperTransport I/O Hub Data Sheet,
|
|
|
|
* Publication # 24674)
|
|
|
|
*/
|
2009-08-19 09:44:24 +02:00
|
|
|
hpet_writel((unsigned int) delta, HPET_Tn_CMP(timer));
|
2009-02-21 00:16:35 +01:00
|
|
|
hpet_start_counter();
|
2009-02-21 00:09:47 +01:00
|
|
|
hpet_print_config();
|
2007-02-16 10:28:04 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case CLOCK_EVT_MODE_ONESHOT:
|
2008-09-06 03:02:16 +02:00
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
cfg &= ~HPET_TN_PERIODIC;
|
|
|
|
cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
|
2008-09-06 03:02:16 +02:00
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case CLOCK_EVT_MODE_UNUSED:
|
|
|
|
case CLOCK_EVT_MODE_SHUTDOWN:
|
2008-09-06 03:02:16 +02:00
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
cfg &= ~HPET_TN_ENABLE;
|
2008-09-06 03:02:16 +02:00
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
break;
|
2007-07-21 13:37:34 +02:00
|
|
|
|
|
|
|
case CLOCK_EVT_MODE_RESUME:
|
2008-09-06 03:02:18 +02:00
|
|
|
if (timer == 0) {
|
|
|
|
hpet_enable_legacy_int();
|
|
|
|
} else {
|
|
|
|
struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
|
|
|
|
hpet_setup_msi_irq(hdev->irq);
|
|
|
|
disable_irq(hdev->irq);
|
2008-12-13 11:50:26 +01:00
|
|
|
irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
|
2008-09-06 03:02:18 +02:00
|
|
|
enable_irq(hdev->irq);
|
|
|
|
}
|
2009-02-21 00:09:47 +01:00
|
|
|
hpet_print_config();
|
2007-07-21 13:37:34 +02:00
|
|
|
break;
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-09-06 03:02:16 +02:00
|
|
|
static int hpet_next_event(unsigned long delta,
|
|
|
|
struct clock_event_device *evt, int timer)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
2008-09-06 03:03:32 +02:00
|
|
|
u32 cnt;
|
2010-09-15 15:11:57 +02:00
|
|
|
s32 res;
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
cnt = hpet_readl(HPET_COUNTER);
|
2008-09-06 03:03:32 +02:00
|
|
|
cnt += (u32) delta;
|
2008-09-06 03:02:16 +02:00
|
|
|
hpet_writel(cnt, HPET_Tn_CMP(timer));
|
2007-02-16 10:28:04 +01:00
|
|
|
|
2008-09-06 03:06:08 +02:00
|
|
|
/*
|
2010-09-15 15:11:57 +02:00
|
|
|
* HPETs are a complete disaster. The compare register is
|
|
|
|
* based on a equal comparison and neither provides a less
|
|
|
|
* than or equal functionality (which would require to take
|
|
|
|
* the wraparound into account) nor a simple count down event
|
|
|
|
* mode. Further the write to the comparator register is
|
|
|
|
* delayed internally up to two HPET clock cycles in certain
|
2010-12-13 12:43:23 +01:00
|
|
|
* chipsets (ATI, ICH9,10). Some newer AMD chipsets have even
|
|
|
|
* longer delays. We worked around that by reading back the
|
|
|
|
* compare register, but that required another workaround for
|
|
|
|
* ICH9,10 chips where the first readout after write can
|
|
|
|
* return the old stale value. We already had a minimum
|
|
|
|
* programming delta of 5us enforced, but a NMI or SMI hitting
|
2010-09-15 15:11:57 +02:00
|
|
|
* between the counter readout and the comparator write can
|
|
|
|
* move us behind that point easily. Now instead of reading
|
|
|
|
* the compare register back several times, we make the ETIME
|
|
|
|
* decision based on the following: Return ETIME if the
|
2010-12-13 12:43:23 +01:00
|
|
|
* counter value after the write is less than HPET_MIN_CYCLES
|
2010-09-15 15:11:57 +02:00
|
|
|
* away from the event or if the counter is already ahead of
|
2010-12-13 12:43:23 +01:00
|
|
|
* the event. The minimum programming delta for the generic
|
|
|
|
* clockevents code is set to 1.5 * HPET_MIN_CYCLES.
|
2008-09-06 03:06:08 +02:00
|
|
|
*/
|
2010-09-15 15:11:57 +02:00
|
|
|
res = (s32)(cnt - hpet_readl(HPET_COUNTER));
|
2008-09-06 03:06:08 +02:00
|
|
|
|
2010-12-13 12:43:23 +01:00
|
|
|
return res < HPET_MIN_CYCLES ? -ETIME : 0;
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
|
2008-09-06 03:02:16 +02:00
|
|
|
static void hpet_legacy_set_mode(enum clock_event_mode mode,
|
|
|
|
struct clock_event_device *evt)
|
|
|
|
{
|
|
|
|
hpet_set_mode(mode, evt, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_legacy_next_event(unsigned long delta,
|
|
|
|
struct clock_event_device *evt)
|
|
|
|
{
|
|
|
|
return hpet_next_event(delta, evt, 0);
|
|
|
|
}
|
|
|
|
|
2008-09-06 03:02:17 +02:00
|
|
|
/*
|
|
|
|
* HPET MSI Support
|
|
|
|
*/
|
2008-09-06 03:02:18 +02:00
|
|
|
#ifdef CONFIG_PCI_MSI
|
2008-09-24 19:03:17 +02:00
|
|
|
|
|
|
|
static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
|
|
|
|
static struct hpet_dev *hpet_devs;
|
|
|
|
|
2010-09-28 16:18:39 +02:00
|
|
|
void hpet_msi_unmask(struct irq_data *data)
|
2008-09-06 03:02:17 +02:00
|
|
|
{
|
2010-09-28 16:18:39 +02:00
|
|
|
struct hpet_dev *hdev = data->handler_data;
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg;
|
2008-09-06 03:02:17 +02:00
|
|
|
|
|
|
|
/* unmask it */
|
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
|
2012-11-02 15:02:40 +01:00
|
|
|
cfg |= HPET_TN_ENABLE | HPET_TN_FSB;
|
2008-09-06 03:02:17 +02:00
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
|
|
|
|
}
|
|
|
|
|
2010-09-28 16:18:39 +02:00
|
|
|
void hpet_msi_mask(struct irq_data *data)
|
2008-09-06 03:02:17 +02:00
|
|
|
{
|
2010-09-28 16:18:39 +02:00
|
|
|
struct hpet_dev *hdev = data->handler_data;
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg;
|
2008-09-06 03:02:17 +02:00
|
|
|
|
|
|
|
/* mask it */
|
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
|
2012-11-02 15:02:40 +01:00
|
|
|
cfg &= ~(HPET_TN_ENABLE | HPET_TN_FSB);
|
2008-09-06 03:02:17 +02:00
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
|
|
|
|
}
|
|
|
|
|
2010-09-28 16:18:39 +02:00
|
|
|
void hpet_msi_write(struct hpet_dev *hdev, struct msi_msg *msg)
|
2008-09-06 03:02:17 +02:00
|
|
|
{
|
|
|
|
hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
|
|
|
|
hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
|
|
|
|
}
|
|
|
|
|
2010-09-28 16:18:39 +02:00
|
|
|
void hpet_msi_read(struct hpet_dev *hdev, struct msi_msg *msg)
|
2008-09-06 03:02:17 +02:00
|
|
|
{
|
|
|
|
msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
|
|
|
|
msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
|
|
|
|
msg->address_hi = 0;
|
|
|
|
}
|
|
|
|
|
2008-09-06 03:02:18 +02:00
|
|
|
static void hpet_msi_set_mode(enum clock_event_mode mode,
|
|
|
|
struct clock_event_device *evt)
|
|
|
|
{
|
|
|
|
struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
|
|
|
|
hpet_set_mode(mode, evt, hdev->num);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_msi_next_event(unsigned long delta,
|
|
|
|
struct clock_event_device *evt)
|
|
|
|
{
|
|
|
|
struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
|
|
|
|
return hpet_next_event(delta, evt, hdev->num);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_setup_msi_irq(unsigned int irq)
|
|
|
|
{
|
2012-09-26 12:44:37 +02:00
|
|
|
if (x86_msi.setup_hpet_msi(irq, hpet_blockid)) {
|
2008-09-06 03:02:18 +02:00
|
|
|
destroy_irq(irq);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_assign_irq(struct hpet_dev *dev)
|
|
|
|
{
|
|
|
|
unsigned int irq;
|
|
|
|
|
2010-09-28 23:20:23 +02:00
|
|
|
irq = create_irq_nr(0, -1);
|
2008-09-06 03:02:18 +02:00
|
|
|
if (!irq)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2011-03-12 12:20:43 +01:00
|
|
|
irq_set_handler_data(irq, dev);
|
2008-09-06 03:02:18 +02:00
|
|
|
|
|
|
|
if (hpet_setup_msi_irq(irq))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev->irq = irq;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t hpet_interrupt_handler(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct hpet_dev *dev = (struct hpet_dev *)data;
|
|
|
|
struct clock_event_device *hevt = &dev->evt;
|
|
|
|
|
|
|
|
if (!hevt->event_handler) {
|
|
|
|
printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
|
|
|
|
dev->num);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
hevt->event_handler(hevt);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_setup_irq(struct hpet_dev *dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (request_irq(dev->irq, hpet_interrupt_handler,
|
2009-06-14 17:46:01 +02:00
|
|
|
IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
|
|
|
|
dev->name, dev))
|
2008-09-06 03:02:18 +02:00
|
|
|
return -1;
|
|
|
|
|
|
|
|
disable_irq(dev->irq);
|
2008-12-13 11:50:26 +01:00
|
|
|
irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
|
2008-09-06 03:02:18 +02:00
|
|
|
enable_irq(dev->irq);
|
|
|
|
|
2008-09-25 20:53:11 +02:00
|
|
|
printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
|
|
|
|
dev->name, dev->irq);
|
|
|
|
|
2008-09-06 03:02:18 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This should be called in specific @cpu */
|
|
|
|
static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
|
|
|
|
{
|
|
|
|
struct clock_event_device *evt = &hdev->evt;
|
|
|
|
|
|
|
|
WARN_ON(cpu != smp_processor_id());
|
|
|
|
if (!(hdev->flags & HPET_DEV_VALID))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (hpet_setup_msi_irq(hdev->irq))
|
|
|
|
return;
|
|
|
|
|
|
|
|
hdev->cpu = cpu;
|
|
|
|
per_cpu(cpu_hpet_dev, cpu) = hdev;
|
|
|
|
evt->name = hdev->name;
|
|
|
|
hpet_setup_irq(hdev);
|
|
|
|
evt->irq = hdev->irq;
|
|
|
|
|
|
|
|
evt->rating = 110;
|
|
|
|
evt->features = CLOCK_EVT_FEAT_ONESHOT;
|
|
|
|
if (hdev->flags & HPET_DEV_PERI_CAP)
|
|
|
|
evt->features |= CLOCK_EVT_FEAT_PERIODIC;
|
|
|
|
|
|
|
|
evt->set_mode = hpet_msi_set_mode;
|
|
|
|
evt->set_next_event = hpet_msi_next_event;
|
2008-12-13 11:50:26 +01:00
|
|
|
evt->cpumask = cpumask_of(hdev->cpu);
|
2011-05-18 23:33:43 +02:00
|
|
|
|
|
|
|
clockevents_config_and_register(evt, hpet_freq, HPET_MIN_PROG_DELTA,
|
|
|
|
0x7FFFFFFF);
|
2008-09-06 03:02:18 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_HPET
|
|
|
|
/* Reserve at least one timer for userspace (/dev/hpet) */
|
|
|
|
#define RESERVE_TIMERS 1
|
|
|
|
#else
|
|
|
|
#define RESERVE_TIMERS 0
|
|
|
|
#endif
|
2008-09-24 19:03:17 +02:00
|
|
|
|
|
|
|
static void hpet_msi_capability_lookup(unsigned int start_timer)
|
2008-09-06 03:02:18 +02:00
|
|
|
{
|
|
|
|
unsigned int id;
|
|
|
|
unsigned int num_timers;
|
|
|
|
unsigned int num_timers_used = 0;
|
|
|
|
int i;
|
|
|
|
|
2010-01-21 20:09:52 +01:00
|
|
|
if (hpet_msi_disable)
|
|
|
|
return;
|
|
|
|
|
2009-08-12 05:16:12 +02:00
|
|
|
if (boot_cpu_has(X86_FEATURE_ARAT))
|
|
|
|
return;
|
2008-09-06 03:02:18 +02:00
|
|
|
id = hpet_readl(HPET_ID);
|
|
|
|
|
|
|
|
num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
|
|
|
|
num_timers++; /* Value read out starts from 0 */
|
2009-02-21 00:09:47 +01:00
|
|
|
hpet_print_config();
|
2008-09-06 03:02:18 +02:00
|
|
|
|
|
|
|
hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
|
|
|
|
if (!hpet_devs)
|
|
|
|
return;
|
|
|
|
|
|
|
|
hpet_num_timers = num_timers;
|
|
|
|
|
|
|
|
for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
|
|
|
|
struct hpet_dev *hdev = &hpet_devs[num_timers_used];
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg = hpet_readl(HPET_Tn_CFG(i));
|
2008-09-06 03:02:18 +02:00
|
|
|
|
|
|
|
/* Only consider HPET timer with MSI support */
|
|
|
|
if (!(cfg & HPET_TN_FSB_CAP))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
hdev->flags = 0;
|
|
|
|
if (cfg & HPET_TN_PERIODIC_CAP)
|
|
|
|
hdev->flags |= HPET_DEV_PERI_CAP;
|
|
|
|
hdev->num = i;
|
|
|
|
|
|
|
|
sprintf(hdev->name, "hpet%d", i);
|
|
|
|
if (hpet_assign_irq(hdev))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
hdev->flags |= HPET_DEV_FSB_CAP;
|
|
|
|
hdev->flags |= HPET_DEV_VALID;
|
|
|
|
num_timers_used++;
|
|
|
|
if (num_timers_used == num_possible_cpus())
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
|
|
|
|
num_timers, num_timers_used);
|
|
|
|
}
|
|
|
|
|
2008-09-24 19:03:17 +02:00
|
|
|
#ifdef CONFIG_HPET
|
|
|
|
static void hpet_reserve_msi_timers(struct hpet_data *hd)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!hpet_devs)
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; i < hpet_num_timers; i++) {
|
|
|
|
struct hpet_dev *hdev = &hpet_devs[i];
|
|
|
|
|
|
|
|
if (!(hdev->flags & HPET_DEV_VALID))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
hd->hd_irq[hdev->num] = hdev->irq;
|
|
|
|
hpet_reserve_timer(hd, hdev->num);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-09-06 03:02:18 +02:00
|
|
|
static struct hpet_dev *hpet_get_unused_timer(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!hpet_devs)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
for (i = 0; i < hpet_num_timers; i++) {
|
|
|
|
struct hpet_dev *hdev = &hpet_devs[i];
|
|
|
|
|
|
|
|
if (!(hdev->flags & HPET_DEV_VALID))
|
|
|
|
continue;
|
|
|
|
if (test_and_set_bit(HPET_DEV_USED_BIT,
|
|
|
|
(unsigned long *)&hdev->flags))
|
|
|
|
continue;
|
|
|
|
return hdev;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct hpet_work_struct {
|
|
|
|
struct delayed_work work;
|
|
|
|
struct completion complete;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void hpet_work(struct work_struct *w)
|
|
|
|
{
|
|
|
|
struct hpet_dev *hdev;
|
|
|
|
int cpu = smp_processor_id();
|
|
|
|
struct hpet_work_struct *hpet_work;
|
|
|
|
|
|
|
|
hpet_work = container_of(w, struct hpet_work_struct, work.work);
|
|
|
|
|
|
|
|
hdev = hpet_get_unused_timer();
|
|
|
|
if (hdev)
|
|
|
|
init_one_hpet_msi_clockevent(hdev, cpu);
|
|
|
|
|
|
|
|
complete(&hpet_work->complete);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpet_cpuhp_notify(struct notifier_block *n,
|
|
|
|
unsigned long action, void *hcpu)
|
|
|
|
{
|
|
|
|
unsigned long cpu = (unsigned long)hcpu;
|
|
|
|
struct hpet_work_struct work;
|
|
|
|
struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
|
|
|
|
|
|
|
|
switch (action & 0xf) {
|
|
|
|
case CPU_ONLINE:
|
2010-10-26 23:22:34 +02:00
|
|
|
INIT_DELAYED_WORK_ONSTACK(&work.work, hpet_work);
|
2008-09-06 03:02:18 +02:00
|
|
|
init_completion(&work.complete);
|
|
|
|
/* FIXME: add schedule_work_on() */
|
|
|
|
schedule_delayed_work_on(cpu, &work.work, 0);
|
|
|
|
wait_for_completion(&work.complete);
|
2009-01-22 09:50:44 +01:00
|
|
|
destroy_timer_on_stack(&work.work.timer);
|
2008-09-06 03:02:18 +02:00
|
|
|
break;
|
|
|
|
case CPU_DEAD:
|
|
|
|
if (hdev) {
|
|
|
|
free_irq(hdev->irq, hdev);
|
|
|
|
hdev->flags &= ~HPET_DEV_USED;
|
|
|
|
per_cpu(cpu_hpet_dev, cpu) = NULL;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
|
2008-09-09 01:19:09 +02:00
|
|
|
static int hpet_setup_msi_irq(unsigned int irq)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2008-09-24 19:03:17 +02:00
|
|
|
static void hpet_msi_capability_lookup(unsigned int start_timer)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_HPET
|
|
|
|
static void hpet_reserve_msi_timers(struct hpet_data *hd)
|
2008-09-06 03:02:18 +02:00
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
2008-09-24 19:03:17 +02:00
|
|
|
#endif
|
2008-09-06 03:02:18 +02:00
|
|
|
|
|
|
|
static int hpet_cpuhp_notify(struct notifier_block *n,
|
|
|
|
unsigned long action, void *hcpu)
|
|
|
|
{
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2007-03-05 09:30:50 +01:00
|
|
|
/*
|
|
|
|
* Clock source related code
|
|
|
|
*/
|
2009-04-21 21:24:00 +02:00
|
|
|
static cycle_t read_hpet(struct clocksource *cs)
|
2007-03-05 09:30:50 +01:00
|
|
|
{
|
|
|
|
return (cycle_t)hpet_readl(HPET_COUNTER);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct clocksource clocksource_hpet = {
|
|
|
|
.name = "hpet",
|
|
|
|
.rating = 250,
|
|
|
|
.read = read_hpet,
|
|
|
|
.mask = HPET_MASK,
|
|
|
|
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
2009-02-21 00:10:44 +01:00
|
|
|
.resume = hpet_resume_counter,
|
2007-10-12 23:04:06 +02:00
|
|
|
#ifdef CONFIG_X86_64
|
2011-07-14 12:47:22 +02:00
|
|
|
.archdata = { .vclock_mode = VCLOCK_HPET },
|
2007-10-12 23:04:06 +02:00
|
|
|
#endif
|
2007-03-05 09:30:50 +01:00
|
|
|
};
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
static int hpet_clocksource_register(void)
|
2007-02-16 10:28:04 +01:00
|
|
|
{
|
x86: clean up computation of HPET .mult variables
While reading through the HPET code I realized that the
computation of .mult variables could be done with less
lines of code, resulting in a 1.6% text size saving
for hpet.o
So I propose the following patch, which applies against
today's Linus -git tree.
>From 0c6507e400e9ca5f7f14331e18f8c12baf75a9d3 Mon Sep 17 00:00:00 2001
From: Carlos R. Mafra <crmafra@ift.unesp.br>
Date: Mon, 5 May 2008 19:38:53 -0300
The computation of clocksource_hpet.mult
tmp = (u64)hpet_period << HPET_SHIFT;
do_div(tmp, FSEC_PER_NSEC);
clocksource_hpet.mult = (u32)tmp;
can be streamlined if we note that it is equal to
clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
Furthermore, the computation of hpet_clockevent.mult
uint64_t hpet_freq;
hpet_freq = 1000000000000000ULL;
do_div(hpet_freq, hpet_period);
hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
NSEC_PER_SEC, hpet_clockevent.shift);
can also be streamlined with the observation that hpet_period and hpet_freq are
inverse to each other (in proper units).
So instead of computing hpet_freq and using (schematically)
div_sc(hpet_freq, 10^9, shift) we use the trick of calling with the
arguments in reverse order, div_sc(10^6, hpet_period, shift).
The different power of ten is due to frequency being in Hertz (1/sec)
and the period being in units of femtosecond. Explicitly,
mult = (hpet_freq * 2^shift)/10^9 (before)
mult = (10^6 * 2^shift)/hpet_period (after)
because hpet_freq = 10^15/hpet_period.
The comments in the code are also updated to reflect the changes.
As a result,
text data bss dec hex filename
2957 425 92 3474 d92 arch/x86/kernel/hpet.o
3006 425 92 3523 dc3 arch/x86/kernel/hpet.o.old
a 1.6% reduction in text size.
Signed-off-by: Carlos R. Mafra <crmafra@ift.unesp.br>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-05-06 01:11:22 +02:00
|
|
|
u64 start, now;
|
2007-07-21 17:11:12 +02:00
|
|
|
cycle_t t1;
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
/* Start the counter */
|
2009-02-21 00:10:44 +01:00
|
|
|
hpet_restart_counter();
|
2007-02-16 10:28:04 +01:00
|
|
|
|
2007-07-21 17:11:12 +02:00
|
|
|
/* Verify whether hpet counter works */
|
2009-04-21 21:24:00 +02:00
|
|
|
t1 = hpet_readl(HPET_COUNTER);
|
2007-07-21 17:11:12 +02:00
|
|
|
rdtscll(start);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We don't know the TSC frequency yet, but waiting for
|
|
|
|
* 200000 TSC cycles is safe:
|
|
|
|
* 4 GHz == 50us
|
|
|
|
* 1 GHz == 200us
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
rep_nop();
|
|
|
|
rdtscll(now);
|
|
|
|
} while ((now - start) < 200000UL);
|
|
|
|
|
2009-04-21 21:24:00 +02:00
|
|
|
if (t1 == hpet_readl(HPET_COUNTER)) {
|
2007-07-21 17:11:12 +02:00
|
|
|
printk(KERN_WARNING
|
|
|
|
"HPET counter not counting. HPET disabled\n");
|
2007-10-12 23:04:23 +02:00
|
|
|
return -ENODEV;
|
2007-07-21 17:11:12 +02:00
|
|
|
}
|
|
|
|
|
2010-07-14 02:56:27 +02:00
|
|
|
clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq);
|
2007-10-12 23:04:23 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-04-02 16:15:55 +02:00
|
|
|
static u32 *hpet_boot_cfg;
|
|
|
|
|
2008-02-05 00:48:13 +01:00
|
|
|
/**
|
|
|
|
* hpet_enable - Try to setup the HPET timer. Returns 1 on success.
|
2007-10-12 23:04:23 +02:00
|
|
|
*/
|
|
|
|
int __init hpet_enable(void)
|
|
|
|
{
|
2012-04-02 16:15:55 +02:00
|
|
|
u32 hpet_period, cfg, id;
|
2011-05-18 23:33:43 +02:00
|
|
|
u64 freq;
|
2012-04-02 16:15:55 +02:00
|
|
|
unsigned int i, last;
|
2007-10-12 23:04:23 +02:00
|
|
|
|
|
|
|
if (!is_hpet_capable())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
hpet_set_mapping();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the period and check for a sane value:
|
|
|
|
*/
|
|
|
|
hpet_period = hpet_readl(HPET_PERIOD);
|
2008-08-14 12:17:06 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* AMD SB700 based systems with spread spectrum enabled use a
|
|
|
|
* SMM based HPET emulation to provide proper frequency
|
|
|
|
* setting. The SMM code is initialized with the first HPET
|
|
|
|
* register access and takes some time to complete. During
|
|
|
|
* this time the config register reads 0xffffffff. We check
|
|
|
|
* for max. 1000 loops whether the config register reads a non
|
|
|
|
* 0xffffffff value to make sure that HPET is up and running
|
|
|
|
* before we go further. A counting loop is safe, as the HPET
|
|
|
|
* access takes thousands of CPU cycles. On non SB700 based
|
|
|
|
* machines this check is only done once and has no side
|
|
|
|
* effects.
|
|
|
|
*/
|
|
|
|
for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
|
|
|
|
if (i == 1000) {
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"HPET config register value = 0xFFFFFFFF. "
|
|
|
|
"Disabling HPET\n");
|
|
|
|
goto out_nohpet;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
|
|
|
|
goto out_nohpet;
|
|
|
|
|
2011-05-18 23:33:43 +02:00
|
|
|
/*
|
|
|
|
* The period is a femto seconds value. Convert it to a
|
|
|
|
* frequency.
|
|
|
|
*/
|
|
|
|
freq = FSEC_PER_SEC;
|
|
|
|
do_div(freq, hpet_period);
|
|
|
|
hpet_freq = freq;
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
/*
|
|
|
|
* Read the HPET ID register to retrieve the IRQ routing
|
|
|
|
* information and the number of channels
|
|
|
|
*/
|
|
|
|
id = hpet_readl(HPET_ID);
|
2009-02-21 00:09:47 +01:00
|
|
|
hpet_print_config();
|
2007-10-12 23:04:23 +02:00
|
|
|
|
2012-04-02 16:15:55 +02:00
|
|
|
last = (id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
#ifdef CONFIG_HPET_EMULATE_RTC
|
|
|
|
/*
|
|
|
|
* The legacy routing mode needs at least two channels, tick timer
|
|
|
|
* and the rtc emulation channel.
|
|
|
|
*/
|
2012-04-02 16:15:55 +02:00
|
|
|
if (!last)
|
2007-10-12 23:04:23 +02:00
|
|
|
goto out_nohpet;
|
|
|
|
#endif
|
|
|
|
|
2012-04-02 16:15:55 +02:00
|
|
|
cfg = hpet_readl(HPET_CFG);
|
|
|
|
hpet_boot_cfg = kmalloc((last + 2) * sizeof(*hpet_boot_cfg),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (hpet_boot_cfg)
|
|
|
|
*hpet_boot_cfg = cfg;
|
|
|
|
else
|
|
|
|
pr_warn("HPET initial state will not be saved\n");
|
|
|
|
cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
|
2012-05-25 12:40:09 +02:00
|
|
|
hpet_writel(cfg, HPET_CFG);
|
2012-04-02 16:15:55 +02:00
|
|
|
if (cfg)
|
|
|
|
pr_warn("HPET: Unrecognized bits %#x set in global cfg\n",
|
|
|
|
cfg);
|
|
|
|
|
|
|
|
for (i = 0; i <= last; ++i) {
|
|
|
|
cfg = hpet_readl(HPET_Tn_CFG(i));
|
|
|
|
if (hpet_boot_cfg)
|
|
|
|
hpet_boot_cfg[i + 1] = cfg;
|
|
|
|
cfg &= ~(HPET_TN_ENABLE | HPET_TN_LEVEL | HPET_TN_FSB);
|
|
|
|
hpet_writel(cfg, HPET_Tn_CFG(i));
|
|
|
|
cfg &= ~(HPET_TN_PERIODIC | HPET_TN_PERIODIC_CAP
|
|
|
|
| HPET_TN_64BIT_CAP | HPET_TN_32BIT | HPET_TN_ROUTE
|
|
|
|
| HPET_TN_FSB | HPET_TN_FSB_CAP);
|
|
|
|
if (cfg)
|
|
|
|
pr_warn("HPET: Unrecognized bits %#x set in cfg#%u\n",
|
|
|
|
cfg, i);
|
|
|
|
}
|
|
|
|
hpet_print_config();
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
if (hpet_clocksource_register())
|
|
|
|
goto out_nohpet;
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
if (id & HPET_ID_LEGSUP) {
|
2007-10-12 23:04:23 +02:00
|
|
|
hpet_legacy_clockevent_register();
|
2007-02-16 10:28:04 +01:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
2006-06-26 09:25:12 +02:00
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
out_nohpet:
|
2007-10-12 23:04:06 +02:00
|
|
|
hpet_clear_mapping();
|
2008-12-16 12:39:57 +01:00
|
|
|
hpet_address = 0;
|
2007-02-16 10:28:04 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-10-12 23:04:06 +02:00
|
|
|
/*
|
|
|
|
* Needs to be late, as the reserve_timer code calls kalloc !
|
|
|
|
*
|
|
|
|
* Not a problem on i386 as hpet_enable is called from late_time_init,
|
|
|
|
* but on x86_64 it is necessary !
|
|
|
|
*/
|
|
|
|
static __init int hpet_late_init(void)
|
|
|
|
{
|
2008-09-06 03:02:18 +02:00
|
|
|
int cpu;
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
if (boot_hpet_disable)
|
2007-10-12 23:04:06 +02:00
|
|
|
return -ENODEV;
|
|
|
|
|
2007-10-12 23:04:23 +02:00
|
|
|
if (!hpet_address) {
|
|
|
|
if (!force_hpet_address)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
hpet_address = force_hpet_address;
|
|
|
|
hpet_enable();
|
|
|
|
}
|
|
|
|
|
2008-12-16 21:32:23 +01:00
|
|
|
if (!hpet_virt_address)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2009-08-12 05:16:12 +02:00
|
|
|
if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
|
|
|
|
hpet_msi_capability_lookup(2);
|
|
|
|
else
|
|
|
|
hpet_msi_capability_lookup(0);
|
|
|
|
|
2007-10-12 23:04:06 +02:00
|
|
|
hpet_reserve_platform_timers(hpet_readl(HPET_ID));
|
2009-02-21 00:09:47 +01:00
|
|
|
hpet_print_config();
|
2007-10-12 23:04:23 +02:00
|
|
|
|
2010-01-21 20:09:52 +01:00
|
|
|
if (hpet_msi_disable)
|
|
|
|
return 0;
|
|
|
|
|
2009-08-12 05:16:12 +02:00
|
|
|
if (boot_cpu_has(X86_FEATURE_ARAT))
|
|
|
|
return 0;
|
|
|
|
|
2008-09-06 03:02:18 +02:00
|
|
|
for_each_online_cpu(cpu) {
|
|
|
|
hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This notifier should be called after workqueue is ready */
|
|
|
|
hotcpu_notifier(hpet_cpuhp_notify, -20);
|
|
|
|
|
2007-10-12 23:04:06 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
fs_initcall(hpet_late_init);
|
|
|
|
|
2007-12-03 17:17:10 +01:00
|
|
|
void hpet_disable(void)
|
|
|
|
{
|
2010-07-21 19:32:37 +02:00
|
|
|
if (is_hpet_capable() && hpet_virt_address) {
|
2012-04-02 16:15:55 +02:00
|
|
|
unsigned int cfg = hpet_readl(HPET_CFG), id, last;
|
2007-12-03 17:17:10 +01:00
|
|
|
|
2012-04-02 16:15:55 +02:00
|
|
|
if (hpet_boot_cfg)
|
|
|
|
cfg = *hpet_boot_cfg;
|
|
|
|
else if (hpet_legacy_int_enabled) {
|
2007-12-03 17:17:10 +01:00
|
|
|
cfg &= ~HPET_CFG_LEGACY;
|
|
|
|
hpet_legacy_int_enabled = 0;
|
|
|
|
}
|
|
|
|
cfg &= ~HPET_CFG_ENABLE;
|
|
|
|
hpet_writel(cfg, HPET_CFG);
|
2012-04-02 16:15:55 +02:00
|
|
|
|
|
|
|
if (!hpet_boot_cfg)
|
|
|
|
return;
|
|
|
|
|
|
|
|
id = hpet_readl(HPET_ID);
|
|
|
|
last = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
|
|
|
|
|
|
|
|
for (id = 0; id <= last; ++id)
|
|
|
|
hpet_writel(hpet_boot_cfg[id + 1], HPET_Tn_CFG(id));
|
|
|
|
|
|
|
|
if (*hpet_boot_cfg & HPET_CFG_ENABLE)
|
|
|
|
hpet_writel(*hpet_boot_cfg, HPET_CFG);
|
2007-12-03 17:17:10 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
#ifdef CONFIG_HPET_EMULATE_RTC
|
|
|
|
|
|
|
|
/* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
|
|
|
|
* is enabled, we support RTC interrupt functionality in software.
|
|
|
|
* RTC has 3 kinds of interrupts:
|
|
|
|
* 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
|
|
|
|
* is updated
|
|
|
|
* 2) Alarm Interrupt - generate an interrupt at a specific time of day
|
|
|
|
* 3) Periodic Interrupt - generate periodic interrupt, with frequencies
|
|
|
|
* 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
|
|
|
|
* (1) and (2) above are implemented using polling at a frequency of
|
|
|
|
* 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
|
|
|
|
* overhead. (DEFAULT_RTC_INT_FREQ)
|
|
|
|
* For (3), we use interrupts at 64Hz or user specified periodic
|
|
|
|
* frequency, whichever is higher.
|
|
|
|
*/
|
|
|
|
#include <linux/mc146818rtc.h>
|
|
|
|
#include <linux/rtc.h>
|
2008-01-30 13:33:28 +01:00
|
|
|
#include <asm/rtc.h>
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
#define DEFAULT_RTC_INT_FREQ 64
|
|
|
|
#define DEFAULT_RTC_SHIFT 6
|
|
|
|
#define RTC_NUM_INTS 1
|
|
|
|
|
|
|
|
static unsigned long hpet_rtc_flags;
|
2008-07-24 06:30:47 +02:00
|
|
|
static int hpet_prev_update_sec;
|
2007-02-16 10:28:04 +01:00
|
|
|
static struct rtc_time hpet_alarm_time;
|
|
|
|
static unsigned long hpet_pie_count;
|
2009-02-04 11:40:31 +01:00
|
|
|
static u32 hpet_t1_cmp;
|
2009-08-19 09:44:24 +02:00
|
|
|
static u32 hpet_default_delta;
|
|
|
|
static u32 hpet_pie_delta;
|
2007-02-16 10:28:04 +01:00
|
|
|
static unsigned long hpet_pie_limit;
|
|
|
|
|
2008-01-30 13:33:28 +01:00
|
|
|
static rtc_irq_handler irq_handler;
|
|
|
|
|
2009-02-04 11:40:31 +01:00
|
|
|
/*
|
|
|
|
* Check that the hpet counter c1 is ahead of the c2
|
|
|
|
*/
|
|
|
|
static inline int hpet_cnt_ahead(u32 c1, u32 c2)
|
|
|
|
{
|
|
|
|
return (s32)(c2 - c1) < 0;
|
|
|
|
}
|
|
|
|
|
2008-01-30 13:33:28 +01:00
|
|
|
/*
|
|
|
|
* Registers a IRQ handler.
|
|
|
|
*/
|
|
|
|
int hpet_register_irq_handler(rtc_irq_handler handler)
|
|
|
|
{
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return -ENODEV;
|
|
|
|
if (irq_handler)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
irq_handler = handler;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Deregisters the IRQ handler registered with hpet_register_irq_handler()
|
|
|
|
* and does cleanup.
|
|
|
|
*/
|
|
|
|
void hpet_unregister_irq_handler(rtc_irq_handler handler)
|
|
|
|
{
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return;
|
|
|
|
|
|
|
|
irq_handler = NULL;
|
|
|
|
hpet_rtc_flags = 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
/*
|
|
|
|
* Timer 1 for RTC emulation. We use one shot mode, as periodic mode
|
|
|
|
* is not supported by all HPET implementations for timer 1.
|
|
|
|
*
|
|
|
|
* hpet_rtc_timer_init() is called when the rtc is initialized.
|
|
|
|
*/
|
|
|
|
int hpet_rtc_timer_init(void)
|
|
|
|
{
|
2009-08-19 09:44:24 +02:00
|
|
|
unsigned int cfg, cnt, delta;
|
|
|
|
unsigned long flags;
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (!hpet_default_delta) {
|
|
|
|
uint64_t clc;
|
|
|
|
|
|
|
|
clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
|
|
|
|
clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
|
2009-08-19 09:44:24 +02:00
|
|
|
hpet_default_delta = clc;
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
|
|
|
|
delta = hpet_default_delta;
|
|
|
|
else
|
|
|
|
delta = hpet_pie_delta;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
|
|
|
cnt = delta + hpet_readl(HPET_COUNTER);
|
|
|
|
hpet_writel(cnt, HPET_T1_CMP);
|
|
|
|
hpet_t1_cmp = cnt;
|
|
|
|
|
|
|
|
cfg = hpet_readl(HPET_T1_CFG);
|
|
|
|
cfg &= ~HPET_TN_PERIODIC;
|
|
|
|
cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
|
|
|
|
hpet_writel(cfg, HPET_T1_CFG);
|
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
2011-11-18 16:33:06 +01:00
|
|
|
static void hpet_disable_rtc_channel(void)
|
|
|
|
{
|
|
|
|
unsigned long cfg;
|
|
|
|
cfg = hpet_readl(HPET_T1_CFG);
|
|
|
|
cfg &= ~HPET_TN_ENABLE;
|
|
|
|
hpet_writel(cfg, HPET_T1_CFG);
|
|
|
|
}
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
/*
|
|
|
|
* The functions below are called from rtc driver.
|
|
|
|
* Return 0 if HPET is not being used.
|
|
|
|
* Otherwise do the necessary changes and return 1.
|
|
|
|
*/
|
|
|
|
int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
|
|
|
|
{
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
hpet_rtc_flags &= ~bit_mask;
|
2011-11-18 16:33:06 +01:00
|
|
|
if (unlikely(!hpet_rtc_flags))
|
|
|
|
hpet_disable_rtc_channel();
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
return 1;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
int hpet_set_rtc_irq_bit(unsigned long bit_mask)
|
|
|
|
{
|
|
|
|
unsigned long oldbits = hpet_rtc_flags;
|
|
|
|
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
hpet_rtc_flags |= bit_mask;
|
|
|
|
|
2008-07-24 06:30:47 +02:00
|
|
|
if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
|
|
|
|
hpet_prev_update_sec = -1;
|
|
|
|
|
2007-02-16 10:28:04 +01:00
|
|
|
if (!oldbits)
|
|
|
|
hpet_rtc_timer_init();
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
|
|
|
|
unsigned char sec)
|
|
|
|
{
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
hpet_alarm_time.tm_hour = hrs;
|
|
|
|
hpet_alarm_time.tm_min = min;
|
|
|
|
hpet_alarm_time.tm_sec = sec;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
int hpet_set_periodic_freq(unsigned long freq)
|
|
|
|
{
|
|
|
|
uint64_t clc;
|
|
|
|
|
|
|
|
if (!is_hpet_enabled())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (freq <= DEFAULT_RTC_INT_FREQ)
|
|
|
|
hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
|
|
|
|
else {
|
|
|
|
clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
|
|
|
|
do_div(clc, freq);
|
|
|
|
clc >>= hpet_clockevent.shift;
|
2009-08-19 09:44:24 +02:00
|
|
|
hpet_pie_delta = clc;
|
x86, hpet: Fix bug in RTC emulation
We think there exists a bug in the HPET code that emulates the RTC.
In the normal case, when the RTC frequency is set, the rtc driver tells
the hpet code about it here:
int hpet_set_periodic_freq(unsigned long freq)
{
uint64_t clc;
if (!is_hpet_enabled())
return 0;
if (freq <= DEFAULT_RTC_INT_FREQ)
hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
else {
clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
do_div(clc, freq);
clc >>= hpet_clockevent.shift;
hpet_pie_delta = (unsigned long) clc;
}
return 1;
}
If freq is set to 64Hz (DEFAULT_RTC_INT_FREQ) or lower, then
hpet_pie_limit (a static) is set to non-zero. Then, on every one-shot
HPET interrupt, hpet_rtc_timer_reinit is called to compute the next
timeout. Well, that function has this logic:
if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
delta = hpet_default_delta;
else
delta = hpet_pie_delta;
Since hpet_pie_limit is not 0, hpet_default_delta is used. That
corresponds to 64Hz.
Now, if you set a different rtc frequency, you'll take the else path
through hpet_set_periodic_freq, but unfortunately no one resets
hpet_pie_limit back to 0.
Boom....now you are stuck with 64Hz RTC interrupts forever.
The patch below just resets the hpet_pie_limit value when requested freq
is greater than DEFAULT_RTC_INT_FREQ, which we think fixes this problem.
Signed-off-by: Alok N Kataria <akataria@vmware.com>
LKML-Reference: <201003112200.o2BM0Hre012875@imap1.linux-foundation.org>
Signed-off-by: Daniel Hecht <dhecht@vmware.com>
Cc: Venkatesh Pallipadi <venkatesh.pallipadi@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-03-11 23:00:16 +01:00
|
|
|
hpet_pie_limit = 0;
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
int hpet_rtc_dropped_irq(void)
|
|
|
|
{
|
|
|
|
return is_hpet_enabled();
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
static void hpet_rtc_timer_reinit(void)
|
|
|
|
{
|
2011-11-18 16:33:06 +01:00
|
|
|
unsigned int delta;
|
2007-02-16 10:28:04 +01:00
|
|
|
int lost_ints = -1;
|
|
|
|
|
2011-11-18 16:33:06 +01:00
|
|
|
if (unlikely(!hpet_rtc_flags))
|
|
|
|
hpet_disable_rtc_channel();
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
|
|
|
|
delta = hpet_default_delta;
|
|
|
|
else
|
|
|
|
delta = hpet_pie_delta;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Increment the comparator value until we are ahead of the
|
|
|
|
* current count.
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
hpet_t1_cmp += delta;
|
|
|
|
hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
|
|
|
|
lost_ints++;
|
2009-02-04 11:40:31 +01:00
|
|
|
} while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
if (lost_ints) {
|
|
|
|
if (hpet_rtc_flags & RTC_PIE)
|
|
|
|
hpet_pie_count += lost_ints;
|
|
|
|
if (printk_ratelimit())
|
2008-07-24 06:30:47 +02:00
|
|
|
printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
|
2007-02-16 10:28:04 +01:00
|
|
|
lost_ints);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct rtc_time curr_time;
|
|
|
|
unsigned long rtc_int_flag = 0;
|
|
|
|
|
|
|
|
hpet_rtc_timer_reinit();
|
2008-01-30 13:33:28 +01:00
|
|
|
memset(&curr_time, 0, sizeof(struct rtc_time));
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
|
2008-01-30 13:33:28 +01:00
|
|
|
get_rtc_time(&curr_time);
|
2007-02-16 10:28:04 +01:00
|
|
|
|
|
|
|
if (hpet_rtc_flags & RTC_UIE &&
|
|
|
|
curr_time.tm_sec != hpet_prev_update_sec) {
|
2008-07-24 06:30:47 +02:00
|
|
|
if (hpet_prev_update_sec >= 0)
|
|
|
|
rtc_int_flag = RTC_UF;
|
2007-02-16 10:28:04 +01:00
|
|
|
hpet_prev_update_sec = curr_time.tm_sec;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (hpet_rtc_flags & RTC_PIE &&
|
|
|
|
++hpet_pie_count >= hpet_pie_limit) {
|
|
|
|
rtc_int_flag |= RTC_PF;
|
|
|
|
hpet_pie_count = 0;
|
|
|
|
}
|
|
|
|
|
2008-01-15 16:44:38 +01:00
|
|
|
if (hpet_rtc_flags & RTC_AIE &&
|
2007-02-16 10:28:04 +01:00
|
|
|
(curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
|
|
|
|
(curr_time.tm_min == hpet_alarm_time.tm_min) &&
|
|
|
|
(curr_time.tm_hour == hpet_alarm_time.tm_hour))
|
|
|
|
rtc_int_flag |= RTC_AF;
|
|
|
|
|
|
|
|
if (rtc_int_flag) {
|
|
|
|
rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
|
2008-01-30 13:33:28 +01:00
|
|
|
if (irq_handler)
|
|
|
|
irq_handler(rtc_int_flag, dev_id);
|
2007-02-16 10:28:04 +01:00
|
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
2008-01-30 13:33:28 +01:00
|
|
|
EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
|
2007-02-16 10:28:04 +01:00
|
|
|
#endif
|