2005-04-17 00:20:36 +02:00
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#
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# Makefile for the PCI bus specific drivers.
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#
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2012-04-03 03:31:53 +02:00
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obj-y += access.o bus.o probe.o host-bridge.o remove.o pci.o \
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2008-08-03 20:02:12 +02:00
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pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
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PCI: Add Virtual Channel to save/restore support
While we don't really have any infrastructure for making use of VC
support, the system BIOS can configure the topology to non-default
VC values prior to boot. This may be due to silicon bugs, desire to
reserve traffic classes, or perhaps just BIOS bugs. When we reset
devices, the VC configuration may return to default values, which can
be incompatible with devices upstream. For instance, Nvidia GRID
cards provide a PCIe switch and some number of GPUs, all supporting
VC. The power-on default for VC is to support TC0-7 across VC0,
however some platforms will only enable TC0/VC0 mapping across the
topology. When we do a secondary bus reset on the downstream switch
port, the GPU is reset to a TC0-7/VC0 mapping while the opposite end
of the link only enables TC0/VC0. If the GPU attempts to use TC1-7,
it fails.
This patch attempts to provide complete support for VC save/restore,
even beyond the minimally required use case above. This includes
save/restore and reload of the arbitration table, save/restore and
reload of the port arbitration tables, and re-enabling of the
channels for VC, VC9, and MFVC capabilities.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-18 00:43:51 +01:00
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irq.o vpd.o setup-bus.o vc.o
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2005-04-17 00:20:36 +02:00
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obj-$(CONFIG_PROC_FS) += proc.o
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2009-06-18 03:03:57 +02:00
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obj-$(CONFIG_SYSFS) += slot.o
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2005-04-17 00:20:36 +02:00
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2010-01-02 22:57:24 +01:00
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obj-$(CONFIG_PCI_QUIRKS) += quirks.o
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2009-07-24 11:41:15 +02:00
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2005-12-16 20:08:48 +01:00
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# Build PCI Express stuff if needed
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obj-$(CONFIG_PCIEPORTBUS) += pcie/
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2005-04-17 00:20:36 +02:00
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# Build the PCI Hotplug drivers if we were asked to
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obj-$(CONFIG_HOTPLUG_PCI) += hotplug/
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2008-02-02 22:32:23 +01:00
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ifdef CONFIG_HOTPLUG_PCI
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obj-y += hotplug-pci.o
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endif
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2005-04-17 00:20:36 +02:00
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2006-10-04 11:17:00 +02:00
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# Build the PCI MSI interrupt support
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obj-$(CONFIG_PCI_MSI) += msi.o
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2006-10-04 11:17:01 +02:00
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# Build the Hypertransport interrupt support
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obj-$(CONFIG_HT_IRQ) += htirq.o
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2011-09-27 15:57:13 +02:00
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obj-$(CONFIG_PCI_ATS) += ats.o
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2009-03-20 04:25:11 +01:00
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obj-$(CONFIG_PCI_IOV) += iov.o
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2005-04-17 00:20:36 +02:00
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#
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# Some architectures use the generic PCI setup functions
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#
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2014-02-03 18:38:36 +01:00
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obj-$(CONFIG_ALPHA) += setup-irq.o
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obj-$(CONFIG_ARM) += setup-irq.o
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obj-$(CONFIG_UNICORE32) += setup-irq.o
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obj-$(CONFIG_SUPERH) += setup-irq.o
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obj-$(CONFIG_MIPS) += setup-irq.o
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obj-$(CONFIG_TILE) += setup-irq.o
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obj-$(CONFIG_SPARC_LEON) += setup-irq.o
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obj-$(CONFIG_M68K) += setup-irq.o
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2006-04-11 04:17:48 +02:00
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2005-04-17 00:20:36 +02:00
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#
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# ACPI Related PCI FW Functions
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2011-03-02 18:04:17 +01:00
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# ACPI _DSM provided firmware instance and string name
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2005-04-17 00:20:36 +02:00
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#
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2011-03-29 18:45:57 +02:00
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obj-$(CONFIG_ACPI) += pci-acpi.o
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2005-04-17 00:20:36 +02:00
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2010-07-26 12:56:50 +02:00
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# SMBIOS provided firmware instance and labels
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2011-03-29 18:45:57 +02:00
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obj-$(CONFIG_PCI_LABEL) += pci-label.o
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2010-07-26 12:56:50 +02:00
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2007-07-10 18:54:40 +02:00
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obj-$(CONFIG_PCI_SYSCALL) += syscall.o
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2005-04-17 00:20:36 +02:00
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2008-11-26 06:17:13 +01:00
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obj-$(CONFIG_PCI_STUB) += pci-stub.o
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2010-08-03 03:31:05 +02:00
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obj-$(CONFIG_XEN_PCIDEV_FRONTEND) += xen-pcifront.o
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2011-04-11 03:37:07 +02:00
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obj-$(CONFIG_OF) += of.o
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2010-09-24 21:17:26 +02:00
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ccflags-$(CONFIG_PCI_DEBUG) := -DDEBUG
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pci: PCIe driver for Marvell Armada 370/XP systems
This driver implements the support for the PCIe interfaces on the
Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to
cover earlier families of Marvell SoCs, such as Dove, Orion and
Kirkwood.
The driver implements the hw_pci operations needed by the core ARM PCI
code to setup PCI devices and get their corresponding IRQs, and the
pci_ops operations that are used by the PCI core to read/write the
configuration space of PCI devices.
Since the PCIe interfaces of Marvell SoCs are completely separate and
not linked together in a bus, this driver sets up an emulated PCI host
bridge, with one PCI-to-PCI bridge as child for each hardware PCIe
interface.
In addition, this driver enumerates the different PCIe slots, and for
those having a device plugged in, it sets up the necessary address
decoding windows, using the mvebu-mbus driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-16 17:55:22 +02:00
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# PCI host controller drivers
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obj-y += host/
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