2010-06-15 08:05:19 +02:00
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/*
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* HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
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* using the CPU's debug registers. Derived from
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* "arch/x86/kernel/hw_breakpoint.c"
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright 2010 IBM Corporation
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* Author: K.Prasad <prasad@linux.vnet.ibm.com>
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*
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*/
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#include <linux/hw_breakpoint.h>
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#include <linux/notifier.h>
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#include <linux/kprobes.h>
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#include <linux/percpu.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <asm/hw_breakpoint.h>
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#include <asm/processor.h>
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#include <asm/sstep.h>
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2016-12-24 20:46:01 +01:00
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#include <linux/uaccess.h>
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2010-06-15 08:05:19 +02:00
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/*
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* Stores the breakpoints currently in use on each breakpoint address
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* register for every cpu
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*/
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static DEFINE_PER_CPU(struct perf_event *, bp_per_reg);
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2010-06-29 04:50:32 +02:00
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/*
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* Returns total number of data or instruction breakpoints available.
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*/
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int hw_breakpoint_slots(int type)
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{
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if (type == TYPE_DATA)
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return HBP_NUM;
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return 0; /* no instruction breakpoints available */
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}
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2010-06-15 08:05:19 +02:00
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/*
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* Install a perf counter breakpoint.
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*
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* We seek a free debug address register and use it for this
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* breakpoint.
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*
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* Atomic: we hold the counter->ctx->lock and we only handle variables
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* and registers local to this cpu.
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*/
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int arch_install_hw_breakpoint(struct perf_event *bp)
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{
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struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 22:23:25 +02:00
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struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
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2010-06-15 08:05:19 +02:00
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*slot = bp;
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/*
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* Do not install DABR values if the instruction must be single-stepped.
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* If so, DABR will be populated in single_step_dabr_instruction().
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*/
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if (current->thread.last_hit_ubp != bp)
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2014-04-29 21:25:17 +02:00
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__set_breakpoint(info);
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2010-06-15 08:05:19 +02:00
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return 0;
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}
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/*
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* Uninstall the breakpoint contained in the given counter.
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*
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* First we search the debug address register it uses and then we disable
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* it.
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*
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* Atomic: we hold the counter->ctx->lock and we only handle variables
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* and registers local to this cpu.
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*/
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void arch_uninstall_hw_breakpoint(struct perf_event *bp)
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{
|
powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 22:23:25 +02:00
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struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
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2010-06-15 08:05:19 +02:00
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if (*slot != bp) {
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WARN_ONCE(1, "Can't find the breakpoint");
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return;
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}
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*slot = NULL;
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2012-12-20 15:06:44 +01:00
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hw_breakpoint_disable();
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2010-06-15 08:05:19 +02:00
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}
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/*
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* Perform cleanup of arch-specific counters during unregistration
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* of the perf-event
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*/
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void arch_unregister_hw_breakpoint(struct perf_event *bp)
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{
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/*
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* If the breakpoint is unregistered between a hw_breakpoint_handler()
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* and the single_step_dabr_instruction(), then cleanup the breakpoint
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* restoration variables to prevent dangling pointers.
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2016-03-02 10:55:17 +01:00
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* FIXME, this should not be using bp->ctx at all! Sayeth peterz.
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2010-06-15 08:05:19 +02:00
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*/
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2016-03-02 10:55:17 +01:00
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if (bp->ctx && bp->ctx->task && bp->ctx->task != ((void *)-1L))
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2010-06-15 08:05:19 +02:00
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bp->ctx->task->thread.last_hit_ubp = NULL;
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}
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/*
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* Check for virtual address in kernel space.
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*/
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int arch_check_bp_in_kernelspace(struct perf_event *bp)
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{
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struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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return is_kernel_addr(info->address);
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}
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int arch_bp_generic_fields(int type, int *gen_bp_type)
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{
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2012-12-20 15:06:44 +01:00
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*gen_bp_type = 0;
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if (type & HW_BRK_TYPE_READ)
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*gen_bp_type |= HW_BREAKPOINT_R;
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if (type & HW_BRK_TYPE_WRITE)
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*gen_bp_type |= HW_BREAKPOINT_W;
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if (*gen_bp_type == 0)
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2010-06-15 08:05:19 +02:00
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return -EINVAL;
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return 0;
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}
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/*
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* Validate the arch-specific HW Breakpoint register settings
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*/
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int arch_validate_hwbkpt_settings(struct perf_event *bp)
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{
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2013-01-24 16:02:59 +01:00
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int ret = -EINVAL, length_max;
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2010-06-15 08:05:19 +02:00
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struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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if (!bp)
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return ret;
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2012-12-20 15:06:44 +01:00
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info->type = HW_BRK_TYPE_TRANSLATE;
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if (bp->attr.bp_type & HW_BREAKPOINT_R)
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info->type |= HW_BRK_TYPE_READ;
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if (bp->attr.bp_type & HW_BREAKPOINT_W)
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info->type |= HW_BRK_TYPE_WRITE;
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if (info->type == HW_BRK_TYPE_TRANSLATE)
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/* must set alteast read or write */
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2010-06-15 08:05:19 +02:00
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return ret;
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2012-12-20 15:06:44 +01:00
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if (!(bp->attr.exclude_user))
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info->type |= HW_BRK_TYPE_USER;
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if (!(bp->attr.exclude_kernel))
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info->type |= HW_BRK_TYPE_KERNEL;
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if (!(bp->attr.exclude_hv))
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info->type |= HW_BRK_TYPE_HYP;
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2010-06-15 08:05:19 +02:00
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info->address = bp->attr.bp_addr;
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info->len = bp->attr.bp_len;
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/*
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* Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8)
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* and breakpoint addresses are aligned to nearest double-word
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* HW_BREAKPOINT_ALIGN by rounding off to the lower address, the
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* 'symbolsize' should satisfy the check below.
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*/
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2013-01-24 16:02:59 +01:00
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length_max = 8; /* DABR */
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if (cpu_has_feature(CPU_FTR_DAWR)) {
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length_max = 512 ; /* 64 doublewords */
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/* DAWR region can't cross 512 boundary */
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if ((bp->attr.bp_addr >> 10) !=
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2013-07-01 06:19:50 +02:00
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((bp->attr.bp_addr + bp->attr.bp_len - 1) >> 10))
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2013-01-24 16:02:59 +01:00
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return -EINVAL;
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}
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2010-06-15 08:05:19 +02:00
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if (info->len >
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2013-01-24 16:02:59 +01:00
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(length_max - (info->address & HW_BREAKPOINT_ALIGN)))
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2010-06-15 08:05:19 +02:00
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return -EINVAL;
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return 0;
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}
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2010-06-15 08:05:41 +02:00
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/*
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* Restores the breakpoint on the debug registers.
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* Invoke this function if it is known that the execution context is
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* about to change to cause loss of MSR_SE settings.
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*/
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void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
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{
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struct arch_hw_breakpoint *info;
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if (likely(!tsk->thread.last_hit_ubp))
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return;
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info = counter_arch_bp(tsk->thread.last_hit_ubp);
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regs->msr &= ~MSR_SE;
|
2014-04-29 21:25:17 +02:00
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__set_breakpoint(info);
|
2010-06-15 08:05:41 +02:00
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tsk->thread.last_hit_ubp = NULL;
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}
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2010-06-15 08:05:19 +02:00
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/*
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* Handle debug exception notifications.
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*/
|
2016-09-16 12:48:08 +02:00
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int hw_breakpoint_handler(struct die_args *args)
|
2010-06-15 08:05:19 +02:00
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{
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int rc = NOTIFY_STOP;
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struct perf_event *bp;
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struct pt_regs *regs = args->regs;
|
powerpc/8xx: Implement hw_breakpoint
This patch implements HW breakpoint on the 8xx. The 8xx has
capability to manage HW breakpoints, which is slightly different
than BOOK3S:
1/ The breakpoint match doesn't trigger a DSI exception but a
dedicated data breakpoint exception.
2/ The breakpoint happens after the instruction has completed,
no need to single step or emulate the instruction,
3/ Matched address is not set in DAR but in BAR,
4/ DABR register doesn't exist, instead we have registers
LCTRL1, LCTRL2 and CMPx registers,
5/ The match on one comparator is not on a double word but
on a single word.
The patch does:
1/ Prepare the dedicated registers in call to __set_dabr(). In order
to emulate the double word handling of BOOK3S, comparator E is set to
DABR address value and comparator F to address + 4. Then breakpoint 1
is set to match comparator E or F,
2/ Skip the singlestepping stage when compiled for CONFIG_PPC_8xx,
3/ Implement the exception. In that exception, the matched address
is taken from SPRN_BAR and manage as if it was from SPRN_DAR.
4/ I/D TLB error exception routines perform a tlbie on bad TLBs. That
tlbie triggers the breakpoint exception when performed on the
breakpoint address. For this reason, the routine returns if the match
is from one of those two tlbie.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-11-29 09:52:15 +01:00
|
|
|
#ifndef CONFIG_PPC_8xx
|
2010-06-15 08:05:19 +02:00
|
|
|
int stepped = 1;
|
|
|
|
unsigned int instr;
|
powerpc/8xx: Implement hw_breakpoint
This patch implements HW breakpoint on the 8xx. The 8xx has
capability to manage HW breakpoints, which is slightly different
than BOOK3S:
1/ The breakpoint match doesn't trigger a DSI exception but a
dedicated data breakpoint exception.
2/ The breakpoint happens after the instruction has completed,
no need to single step or emulate the instruction,
3/ Matched address is not set in DAR but in BAR,
4/ DABR register doesn't exist, instead we have registers
LCTRL1, LCTRL2 and CMPx registers,
5/ The match on one comparator is not on a double word but
on a single word.
The patch does:
1/ Prepare the dedicated registers in call to __set_dabr(). In order
to emulate the double word handling of BOOK3S, comparator E is set to
DABR address value and comparator F to address + 4. Then breakpoint 1
is set to match comparator E or F,
2/ Skip the singlestepping stage when compiled for CONFIG_PPC_8xx,
3/ Implement the exception. In that exception, the matched address
is taken from SPRN_BAR and manage as if it was from SPRN_DAR.
4/ I/D TLB error exception routines perform a tlbie on bad TLBs. That
tlbie triggers the breakpoint exception when performed on the
breakpoint address. For this reason, the routine returns if the match
is from one of those two tlbie.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-11-29 09:52:15 +01:00
|
|
|
#endif
|
|
|
|
struct arch_hw_breakpoint *info;
|
2010-06-15 08:06:12 +02:00
|
|
|
unsigned long dar = regs->dar;
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
/* Disable breakpoints during exception handling */
|
2012-12-20 15:06:44 +01:00
|
|
|
hw_breakpoint_disable();
|
2010-06-23 07:42:43 +02:00
|
|
|
|
2010-06-15 08:05:19 +02:00
|
|
|
/*
|
|
|
|
* The counter may be concurrently released but that can only
|
|
|
|
* occur from a call_rcu() path. We can then safely fetch
|
|
|
|
* the breakpoint, use its callback, touch its counter
|
|
|
|
* while we are in an rcu_read_lock() path.
|
|
|
|
*/
|
|
|
|
rcu_read_lock();
|
|
|
|
|
powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 22:23:25 +02:00
|
|
|
bp = __this_cpu_read(bp_per_reg);
|
2016-11-22 10:25:59 +01:00
|
|
|
if (!bp) {
|
|
|
|
rc = NOTIFY_DONE;
|
2010-06-15 08:05:19 +02:00
|
|
|
goto out;
|
2016-11-22 10:25:59 +01:00
|
|
|
}
|
2010-06-15 08:05:19 +02:00
|
|
|
info = counter_arch_bp(bp);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return early after invoking user-callback function without restoring
|
|
|
|
* DABR if the breakpoint is from ptrace which always operates in
|
|
|
|
* one-shot mode. The ptrace-ed process will receive the SIGTRAP signal
|
|
|
|
* generated in do_dabr().
|
|
|
|
*/
|
2010-06-23 07:42:43 +02:00
|
|
|
if (bp->overflow_handler == ptrace_triggered) {
|
2010-06-15 08:05:19 +02:00
|
|
|
perf_bp_event(bp, regs);
|
|
|
|
rc = NOTIFY_DONE;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2010-06-15 08:06:12 +02:00
|
|
|
/*
|
|
|
|
* Verify if dar lies within the address range occupied by the symbol
|
2010-06-23 07:42:43 +02:00
|
|
|
* being watched to filter extraneous exceptions. If it doesn't,
|
|
|
|
* we still need to single-step the instruction, but we don't
|
|
|
|
* generate an event.
|
2010-06-15 08:06:12 +02:00
|
|
|
*/
|
2013-06-24 07:47:23 +02:00
|
|
|
info->type &= ~HW_BRK_TYPE_EXTRANEOUS_IRQ;
|
2012-12-20 15:06:44 +01:00
|
|
|
if (!((bp->attr.bp_addr <= dar) &&
|
|
|
|
(dar - bp->attr.bp_addr < bp->attr.bp_len)))
|
|
|
|
info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
|
2010-06-15 08:06:12 +02:00
|
|
|
|
powerpc/8xx: Implement hw_breakpoint
This patch implements HW breakpoint on the 8xx. The 8xx has
capability to manage HW breakpoints, which is slightly different
than BOOK3S:
1/ The breakpoint match doesn't trigger a DSI exception but a
dedicated data breakpoint exception.
2/ The breakpoint happens after the instruction has completed,
no need to single step or emulate the instruction,
3/ Matched address is not set in DAR but in BAR,
4/ DABR register doesn't exist, instead we have registers
LCTRL1, LCTRL2 and CMPx registers,
5/ The match on one comparator is not on a double word but
on a single word.
The patch does:
1/ Prepare the dedicated registers in call to __set_dabr(). In order
to emulate the double word handling of BOOK3S, comparator E is set to
DABR address value and comparator F to address + 4. Then breakpoint 1
is set to match comparator E or F,
2/ Skip the singlestepping stage when compiled for CONFIG_PPC_8xx,
3/ Implement the exception. In that exception, the matched address
is taken from SPRN_BAR and manage as if it was from SPRN_DAR.
4/ I/D TLB error exception routines perform a tlbie on bad TLBs. That
tlbie triggers the breakpoint exception when performed on the
breakpoint address. For this reason, the routine returns if the match
is from one of those two tlbie.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-11-29 09:52:15 +01:00
|
|
|
#ifndef CONFIG_PPC_8xx
|
2010-06-15 08:05:19 +02:00
|
|
|
/* Do not emulate user-space instructions, instead single-step them */
|
|
|
|
if (user_mode(regs)) {
|
2012-08-22 22:30:43 +02:00
|
|
|
current->thread.last_hit_ubp = bp;
|
2010-06-15 08:05:19 +02:00
|
|
|
regs->msr |= MSR_SE;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
stepped = 0;
|
|
|
|
instr = 0;
|
|
|
|
if (!__get_user_inatomic(instr, (unsigned int *) regs->nip))
|
|
|
|
stepped = emulate_step(regs, instr);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* emulate_step() could not execute it. We've failed in reliably
|
|
|
|
* handling the hw-breakpoint. Unregister it and throw a warning
|
|
|
|
* message to let the user know about it.
|
|
|
|
*/
|
|
|
|
if (!stepped) {
|
|
|
|
WARN(1, "Unable to handle hardware breakpoint. Breakpoint at "
|
|
|
|
"0x%lx will be disabled.", info->address);
|
2016-10-26 11:48:24 +02:00
|
|
|
perf_event_disable_inatomic(bp);
|
2010-06-15 08:05:19 +02:00
|
|
|
goto out;
|
|
|
|
}
|
powerpc/8xx: Implement hw_breakpoint
This patch implements HW breakpoint on the 8xx. The 8xx has
capability to manage HW breakpoints, which is slightly different
than BOOK3S:
1/ The breakpoint match doesn't trigger a DSI exception but a
dedicated data breakpoint exception.
2/ The breakpoint happens after the instruction has completed,
no need to single step or emulate the instruction,
3/ Matched address is not set in DAR but in BAR,
4/ DABR register doesn't exist, instead we have registers
LCTRL1, LCTRL2 and CMPx registers,
5/ The match on one comparator is not on a double word but
on a single word.
The patch does:
1/ Prepare the dedicated registers in call to __set_dabr(). In order
to emulate the double word handling of BOOK3S, comparator E is set to
DABR address value and comparator F to address + 4. Then breakpoint 1
is set to match comparator E or F,
2/ Skip the singlestepping stage when compiled for CONFIG_PPC_8xx,
3/ Implement the exception. In that exception, the matched address
is taken from SPRN_BAR and manage as if it was from SPRN_DAR.
4/ I/D TLB error exception routines perform a tlbie on bad TLBs. That
tlbie triggers the breakpoint exception when performed on the
breakpoint address. For this reason, the routine returns if the match
is from one of those two tlbie.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-11-29 09:52:15 +01:00
|
|
|
#endif
|
2010-06-15 08:05:19 +02:00
|
|
|
/*
|
|
|
|
* As a policy, the callback is invoked in a 'trigger-after-execute'
|
|
|
|
* fashion
|
|
|
|
*/
|
2012-12-20 15:06:44 +01:00
|
|
|
if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
|
2010-06-15 08:06:12 +02:00
|
|
|
perf_bp_event(bp, regs);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
2014-04-29 21:25:17 +02:00
|
|
|
__set_breakpoint(info);
|
2010-06-15 08:05:19 +02:00
|
|
|
out:
|
|
|
|
rcu_read_unlock();
|
|
|
|
return rc;
|
|
|
|
}
|
2016-09-16 12:48:08 +02:00
|
|
|
NOKPROBE_SYMBOL(hw_breakpoint_handler);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle single-step exceptions following a DABR hit.
|
|
|
|
*/
|
2016-09-16 12:48:08 +02:00
|
|
|
static int single_step_dabr_instruction(struct die_args *args)
|
2010-06-15 08:05:19 +02:00
|
|
|
{
|
|
|
|
struct pt_regs *regs = args->regs;
|
|
|
|
struct perf_event *bp = NULL;
|
2012-09-05 21:17:48 +02:00
|
|
|
struct arch_hw_breakpoint *info;
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
bp = current->thread.last_hit_ubp;
|
|
|
|
/*
|
|
|
|
* Check if we are single-stepping as a result of a
|
|
|
|
* previous HW Breakpoint exception
|
|
|
|
*/
|
|
|
|
if (!bp)
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
|
2012-09-05 21:17:48 +02:00
|
|
|
info = counter_arch_bp(bp);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We shall invoke the user-defined callback function in the single
|
|
|
|
* stepping handler to confirm to 'trigger-after-execute' semantics
|
|
|
|
*/
|
2012-12-20 15:06:44 +01:00
|
|
|
if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
|
2010-06-15 08:06:12 +02:00
|
|
|
perf_bp_event(bp, regs);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
2014-04-29 21:25:17 +02:00
|
|
|
__set_breakpoint(info);
|
2010-06-23 07:46:55 +02:00
|
|
|
current->thread.last_hit_ubp = NULL;
|
|
|
|
|
2010-06-15 08:05:19 +02:00
|
|
|
/*
|
2010-06-23 07:46:55 +02:00
|
|
|
* If the process was being single-stepped by ptrace, let the
|
|
|
|
* other single-step actions occur (e.g. generate SIGTRAP).
|
2010-06-15 08:05:19 +02:00
|
|
|
*/
|
2010-06-23 07:46:55 +02:00
|
|
|
if (test_thread_flag(TIF_SINGLESTEP))
|
|
|
|
return NOTIFY_DONE;
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
return NOTIFY_STOP;
|
|
|
|
}
|
2016-09-16 12:48:08 +02:00
|
|
|
NOKPROBE_SYMBOL(single_step_dabr_instruction);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle debug exception notifications.
|
|
|
|
*/
|
2016-09-16 12:48:08 +02:00
|
|
|
int hw_breakpoint_exceptions_notify(
|
2010-06-15 08:05:19 +02:00
|
|
|
struct notifier_block *unused, unsigned long val, void *data)
|
|
|
|
{
|
|
|
|
int ret = NOTIFY_DONE;
|
|
|
|
|
|
|
|
switch (val) {
|
|
|
|
case DIE_DABR_MATCH:
|
|
|
|
ret = hw_breakpoint_handler(data);
|
|
|
|
break;
|
|
|
|
case DIE_SSTEP:
|
|
|
|
ret = single_step_dabr_instruction(data);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2016-09-16 12:48:08 +02:00
|
|
|
NOKPROBE_SYMBOL(hw_breakpoint_exceptions_notify);
|
2010-06-15 08:05:19 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Release the user breakpoints used by ptrace
|
|
|
|
*/
|
|
|
|
void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
|
|
|
|
{
|
|
|
|
struct thread_struct *t = &tsk->thread;
|
|
|
|
|
|
|
|
unregister_hw_breakpoint(t->ptrace_bps[0]);
|
|
|
|
t->ptrace_bps[0] = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void hw_breakpoint_pmu_read(struct perf_event *bp)
|
|
|
|
{
|
|
|
|
/* TODO */
|
|
|
|
}
|