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Renesas ARM Based SoC DT Updates for v4.8 

* Fix W=1 dtc warnings
 * Reverence both DMA controllers on R-Car Gen 2 SoCs
 * Remove nonexistent thermal sensor clock from r8a7794 SoC
 * Correct unit names for cpu nodes on r8a7790 SoC
 * Add MMCIF0 to r8a7793 SoC
 * RTS/CTS hardware flow control for kzm9g and bockw boards
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXV2oXAAoJENfPZGlqN0++ZFkP/2UYbeKnX5x/VPxk9pCMaurA
 3sfGMJ8ocfmAZP45a5DJQPo4gXSVr/jdsl2p8ZCCEVe2TMaotqbHpcF3YW6k25YW
 ZO/7PQCIj9aePy7J70+wNLnEdUNkyNniBPdF2PBbkhulE2rG7xRLh6kQHDBn5WaQ
 4FPwtBQhrhkGql+2TuSOUrQuQv6KnyjDr7gBTdAtAvRV2qpLoCo1ezFfEi5VhNZx
 WMHJs+Yjv1/jVyUf4MwVKgx/3tvhihLWM0UnQpdUpvoWQzPyq1bRGVLuqJek+fsY
 XqSv06j/Kd7f7n0XANGc8I5xQYDe2TLL/hl2KsaQVmaowtzk++xEH8kwfPD78fEo
 ob5wb+pSxXNwunFx/yM7ZdTgm6cThWW3apiePHEX/Y9wfGHv8hFQk6tzdAxD4f9e
 QplHyrxz+hzCLThjkALkv27VL5oAXTwga7IWxXzQ7CT8clUYKKsu2VK5g91PpaTc
 2rBRXgzR6HA0Qc0CZY40BE9gHn40VWv0lkAJHvAqsyXn2HCpl5YNQ+2t9GcN7j/w
 8sow9y/bPGqktXHODpLEqpQKAT0H5cWuC3ZBTnVm/tENlXtPW3MQfKwc/rSQ7kIQ
 zpP+18LfdQKlIVLwqM6qCEBjIfwAJsSsbZt4ZZPNkEdc7wEkR87BmDoiyAu3bNFp
 CPw33BEValbz0WDtoGo+
 =MXJf
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.8

* Fix W=1 dtc warnings
* Reverence both DMA controllers on R-Car Gen 2 SoCs
* Remove nonexistent thermal sensor clock from r8a7794 SoC
* Correct unit names for cpu nodes on r8a7790 SoC
* Add MMCIF0 to r8a7793 SoC
* RTS/CTS hardware flow control for kzm9g and bockw boards

* tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
  ARM: dts: silk: Fix W=1 dtc warnings
  ARM: dts: porter: Fix W=1 dtc warnings
  ARM: dts: marzen: Fix W=1 dtc warnings
  ARM: dts: lager: Fix W=1 dtc warnings
  ARM: dts: kzm9g: Fix W=1 dtc warnings
  ARM: dts: kzm9d: Fix W=1 dtc warnings
  ARM: dts: koelsch: Fix W=1 dtc warnings
  ARM: dts: gose: Fix W=1 dtc warnings
  ARM: dts: genmai: Fix W=1 dtc warnings
  ARM: dts: bockw: Fix W=1 dtc warnings
  ARM: dts: armadillo800eva: Fix W=1 dtc warnings
  ARM: dts: ape6evm: Fix W=1 dtc warnings
  ARM: dts: sh73a0: Fix W=1 dtc warnings
  ARM: dts: r8a7794: Fix W=1 dtc warnings
  ARM: dts: r8a7793: Fix W=1 dtc warnings
  ARM: dts: r8a7791: Fix W=1 dtc warnings
  ARM: dts: r8a7790: Fix W=1 dtc warnings
  ARM: dts: r8a7778: Fix W=1 dtc warnings
  ARM: dts: r8a7740: Fix W=1 dtc warnings
  ARM: dts: r8a73a4: Fix W=1 dtc warnings
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-06-13 15:37:25 -07:00
parent 95eb940c0e b6960f1967
commit 057b670df0
22 changed files with 564 additions and 431 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm/boot/dts/emev2-kzm9d.dts
View File

@ -18,7 +18,7 @@
model = "EMEV2 KZM9D Board";
compatible = "renesas,kzm9d", "renesas,emev2";
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x8000000>;
};
@ -33,28 +33,28 @@
#address-cells = <1>;
#size-cells = <0>;
button@1 {
one {
debounce_interval = <50>;
wakeup-source;
label = "DSW2-1";
linux,code = <KEY_1>;
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
};
button@2 {
two {
debounce_interval = <50>;
wakeup-source;
label = "DSW2-2";
linux,code = <KEY_2>;
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
button@3 {
three {
debounce_interval = <50>;
wakeup-source;
label = "DSW2-3";
linux,code = <KEY_3>;
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
};
button@4 {
four {
debounce_interval = <50>;
wakeup-source;
label = "DSW2-4";
@ -63,7 +63,7 @@
};
};
reg_1p8v: regulator@0 {
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
@ -72,7 +72,7 @@
regulator-boot-on;
};
reg_3p3v: regulator@1 {
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@ -104,7 +104,7 @@
};
&pfc {
uart1_pins: serial@e1030000 {
uart1_pins: uart1 {
groups = "uart1_ctrl", "uart1_data";
function = "uart1";
};

26
arch/arm/boot/dts/emev2.dtsi
View File

@ -69,25 +69,25 @@
clock-frequency = <32768>;
#clock-cells = <0>;
};
iic0_sclkdiv: iic0_sclkdiv {
iic0_sclkdiv: iic0_sclkdiv@624,0 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x624 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
iic0_sclk: iic0_sclk {
iic0_sclk: iic0_sclk@48c,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x48c 1>;
clocks = <&iic0_sclkdiv>;
#clock-cells = <0>;
};
iic1_sclkdiv: iic1_sclkdiv {
iic1_sclkdiv: iic1_sclkdiv@624,16 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x624 16>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
iic1_sclk: iic1_sclk {
iic1_sclk: iic1_sclk@490,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x490 1>;
clocks = <&iic1_sclkdiv>;
@ -100,55 +100,55 @@
clock-mult = <7000>;
#clock-cells = <0>;
};
usia_u0_sclkdiv: usia_u0_sclkdiv {
usia_u0_sclkdiv: usia_u0_sclkdiv@610,0 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x610 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u1_sclkdiv: usib_u1_sclkdiv {
usib_u1_sclkdiv: usib_u1_sclkdiv@65c,0 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x65c 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u2_sclkdiv: usib_u2_sclkdiv {
usib_u2_sclkdiv: usib_u2_sclkdiv@65c,16 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x65c 16>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usib_u3_sclkdiv: usib_u3_sclkdiv {
usib_u3_sclkdiv: usib_u3_sclkdiv@660,0 {
compatible = "renesas,emev2-smu-clkdiv";
reg = <0x660 0>;
clocks = <&pll3_fo>;
#clock-cells = <0>;
};
usia_u0_sclk: usia_u0_sclk {
usia_u0_sclk: usia_u0_sclk@4a0,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4a0 1>;
clocks = <&usia_u0_sclkdiv>;
#clock-cells = <0>;
};
usib_u1_sclk: usib_u1_sclk {
usib_u1_sclk: usib_u1_sclk@4b8,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4b8 1>;
clocks = <&usib_u1_sclkdiv>;
#clock-cells = <0>;
};
usib_u2_sclk: usib_u2_sclk {
usib_u2_sclk: usib_u2_sclk@4bc,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4bc 1>;
clocks = <&usib_u2_sclkdiv>;
#clock-cells = <0>;
};
usib_u3_sclk: usib_u3_sclk {
usib_u3_sclk: usib_u3_sclk@4c0,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x4c0 1>;
clocks = <&usib_u3_sclkdiv>;
#clock-cells = <0>;
};
sti_sclk: sti_sclk {
sti_sclk: sti_sclk@528,1 {
compatible = "renesas,emev2-smu-gclk";
reg = <0x528 1>;
clocks = <&c32ki>;

2
arch/arm/boot/dts/r7s72100-genmai.dts
View File

@ -25,7 +25,7 @@
stdout-path = &scif2;
};
memory {
memory@8000000 {
device_type = "memory";
reg = <0x08000000 0x08000000>;
};

8
arch/arm/boot/dts/r8a73a4-ape6evm.dts
View File

@ -36,7 +36,7 @@
reg = <2 0x00000000 0 0x40000000>;
};
vcc_mmc0: regulator@0 {
vcc_mmc0: regulator-mmc0 {
compatible = "regulator-fixed";
regulator-name = "MMC0 Vcc";
regulator-min-microvolt = <2800000>;
@ -44,7 +44,7 @@
regulator-always-on;
};
vcc_sdhi0: regulator@1 {
vcc_sdhi0: regulator-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -56,7 +56,7 @@
};
/* Common 1.8V and 3.3V rails, used by several devices on APE6EVM */
ape6evm_fixed_1v8: regulator@2 {
ape6evm_fixed_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "1V8";
regulator-min-microvolt = <1800000>;
@ -64,7 +64,7 @@
regulator-always-on;
};
ape6evm_fixed_3v3: regulator@3 {
ape6evm_fixed_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;

34
arch/arm/boot/dts/r8a73a4.dtsi
View File

@ -31,6 +31,24 @@
power-domains = <&pd_a2sl>;
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller@0 {
compatible = "cache";
reg = <0>;
clocks = <&cpg_clocks R8A73A4_CLK_Z>;
power-domains = <&pd_a3sm>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@100 {
compatible = "cache";
reg = <0x100>;
clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
power-domains = <&pd_a3km>;
cache-unified;
cache-level = <2>;
};
};
ptm {
@ -46,22 +64,6 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
L2_CA15: cache-controller@0 {
compatible = "cache";
clocks = <&cpg_clocks R8A73A4_CLK_Z>;
power-domains = <&pd_a3sm>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@1 {
compatible = "cache";
clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
power-domains = <&pd_a3km>;
cache-unified;
cache-level = <2>;
};
dbsc1: memory-controller@e6790000 {
compatible = "renesas,dbsc-r8a73a4";
reg = <0 0xe6790000 0 0x10000>;

12
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
View File

@ -28,12 +28,12 @@
stdout-path = &scifa1;
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
reg_3p3v: regulator@0 {
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@ -42,7 +42,7 @@
regulator-boot-on;
};
vcc_sdhi0: regulator@1 {
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -53,7 +53,7 @@
enable-active-high;
};
vccq_sdhi0: regulator@2 {
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
@ -69,7 +69,7 @@
enable-active-high;
};
reg_5p0v: regulator@3 {
reg_5p0v: regulator-5p0v {
compatible = "regulator-fixed";
regulator-name = "fixed-5.0V";
regulator-min-microvolt = <5000000>;
@ -127,7 +127,7 @@
};
};
i2c2: i2c@2 {
i2c2: i2c-2 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";

2
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -39,7 +39,7 @@
<0xc2000000 0x1000>;
};
L2: cache-controller {
L2: cache-controller@f0100000 {
compatible = "arm,pl310-cache";
reg = <0xf0100000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

5
arch/arm/boot/dts/r8a7778-bockw.dts
View File

@ -32,12 +32,12 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x10000000>;
};
fixedregulator3v3: fixedregulator@0 {
fixedregulator3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@ -223,6 +223,7 @@
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};

28
arch/arm/boot/dts/r8a7778.dtsi
View File

@ -276,23 +276,23 @@
status = "disabled";
rcar_sound,src {
src3: src@3 { };
src4: src@4 { };
src5: src@5 { };
src6: src@6 { };
src7: src@7 { };
src8: src@8 { };
src9: src@9 { };
src3: src-3 { };
src4: src-4 { };
src5: src-5 { };
src6: src-6 { };
src7: src-7 { };
src8: src-8 { };
src9: src-9 { };
};
rcar_sound,ssi {
ssi3: ssi@3 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
ssi4: ssi@4 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
ssi5: ssi@5 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi6: ssi@6 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi7: ssi@7 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi8: ssi@8 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi9: ssi@9 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi3: ssi-3 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
ssi4: ssi-4 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
ssi5: ssi-5 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi6: ssi-6 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi7: ssi-7 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi8: ssi-8 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
ssi9: ssi-9 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
};
};

4
arch/arm/boot/dts/r8a7779-marzen.dts
View File

@ -28,12 +28,12 @@
stdout-path = &scif2;
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};
fixedregulator3v3: fixedregulator@0 {
fixedregulator3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;

20
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -76,28 +76,28 @@
keyboard {
compatible = "gpio-keys";
button@1 {
one {
linux,code = <KEY_1>;
label = "SW2-1";
wakeup-source;
debounce-interval = <20>;
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
};
button@2 {
two {
linux,code = <KEY_2>;
label = "SW2-2";
wakeup-source;
debounce-interval = <20>;
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
};
button@3 {
three {
linux,code = <KEY_3>;
label = "SW2-3";
wakeup-source;
debounce-interval = <20>;
gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
};
button@4 {
four {
linux,code = <KEY_4>;
label = "SW2-4";
wakeup-source;
@ -119,7 +119,7 @@
};
};
fixedregulator3v3: fixedregulator@0 {
fixedregulator3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@ -128,7 +128,7 @@
regulator-always-on;
};
vcc_sdhi0: regulator@1 {
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -139,7 +139,7 @@
enable-active-high;
};
vccq_sdhi0: regulator@2 {
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
@ -152,7 +152,7 @@
1800000 0>;
};
vcc_sdhi2: regulator@3 {
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
@ -163,7 +163,7 @@
enable-active-high;
};
vccq_sdhi2: regulator@4 {
vccq_sdhi2: regulator-vccq-sdhi2 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";
@ -263,7 +263,7 @@
* instantiate the slave device at runtime according to the documentation.
* You can then communicate with the slave via IIC3.
*/
i2cexio: i2c@8 {
i2cexio: i2c-8 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic0>, <&i2c0>;
i2c-bus-name = "i2c-exio";

232
arch/arm/boot/dts/r8a7790.dtsi
View File

@ -92,7 +92,7 @@
next-level-cache = <&L2_CA15>;
};
cpu4: cpu@4 {
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
@ -101,7 +101,7 @@
next-level-cache = <&L2_CA7>;
};
cpu5: cpu@5 {
cpu5: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x101>;
@ -110,7 +110,7 @@
next-level-cache = <&L2_CA7>;
};
cpu6: cpu@6 {
cpu6: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x102>;
@ -119,7 +119,7 @@
next-level-cache = <&L2_CA7>;
};
cpu7: cpu@7 {
cpu7: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x103>;
@ -127,6 +127,22 @@
power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
next-level-cache = <&L2_CA7>;
};
L2_CA15: cache-controller@0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@100 {
compatible = "cache";
reg = <0x100>;
power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
};
thermal-zones {
@ -148,20 +164,6 @@
};
};
L2_CA15: cache-controller@0 {
compatible = "cache";
power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@1 {
compatible = "cache";
power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@ -517,8 +519,9 @@
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -530,8 +533,9 @@
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -543,8 +547,9 @@
reg = <0 0xe6520000 0 0x425>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
<&dmac1 0x69>, <&dmac1 0x6a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -556,8 +561,9 @@
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x77>, <&dmac0 0x78>,
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -567,8 +573,9 @@
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
reg-io-width = <4>;
status = "disabled";
@ -580,8 +587,9 @@
reg = <0 0xee220000 0 0x80>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
<&dmac1 0xe1>, <&dmac1 0xe2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
reg-io-width = <4>;
status = "disabled";
@ -598,8 +606,9 @@
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
@ -610,8 +619,9 @@
reg = <0 0xee120000 0 0x328>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
dmas = <&dmac1 0xc9>, <&dmac1 0xca>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
<&dmac1 0xc9>, <&dmac1 0xca>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
@ -622,8 +632,9 @@
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
@ -634,8 +645,9 @@
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
@ -648,8 +660,9 @@
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
clock-names = "fck";
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -661,8 +674,9 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
clock-names = "fck";
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -674,8 +688,9 @@
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -687,8 +702,9 @@
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -700,8 +716,9 @@
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -713,8 +730,9 @@
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -727,8 +745,9 @@
clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -741,8 +760,9 @@
clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -755,8 +775,9 @@
clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -769,8 +790,9 @@
clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -783,8 +805,9 @@
clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1469,8 +1492,9 @@
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
@ -1483,8 +1507,9 @@
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1496,8 +1521,9 @@
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1509,8 +1535,9 @@
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1522,8 +1549,9 @@
reg = <0 0xe6c90000 0 0x0064>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
dmas = <&dmac0 0x45>, <&dmac0 0x46>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x45>, <&dmac0 0x46>,
<&dmac1 0x45>, <&dmac1 0x46>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1702,79 +1730,79 @@
status = "disabled";
rcar_sound,dvc {
dvc0: dvc@0 {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc@1 {
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
};
};
rcar_sound,mix {
mix0: mix@0 { };
mix1: mix@1 { };
mix0: mix-0 { };
mix1: mix-1 { };
};
rcar_sound,ctu {
ctu00: ctu@0 { };
ctu01: ctu@1 { };
ctu02: ctu@2 { };
ctu03: ctu@3 { };
ctu10: ctu@4 { };
ctu11: ctu@5 { };
ctu12: ctu@6 { };
ctu13: ctu@7 { };
ctu00: ctu-0 { };
ctu01: ctu-1 { };
ctu02: ctu-2 { };
ctu03: ctu-3 { };
ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
};
rcar_sound,src {
src0: src@0 {
src0: src-0 {
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx";
};
src1: src@1 {
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src@2 {
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src@3 {
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src@4 {
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src@5 {
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src@6 {
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src@7 {
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src@8 {
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src@9 {
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
@ -1782,52 +1810,52 @@
};
rcar_sound,ssi {
ssi0: ssi@0 {
ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi@1 {
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi@2 {
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi@3 {
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi@4 {
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi@5 {
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi@6 {
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi@7 {
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi@8 {
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi@9 {
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";

12
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -170,7 +170,7 @@
};
};
vcc_sdhi0: regulator@0 {
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -181,7 +181,7 @@
enable-active-high;
};
vccq_sdhi0: regulator@1 {
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
@ -194,7 +194,7 @@
1800000 0>;
};
vcc_sdhi1: regulator@2 {
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
regulator-name = "SDHI1 Vcc";
@ -205,7 +205,7 @@
enable-active-high;
};
vccq_sdhi1: regulator@3 {
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";
@ -218,7 +218,7 @@
1800000 0>;
};
vcc_sdhi2: regulator@4 {
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
@ -229,7 +229,7 @@
enable-active-high;
};
vccq_sdhi2: regulator@5 {
vccq_sdhi2: regulator-vccq-sdhi2 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";

8
arch/arm/boot/dts/r8a7791-porter.dts
View File

@ -46,7 +46,7 @@
reg = <2 0x00000000 0 0x40000000>;
};
vcc_sdhi0: regulator@0 {
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -55,7 +55,7 @@
regulator-always-on;
};
vccq_sdhi0: regulator@1 {
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
@ -68,7 +68,7 @@
1800000 0>;
};
vcc_sdhi2: regulator@2 {
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
@ -77,7 +77,7 @@
regulator-always-on;
};
vccq_sdhi2: regulator@3 {
vccq_sdhi2: regulator-vccq-sdhi2 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";

224
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -72,6 +72,14 @@
power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller@0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
};
thermal-zones {
@ -93,13 +101,6 @@
};
};
L2_CA15: cache-controller@0 {
compatible = "cache";
power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@ -514,8 +515,9 @@
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x77>, <&dmac0 0x78>,
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -527,8 +529,9 @@
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -540,8 +543,9 @@
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -556,8 +560,9 @@
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
reg-io-width = <4>;
status = "disabled";
@ -569,8 +574,9 @@
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -580,8 +586,9 @@
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -591,8 +598,9 @@
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -604,8 +612,9 @@
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
clock-names = "fck";
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -617,8 +626,9 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
clock-names = "fck";
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -630,8 +640,9 @@
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -643,8 +654,9 @@
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -656,8 +668,9 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -669,8 +682,9 @@
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x23>, <&dmac0 0x24>,
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -682,8 +696,9 @@
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -695,8 +710,9 @@
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -708,8 +724,9 @@
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -722,8 +739,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -736,8 +754,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -750,8 +769,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -764,8 +784,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -778,8 +799,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -792,8 +814,9 @@
clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -806,8 +829,9 @@
clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -820,8 +844,9 @@
clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -834,8 +859,9 @@
clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1478,8 +1504,9 @@
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
@ -1492,8 +1519,9 @@
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1505,8 +1533,9 @@
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1518,8 +1547,9 @@
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -1737,79 +1767,79 @@
status = "disabled";
rcar_sound,dvc {
dvc0: dvc@0 {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc@1 {
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
};
};
rcar_sound,mix {
mix0: mix@0 { };
mix1: mix@1 { };
mix0: mix-0 { };
mix1: mix-1 { };
};
rcar_sound,ctu {
ctu00: ctu@0 { };
ctu01: ctu@1 { };
ctu02: ctu@2 { };
ctu03: ctu@3 { };
ctu10: ctu@4 { };
ctu11: ctu@5 { };
ctu12: ctu@6 { };
ctu13: ctu@7 { };
ctu00: ctu-0 { };
ctu01: ctu-1 { };
ctu02: ctu-2 { };
ctu03: ctu-3 { };
ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
};
rcar_sound,src {
src0: src@0 {
src0: src-0 {
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx";
};
src1: src@1 {
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src@2 {
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src@3 {
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src@4 {
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src@5 {
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src@6 {
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src@7 {
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src@8 {
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src@9 {
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
@ -1817,52 +1847,52 @@
};
rcar_sound,ssi {
ssi0: ssi@0 {
ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi@1 {
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi@2 {
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi@3 {
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi@4 {
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi@5 {
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi@6 {
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi@7 {
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi@8 {
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi@9 {
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";

12
arch/arm/boot/dts/r8a7793-gose.dts
View File

@ -158,7 +158,7 @@
};
};
vcc_sdhi0: regulator@0 {
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
@ -169,7 +169,7 @@
enable-active-high;
};
vccq_sdhi0: regulator@1 {
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
@ -182,7 +182,7 @@
1800000 0>;
};
vcc_sdhi1: regulator@2 {
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
regulator-name = "SDHI1 Vcc";
@ -193,7 +193,7 @@
enable-active-high;
};
vccq_sdhi1: regulator@3 {
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";
@ -206,7 +206,7 @@
1800000 0>;
};
vcc_sdhi2: regulator@4 {
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
@ -217,7 +217,7 @@
enable-active-high;
};
vccq_sdhi2: regulator@5 {
vccq_sdhi2: regulator-vccq-sdhi2 {
compatible = "regulator-gpio";
regulator-name = "SDHI2 VccQ";

198
arch/arm/boot/dts/r8a7793.dtsi
View File

@ -55,6 +55,14 @@
< 375000 1000000>;
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller@0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
};
thermal-zones {
@ -76,13 +84,6 @@
};
};
L2_CA15: cache-controller@0 {
compatible = "cache";
power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@ -473,8 +474,9 @@
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x77>, <&dmac0 0x78>,
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -486,8 +488,9 @@
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -499,8 +502,9 @@
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -515,8 +519,9 @@
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -526,8 +531,9 @@
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -537,12 +543,27 @@
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_MMCIF0>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa";
@ -550,8 +571,9 @@
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
clock-names = "fck";
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -563,8 +585,9 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
clock-names = "fck";
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -576,8 +599,9 @@
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -589,8 +613,9 @@
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -602,8 +627,9 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -615,8 +641,9 @@
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x23>, <&dmac0 0x24>,
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -628,8 +655,9 @@
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -641,8 +669,9 @@
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -654,8 +683,9 @@
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -668,8 +698,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -682,8 +713,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -696,8 +728,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -710,8 +743,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF3>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -724,8 +758,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF4>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -738,8 +773,9 @@
clocks = <&mstp7_clks R8A7793_CLK_SCIF5>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -752,8 +788,9 @@
clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -766,8 +803,9 @@
clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -780,8 +818,9 @@
clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled";
};
@ -803,8 +842,9 @@
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
@ -1330,63 +1370,63 @@
status = "disabled";
rcar_sound,dvc {
dvc0: dvc@0 {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc@1 {
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
};
};
rcar_sound,src {
src0: src@0 {
src0: src-0 {
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx";
};
src1: src@1 {
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src@2 {
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src@3 {
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src@4 {
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src@5 {
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src@6 {
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src@7 {
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src@8 {
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src@9 {
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
@ -1394,52 +1434,52 @@
};
rcar_sound,ssi {
ssi0: ssi@0 {
ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi@1 {
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi@2 {
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi@3 {
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi@4 {
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi@5 {
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi@6 {
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi@7 {
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi@8 {
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi@9 {
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";

6
arch/arm/boot/dts/r8a7794-silk.dts
View File

@ -32,7 +32,7 @@
reg = <0 0x40000000 0 0x40000000>;
};
d3_3v: regulator@0 {
d3_3v: regulator-d3-3v {
compatible = "regulator-fixed";
regulator-name = "D3.3V";
regulator-min-microvolt = <3300000>;
@ -41,7 +41,7 @@
regulator-always-on;
};
vcc_sdhi1: regulator@3 {
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
regulator-name = "SDHI1 Vcc";
@ -52,7 +52,7 @@
enable-active-high;
};
vccq_sdhi1: regulator@4 {
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";

132
arch/arm/boot/dts/r8a7794.dtsi
View File

@ -55,13 +55,14 @@
power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
};
};
L2_CA7: cache-controller@1 {
compatible = "cache";
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
L2_CA7: cache-controller@0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
};
gic: interrupt-controller@f1001000 {
@ -302,8 +303,9 @@
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>;
clock-names = "fck";
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -315,8 +317,9 @@
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>;
clock-names = "fck";
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -328,8 +331,9 @@
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>;
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -341,8 +345,9 @@
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>;
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -354,8 +359,9 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>;
clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -367,8 +373,9 @@
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>;
clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x23>, <&dmac0 0x24>,
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -380,8 +387,9 @@
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -393,8 +401,9 @@
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -406,8 +415,9 @@
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -420,8 +430,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -434,8 +445,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -448,8 +460,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -462,8 +475,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -476,8 +490,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -490,8 +505,9 @@
clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -504,8 +520,9 @@
clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -518,8 +535,9 @@
clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -532,8 +550,9 @@
clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -640,8 +659,9 @@
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -653,8 +673,9 @@
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
@ -666,8 +687,9 @@
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
dma-names = "tx", "rx";
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
reg-io-width = <4>;
status = "disabled";
@ -678,6 +700,9 @@
reg = <0 0xee100000 0 0x200>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -687,6 +712,9 @@
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -696,6 +724,9 @@
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@ -705,8 +736,9 @@
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>;
dma-names = "tx", "rx";
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;

11
arch/arm/boot/dts/sh73a0-kzm9g.dts
View File

@ -43,12 +43,12 @@
stdout-path = &scifa4;
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
reg_1p8v: regulator@0 {
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
@ -57,7 +57,7 @@
regulator-boot-on;
};
reg_3p3v: regulator@1 {
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@ -66,7 +66,7 @@
regulator-boot-on;
};
vmmc_sdhi0: regulator@2 {
vmmc_sdhi0: regulator-vmmc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
@ -75,7 +75,7 @@
enable-active-high;
};
vmmc_sdhi2: regulator@3 {
vmmc_sdhi2: regulator-vmmc-sdhi2 {
compatible = "regulator-fixed";
regulator-name = "SDHI2 Vcc";
regulator-min-microvolt = <3300000>;
@ -378,6 +378,7 @@
pinctrl-0 = <&scifa4_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};

2
arch/arm/boot/dts/sh73a0.dtsi
View File

@ -55,7 +55,7 @@
<0xf0000100 0x100>;
};
L2: cache-controller {
L2: cache-controller@f0100000 {
compatible = "arm,pl310-cache";
reg = <0xf0100000 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;

1
include/dt-bindings/clock/r8a7794-clock.h
View File

@ -67,7 +67,6 @@
#define R8A7794_CLK_IRQC 7
/* MSTP5 */
#define R8A7794_CLK_THERMAL 22
#define R8A7794_CLK_PWM 23
/* MSTP7 */