drm/vgaarb: add VGA arbitration support to the drm and kms.
VGA arb requires DRM support for non-kms drivers, to turn on/off irqs when disabling the mem/io regions. VGA arb requires KMS support for GPUs where we can turn off VGA decoding. Currently we know how to do this for intel and radeon kms drivers, which allows them to be removed from the arbiter. This patch comes from Fedora rawhide kernel. Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
aadd4e1745
commit
28d520433b
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@ -37,6 +37,7 @@
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/vgaarb.h>
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/**
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/**
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* Get interrupt from bus id.
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* Get interrupt from bus id.
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*
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*
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@ -171,6 +172,26 @@ err:
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}
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}
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EXPORT_SYMBOL(drm_vblank_init);
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EXPORT_SYMBOL(drm_vblank_init);
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static void drm_irq_vgaarb_nokms(void *cookie, bool state)
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{
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struct drm_device *dev = cookie;
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if (dev->driver->vgaarb_irq) {
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dev->driver->vgaarb_irq(dev, state);
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return;
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}
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if (!dev->irq_enabled)
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return;
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if (state)
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dev->driver->irq_uninstall(dev);
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else {
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dev->driver->irq_preinstall(dev);
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dev->driver->irq_postinstall(dev);
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}
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}
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/**
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/**
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* Install IRQ handler.
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* Install IRQ handler.
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*
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*
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@ -231,6 +252,9 @@ int drm_irq_install(struct drm_device *dev)
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return ret;
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return ret;
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}
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}
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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vga_client_register(dev->pdev, (void *)dev, drm_irq_vgaarb_nokms, NULL);
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/* After installing handler */
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/* After installing handler */
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ret = dev->driver->irq_postinstall(dev);
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ret = dev->driver->irq_postinstall(dev);
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if (ret < 0) {
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if (ret < 0) {
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@ -279,6 +303,9 @@ int drm_irq_uninstall(struct drm_device * dev)
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DRM_DEBUG("irq=%d\n", dev->pdev->irq);
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DRM_DEBUG("irq=%d\n", dev->pdev->irq);
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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dev->driver->irq_uninstall(dev);
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dev->driver->irq_uninstall(dev);
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free_irq(dev->pdev->irq, dev);
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free_irq(dev->pdev->irq, dev);
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@ -33,6 +33,7 @@
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#include "intel_drv.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "i915_drv.h"
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#include <linux/vgaarb.h>
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/* Really want an OS-independent resettable timer. Would like to have
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/* Really want an OS-independent resettable timer. Would like to have
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* this loop run for (eg) 3 sec, but have the timer reset every time
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* this loop run for (eg) 3 sec, but have the timer reset every time
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@ -1012,6 +1013,19 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
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return 0;
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return 0;
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}
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}
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/* true = enable decode, false = disable decoder */
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static unsigned int i915_vga_set_decode(void *cookie, bool state)
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{
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struct drm_device *dev = cookie;
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intel_modeset_vga_set_state(dev, state);
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if (state)
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return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
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VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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else
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return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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}
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static int i915_load_modeset_init(struct drm_device *dev,
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static int i915_load_modeset_init(struct drm_device *dev,
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unsigned long prealloc_size,
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unsigned long prealloc_size,
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unsigned long agp_size)
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unsigned long agp_size)
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@ -1057,6 +1071,11 @@ static int i915_load_modeset_init(struct drm_device *dev,
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if (ret)
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if (ret)
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DRM_INFO("failed to find VBIOS tables\n");
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DRM_INFO("failed to find VBIOS tables\n");
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/* if we have > 1 VGA cards, then disable the radeon VGA resources */
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ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
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if (ret)
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goto destroy_ringbuffer;
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ret = drm_irq_install(dev);
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ret = drm_irq_install(dev);
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if (ret)
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if (ret)
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goto destroy_ringbuffer;
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goto destroy_ringbuffer;
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@ -1324,6 +1343,7 @@ int i915_driver_unload(struct drm_device *dev)
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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drm_irq_uninstall(dev);
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drm_irq_uninstall(dev);
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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}
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}
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if (dev->pdev->msi_enabled)
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if (dev->pdev->msi_enabled)
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@ -766,6 +766,7 @@ static inline void opregion_enable_asle(struct drm_device *dev) { return; }
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/* modesetting */
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/* modesetting */
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extern void intel_modeset_init(struct drm_device *dev);
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extern void intel_modeset_init(struct drm_device *dev);
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extern void intel_modeset_cleanup(struct drm_device *dev);
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extern void intel_modeset_cleanup(struct drm_device *dev);
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extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
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/**
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/**
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* Lock test for when it's just for synchronization of ring access.
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* Lock test for when it's just for synchronization of ring access.
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@ -30,6 +30,7 @@
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* fb aperture size and the amount of pre-reserved memory.
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* fb aperture size and the amount of pre-reserved memory.
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*/
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*/
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#define INTEL_GMCH_CTRL 0x52
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#define INTEL_GMCH_CTRL 0x52
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#define INTEL_GMCH_VGA_DISABLE (1 << 1)
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#define INTEL_GMCH_ENABLED 0x4
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#define INTEL_GMCH_ENABLED 0x4
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#define INTEL_GMCH_MEM_MASK 0x1
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#define INTEL_GMCH_MEM_MASK 0x1
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#define INTEL_GMCH_MEM_64M 0x1
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#define INTEL_GMCH_MEM_64M 0x1
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return &intel_output->enc;
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return &intel_output->enc;
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}
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}
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/*
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* set vga decode state - true == enable VGA decode
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*/
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int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u16 gmch_ctrl;
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pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl);
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if (state)
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gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
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else
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gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
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pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
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return 0;
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}
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struct drm_mode_fb_cmd *mode_cmd,
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struct drm_mode_fb_cmd *mode_cmd,
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struct drm_framebuffer **fb,
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struct drm_framebuffer **fb,
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struct drm_gem_object *obj);
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struct drm_gem_object *obj);
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#endif /* __INTEL_DRV_H__ */
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#endif /* __INTEL_DRV_H__ */
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rdev->mc.real_vram_size = rdev->mc.aper_size;
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rdev->mc.real_vram_size = rdev->mc.aper_size;
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}
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}
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void r100_vga_set_state(struct radeon_device *rdev, bool state)
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{
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uint32_t temp;
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temp = RREG32(RADEON_CONFIG_CNTL);
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if (state == false) {
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temp &= ~(1<<8);
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temp |= (1<<9);
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} else {
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temp &= ~(1<<9);
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}
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WREG32(RADEON_CONFIG_CNTL, temp);
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}
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void r100_vram_info(struct radeon_device *rdev)
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void r100_vram_info(struct radeon_device *rdev)
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{
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{
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r100_vram_get_type(rdev);
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r100_vram_get_type(rdev);
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return 0;
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return 0;
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}
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}
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void r600_vga_set_state(struct radeon_device *rdev, bool state)
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{
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uint32_t temp;
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temp = RREG32(CONFIG_CNTL);
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if (state == false) {
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temp &= ~(1<<0);
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temp |= (1<<1);
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} else {
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temp &= ~(1<<1);
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}
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WREG32(CONFIG_CNTL, temp);
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}
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int r600_resume(struct radeon_device *rdev)
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int r600_resume(struct radeon_device *rdev)
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{
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{
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int r;
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int r;
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#define CB_COLOR0_MASK 0x28100
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#define CB_COLOR0_MASK 0x28100
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#define CONFIG_MEMSIZE 0x5428
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#define CONFIG_MEMSIZE 0x5428
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#define CONFIG_CNTL 0x5424
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#define CP_STAT 0x8680
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#define CP_STAT 0x8680
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#define CP_COHER_BASE 0x85F8
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#define CP_COHER_BASE 0x85F8
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#define CP_DEBUG 0xC1FC
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#define CP_DEBUG 0xC1FC
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int (*suspend)(struct radeon_device *rdev);
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int (*suspend)(struct radeon_device *rdev);
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void (*errata)(struct radeon_device *rdev);
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void (*errata)(struct radeon_device *rdev);
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void (*vram_info)(struct radeon_device *rdev);
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void (*vram_info)(struct radeon_device *rdev);
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void (*vga_set_state)(struct radeon_device *rdev, bool state);
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int (*gpu_reset)(struct radeon_device *rdev);
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int (*gpu_reset)(struct radeon_device *rdev);
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int (*mc_init)(struct radeon_device *rdev);
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int (*mc_init)(struct radeon_device *rdev);
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void (*mc_fini)(struct radeon_device *rdev);
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void (*mc_fini)(struct radeon_device *rdev);
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#define radeon_cs_parse(p) rdev->asic->cs_parse((p))
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#define radeon_cs_parse(p) rdev->asic->cs_parse((p))
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#define radeon_errata(rdev) (rdev)->asic->errata((rdev))
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#define radeon_errata(rdev) (rdev)->asic->errata((rdev))
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#define radeon_vram_info(rdev) (rdev)->asic->vram_info((rdev))
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#define radeon_vram_info(rdev) (rdev)->asic->vram_info((rdev))
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#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
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#define radeon_gpu_reset(rdev) (rdev)->asic->gpu_reset((rdev))
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#define radeon_gpu_reset(rdev) (rdev)->asic->gpu_reset((rdev))
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#define radeon_mc_init(rdev) (rdev)->asic->mc_init((rdev))
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#define radeon_mc_init(rdev) (rdev)->asic->mc_init((rdev))
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#define radeon_mc_fini(rdev) (rdev)->asic->mc_fini((rdev))
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#define radeon_mc_fini(rdev) (rdev)->asic->mc_fini((rdev))
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void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
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void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
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void r100_errata(struct radeon_device *rdev);
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void r100_errata(struct radeon_device *rdev);
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void r100_vram_info(struct radeon_device *rdev);
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void r100_vram_info(struct radeon_device *rdev);
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void r100_vga_set_state(struct radeon_device *rdev, bool state);
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int r100_gpu_reset(struct radeon_device *rdev);
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int r100_gpu_reset(struct radeon_device *rdev);
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int r100_mc_init(struct radeon_device *rdev);
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int r100_mc_init(struct radeon_device *rdev);
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void r100_mc_fini(struct radeon_device *rdev);
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void r100_mc_fini(struct radeon_device *rdev);
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@ -89,6 +90,7 @@ static struct radeon_asic r100_asic = {
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.init = &r100_init,
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.init = &r100_init,
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.errata = &r100_errata,
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.errata = &r100_errata,
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.vram_info = &r100_vram_info,
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.vram_info = &r100_vram_info,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r100_gpu_reset,
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.gpu_reset = &r100_gpu_reset,
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.mc_init = &r100_mc_init,
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.mc_init = &r100_mc_init,
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.mc_fini = &r100_mc_fini,
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.mc_fini = &r100_mc_fini,
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.init = &r300_init,
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.init = &r300_init,
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.errata = &r300_errata,
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.errata = &r300_errata,
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.vram_info = &r300_vram_info,
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.vram_info = &r300_vram_info,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r300_gpu_reset,
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.gpu_reset = &r300_gpu_reset,
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.mc_init = &r300_mc_init,
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.mc_init = &r300_mc_init,
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.mc_fini = &r300_mc_fini,
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.mc_fini = &r300_mc_fini,
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@ -208,6 +211,7 @@ static struct radeon_asic r420_asic = {
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.resume = &r420_resume,
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.resume = &r420_resume,
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.errata = NULL,
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.errata = NULL,
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.vram_info = NULL,
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.vram_info = NULL,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r300_gpu_reset,
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.gpu_reset = &r300_gpu_reset,
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.mc_init = NULL,
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.mc_init = NULL,
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.mc_fini = NULL,
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.mc_fini = NULL,
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@ -262,6 +266,7 @@ static struct radeon_asic rs400_asic = {
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.init = &r300_init,
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.init = &r300_init,
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.errata = &rs400_errata,
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.errata = &rs400_errata,
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.vram_info = &rs400_vram_info,
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.vram_info = &rs400_vram_info,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r300_gpu_reset,
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.gpu_reset = &r300_gpu_reset,
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.mc_init = &rs400_mc_init,
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.mc_init = &rs400_mc_init,
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.mc_fini = &rs400_mc_fini,
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.mc_fini = &rs400_mc_fini,
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@ -323,6 +328,7 @@ static struct radeon_asic rs600_asic = {
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.init = &rs600_init,
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.init = &rs600_init,
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.errata = &rs600_errata,
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.errata = &rs600_errata,
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.vram_info = &rs600_vram_info,
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.vram_info = &rs600_vram_info,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r300_gpu_reset,
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.gpu_reset = &r300_gpu_reset,
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.mc_init = &rs600_mc_init,
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.mc_init = &rs600_mc_init,
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.mc_fini = &rs600_mc_fini,
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.mc_fini = &rs600_mc_fini,
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@ -372,6 +378,7 @@ static struct radeon_asic rs690_asic = {
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.init = &rs600_init,
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.init = &rs600_init,
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.errata = &rs690_errata,
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.errata = &rs690_errata,
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.vram_info = &rs690_vram_info,
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.vram_info = &rs690_vram_info,
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.vga_set_state = &r100_vga_set_state,
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.gpu_reset = &r300_gpu_reset,
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.gpu_reset = &r300_gpu_reset,
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.mc_init = &rs690_mc_init,
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.mc_init = &rs690_mc_init,
|
||||||
.mc_fini = &rs690_mc_fini,
|
.mc_fini = &rs690_mc_fini,
|
||||||
|
@ -428,6 +435,7 @@ static struct radeon_asic rv515_asic = {
|
||||||
.init = &rv515_init,
|
.init = &rv515_init,
|
||||||
.errata = &rv515_errata,
|
.errata = &rv515_errata,
|
||||||
.vram_info = &rv515_vram_info,
|
.vram_info = &rv515_vram_info,
|
||||||
|
.vga_set_state = &r100_vga_set_state,
|
||||||
.gpu_reset = &rv515_gpu_reset,
|
.gpu_reset = &rv515_gpu_reset,
|
||||||
.mc_init = &rv515_mc_init,
|
.mc_init = &rv515_mc_init,
|
||||||
.mc_fini = &rv515_mc_fini,
|
.mc_fini = &rv515_mc_fini,
|
||||||
|
@ -477,6 +485,7 @@ static struct radeon_asic r520_asic = {
|
||||||
.init = &rv515_init,
|
.init = &rv515_init,
|
||||||
.errata = &r520_errata,
|
.errata = &r520_errata,
|
||||||
.vram_info = &r520_vram_info,
|
.vram_info = &r520_vram_info,
|
||||||
|
.vga_set_state = &r100_vga_set_state,
|
||||||
.gpu_reset = &rv515_gpu_reset,
|
.gpu_reset = &rv515_gpu_reset,
|
||||||
.mc_init = &r520_mc_init,
|
.mc_init = &r520_mc_init,
|
||||||
.mc_fini = &r520_mc_fini,
|
.mc_fini = &r520_mc_fini,
|
||||||
|
@ -520,6 +529,7 @@ int r600_init(struct radeon_device *rdev);
|
||||||
void r600_fini(struct radeon_device *rdev);
|
void r600_fini(struct radeon_device *rdev);
|
||||||
int r600_suspend(struct radeon_device *rdev);
|
int r600_suspend(struct radeon_device *rdev);
|
||||||
int r600_resume(struct radeon_device *rdev);
|
int r600_resume(struct radeon_device *rdev);
|
||||||
|
void r600_vga_set_state(struct radeon_device *rdev, bool state);
|
||||||
int r600_wb_init(struct radeon_device *rdev);
|
int r600_wb_init(struct radeon_device *rdev);
|
||||||
void r600_wb_fini(struct radeon_device *rdev);
|
void r600_wb_fini(struct radeon_device *rdev);
|
||||||
void r600_cp_commit(struct radeon_device *rdev);
|
void r600_cp_commit(struct radeon_device *rdev);
|
||||||
|
@ -556,6 +566,7 @@ static struct radeon_asic r600_asic = {
|
||||||
.resume = &r600_resume,
|
.resume = &r600_resume,
|
||||||
.cp_commit = &r600_cp_commit,
|
.cp_commit = &r600_cp_commit,
|
||||||
.vram_info = NULL,
|
.vram_info = NULL,
|
||||||
|
.vga_set_state = &r600_vga_set_state,
|
||||||
.gpu_reset = &r600_gpu_reset,
|
.gpu_reset = &r600_gpu_reset,
|
||||||
.mc_init = NULL,
|
.mc_init = NULL,
|
||||||
.mc_fini = NULL,
|
.mc_fini = NULL,
|
||||||
|
@ -606,6 +617,7 @@ static struct radeon_asic rv770_asic = {
|
||||||
.cp_commit = &r600_cp_commit,
|
.cp_commit = &r600_cp_commit,
|
||||||
.vram_info = NULL,
|
.vram_info = NULL,
|
||||||
.gpu_reset = &rv770_gpu_reset,
|
.gpu_reset = &rv770_gpu_reset,
|
||||||
|
.vga_set_state = &r600_vga_set_state,
|
||||||
.mc_init = NULL,
|
.mc_init = NULL,
|
||||||
.mc_fini = NULL,
|
.mc_fini = NULL,
|
||||||
.wb_init = &r600_wb_init,
|
.wb_init = &r600_wb_init,
|
||||||
|
|
|
@ -29,6 +29,7 @@
|
||||||
#include <drm/drmP.h>
|
#include <drm/drmP.h>
|
||||||
#include <drm/drm_crtc_helper.h>
|
#include <drm/drm_crtc_helper.h>
|
||||||
#include <drm/radeon_drm.h>
|
#include <drm/radeon_drm.h>
|
||||||
|
#include <linux/vgaarb.h>
|
||||||
#include "radeon_reg.h"
|
#include "radeon_reg.h"
|
||||||
#include "radeon.h"
|
#include "radeon.h"
|
||||||
#include "radeon_asic.h"
|
#include "radeon_asic.h"
|
||||||
|
@ -480,7 +481,18 @@ void radeon_combios_fini(struct radeon_device *rdev)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* if we get transitioned to only one device, tak VGA back */
|
||||||
|
static unsigned int radeon_vga_set_decode(void *cookie, bool state)
|
||||||
|
{
|
||||||
|
struct radeon_device *rdev = cookie;
|
||||||
|
|
||||||
|
radeon_vga_set_state(rdev, state);
|
||||||
|
if (state)
|
||||||
|
return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
|
||||||
|
VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
|
||||||
|
else
|
||||||
|
return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
|
||||||
|
}
|
||||||
/*
|
/*
|
||||||
* Radeon device.
|
* Radeon device.
|
||||||
*/
|
*/
|
||||||
|
@ -578,6 +590,13 @@ int radeon_device_init(struct radeon_device *rdev,
|
||||||
if (r) {
|
if (r) {
|
||||||
return r;
|
return r;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* if we have > 1 VGA cards, then disable the radeon VGA resources */
|
||||||
|
r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
|
||||||
|
if (r) {
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
if (!rdev->new_init_path) {
|
if (!rdev->new_init_path) {
|
||||||
/* Setup errata flags */
|
/* Setup errata flags */
|
||||||
radeon_errata(rdev);
|
radeon_errata(rdev);
|
||||||
|
@ -586,7 +605,6 @@ int radeon_device_init(struct radeon_device *rdev,
|
||||||
/* Initialize surface registers */
|
/* Initialize surface registers */
|
||||||
radeon_surface_init(rdev);
|
radeon_surface_init(rdev);
|
||||||
|
|
||||||
/* TODO: disable VGA need to use VGA request */
|
|
||||||
/* BIOS*/
|
/* BIOS*/
|
||||||
if (!radeon_get_bios(rdev)) {
|
if (!radeon_get_bios(rdev)) {
|
||||||
if (ASIC_IS_AVIVO(rdev))
|
if (ASIC_IS_AVIVO(rdev))
|
||||||
|
@ -697,6 +715,7 @@ void radeon_device_fini(struct radeon_device *rdev)
|
||||||
radeon_agp_fini(rdev);
|
radeon_agp_fini(rdev);
|
||||||
#endif
|
#endif
|
||||||
radeon_irq_kms_fini(rdev);
|
radeon_irq_kms_fini(rdev);
|
||||||
|
vga_client_register(rdev->pdev, NULL, NULL, NULL);
|
||||||
radeon_fence_driver_fini(rdev);
|
radeon_fence_driver_fini(rdev);
|
||||||
radeon_clocks_fini(rdev);
|
radeon_clocks_fini(rdev);
|
||||||
radeon_object_fini(rdev);
|
radeon_object_fini(rdev);
|
||||||
|
|
|
@ -810,6 +810,9 @@ struct drm_driver {
|
||||||
int (*gem_init_object) (struct drm_gem_object *obj);
|
int (*gem_init_object) (struct drm_gem_object *obj);
|
||||||
void (*gem_free_object) (struct drm_gem_object *obj);
|
void (*gem_free_object) (struct drm_gem_object *obj);
|
||||||
|
|
||||||
|
/* vga arb irq handler */
|
||||||
|
void (*vgaarb_irq)(struct drm_device *dev, bool state);
|
||||||
|
|
||||||
/* Driver private ops for this object */
|
/* Driver private ops for this object */
|
||||||
struct vm_operations_struct *gem_vm_ops;
|
struct vm_operations_struct *gem_vm_ops;
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue