clk: sunxi-ng: fix PRCM CCU ir clk parent
The first parent of ir clk in PRCM CCU is wrongly written as "osc32K"
instead of "osc32k".
Change it to "osc32k".
Fixes: cdb8b80b60
("clk: sunxi-ng: add support for PRCM CCUs")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -81,7 +81,7 @@ static SUNXI_CCU_GATE(apb0_i2c_clk, "apb0-i2c", "apb0",
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static SUNXI_CCU_GATE(apb0_twd_clk, "apb0-twd", "apb0",
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0x28, BIT(7), 0);
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static const char * const r_mod0_default_parents[] = { "osc32K", "osc24M" };
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static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" };
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static SUNXI_CCU_MP_WITH_MUX_GATE(ir_clk, "ir",
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r_mod0_default_parents, 0x54,
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0, 4, /* M */
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