USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs
The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers. This patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd drivers to work on CNS3XXX The EHCI and OHCI controllers share a common clock control and reset bit, therefore additional check for the timming of enabling and disabling is required. The USB bit of PLL Power Down Control is also shared by OTG, 24MHzUART clock, Crypto clock, PCIe reference clock, and Clock Scale Generator. Therefore we only ensure it is enabled, while not disabling it. Signed-off-by: Mac Lin <mkl0301@gmail.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
This commit is contained in:
Mac Lin
Anton Vorontsov
parent
cf36797f35
commit
760efe6910
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@ -41,6 +41,7 @@ config USB_ARCH_HAS_OHCI
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default y if MFD_TC6393XB
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default y if ARCH_W90X900
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default y if ARCH_DAVINCI_DA8XX
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default y if ARCH_CNS3XXX
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# PPC:
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default y if STB03xxx
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default y if PPC_MPC52xx
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@ -66,6 +67,7 @@ config USB_ARCH_HAS_EHCI
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default y if ARCH_AT91SAM9G45
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default y if ARCH_MXC
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default y if ARCH_OMAP3
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default y if ARCH_CNS3XXX
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default PCI
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# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
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@ -147,6 +147,14 @@ config USB_W90X900_EHCI
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---help---
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Enables support for the W90X900 USB controller
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config USB_CNS3XXX_EHCI
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bool "Cavium CNS3XXX EHCI Module"
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depends on USB_EHCI_HCD && ARCH_CNS3XXX
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---help---
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Enable support for the CNS3XXX SOC's on-chip EHCI controller.
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It is needed for high-speed (480Mbit/sec) USB 2.0 device
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support.
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config USB_OXU210HP_HCD
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tristate "OXU210HP HCD support"
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depends on USB
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@ -286,6 +294,13 @@ config USB_OHCI_HCD_SSB
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If unsure, say N.
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config USB_CNS3XXX_OHCI
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bool "Cavium CNS3XXX OHCI Module"
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depends on USB_OHCI_HCD && ARCH_CNS3XXX
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---help---
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Enable support for the CNS3XXX SOC's on-chip OHCI controller.
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It is needed for low-speed USB 1.0 device support.
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config USB_OHCI_BIG_ENDIAN_DESC
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bool
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depends on USB_OHCI_HCD
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@ -0,0 +1,171 @@
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/*
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* Copyright 2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/atomic.h>
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#include <mach/cns3xxx.h>
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#include <mach/pm.h>
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static int cns3xxx_ehci_init(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int retval;
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/*
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* EHCI and OHCI share the same clock and power,
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* resetting twice would cause the 1st controller been reset.
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* Therefore only do power up at the first up device, and
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* power down at the last down device.
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*
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* Set USB AHB INCR length to 16
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*/
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if (atomic_inc_return(&usb_pwr_ref) == 1) {
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cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
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cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
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cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
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__raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
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MISC_CHIP_CONFIG_REG);
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}
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ehci->caps = hcd->regs;
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ehci->regs = hcd->regs
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+ HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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hcd->has_tt = 0;
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ehci_reset(ehci);
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retval = ehci_init(hcd);
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if (retval)
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return retval;
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ehci_port_power(ehci, 0);
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return retval;
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}
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static const struct hc_driver cns3xxx_ehci_hc_driver = {
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.description = hcd_name,
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.product_desc = "CNS3XXX EHCI Host Controller",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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.irq = ehci_irq,
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.flags = HCD_MEMORY | HCD_USB2,
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.reset = cns3xxx_ehci_init,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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.get_frame_number = ehci_get_frame,
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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#ifdef CONFIG_PM
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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#endif
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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};
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static int cns3xxx_ehci_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct usb_hcd *hcd;
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const struct hc_driver *driver = &cns3xxx_ehci_hc_driver;
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struct resource *res;
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int irq;
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int retval;
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if (usb_disabled())
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return -ENODEV;
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!res) {
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dev_err(dev, "Found HC with no IRQ.\n");
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return -ENODEV;
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}
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irq = res->start;
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hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
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if (!hcd)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Found HC with no register addr.\n");
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retval = -ENODEV;
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goto err1;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = res->end - res->start + 1;
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
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driver->description)) {
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dev_dbg(dev, "controller already in use\n");
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retval = -EBUSY;
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goto err1;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (hcd->regs == NULL) {
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dev_dbg(dev, "error mapping memory\n");
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retval = -EFAULT;
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goto err2;
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}
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retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (retval == 0)
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return retval;
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iounmap(hcd->regs);
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err2:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err1:
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usb_put_hcd(hcd);
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return retval;
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}
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static int cns3xxx_ehci_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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usb_remove_hcd(hcd);
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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/*
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* EHCI and OHCI share the same clock and power,
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* resetting twice would cause the 1st controller been reset.
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* Therefore only do power up at the first up device, and
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* power down at the last down device.
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*/
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if (atomic_dec_return(&usb_pwr_ref) == 0)
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cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
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usb_put_hcd(hcd);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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MODULE_ALIAS("platform:cns3xxx-ehci");
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static struct platform_driver cns3xxx_ehci_driver = {
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.probe = cns3xxx_ehci_probe,
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.remove = cns3xxx_ehci_remove,
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.driver = {
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.name = "cns3xxx-ehci",
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},
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};
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@ -1216,6 +1216,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ehci_octeon_driver
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#endif
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#ifdef CONFIG_USB_CNS3XXX_EHCI
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#include "ehci-cns3xxx.c"
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#define PLATFORM_DRIVER cns3xxx_ehci_driver
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#endif
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#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
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!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
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!defined(XILINX_OF_PLATFORM_DRIVER)
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@ -0,0 +1,165 @@
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/*
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* Copyright 2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/atomic.h>
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#include <mach/cns3xxx.h>
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#include <mach/pm.h>
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static int __devinit
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cns3xxx_ohci_start(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci(hcd);
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int ret;
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/*
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* EHCI and OHCI share the same clock and power,
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* resetting twice would cause the 1st controller been reset.
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* Therefore only do power up at the first up device, and
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* power down at the last down device.
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*
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* Set USB AHB INCR length to 16
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*/
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if (atomic_inc_return(&usb_pwr_ref) == 1) {
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cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
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cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
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cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
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__raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
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MISC_CHIP_CONFIG_REG);
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}
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ret = ohci_init(ohci);
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if (ret < 0)
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return ret;
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ohci->num_ports = 1;
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ret = ohci_run(ohci);
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if (ret < 0) {
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err("can't start %s", hcd->self.bus_name);
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ohci_stop(hcd);
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return ret;
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}
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return 0;
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}
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static const struct hc_driver cns3xxx_ohci_hc_driver = {
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.description = hcd_name,
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.product_desc = "CNS3XXX OHCI Host controller",
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.hcd_priv_size = sizeof(struct ohci_hcd),
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.irq = ohci_irq,
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.flags = HCD_USB11 | HCD_MEMORY,
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.start = cns3xxx_ohci_start,
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.stop = ohci_stop,
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.shutdown = ohci_shutdown,
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.urb_enqueue = ohci_urb_enqueue,
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.urb_dequeue = ohci_urb_dequeue,
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.endpoint_disable = ohci_endpoint_disable,
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.get_frame_number = ohci_get_frame,
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.hub_status_data = ohci_hub_status_data,
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.hub_control = ohci_hub_control,
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#ifdef CONFIG_PM
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.bus_suspend = ohci_bus_suspend,
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.bus_resume = ohci_bus_resume,
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#endif
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.start_port_reset = ohci_start_port_reset,
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};
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static int cns3xxx_ohci_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct usb_hcd *hcd;
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const struct hc_driver *driver = &cns3xxx_ohci_hc_driver;
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struct resource *res;
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int irq;
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int retval;
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if (usb_disabled())
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return -ENODEV;
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!res) {
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dev_err(dev, "Found HC with no IRQ.\n");
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return -ENODEV;
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}
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irq = res->start;
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hcd = usb_create_hcd(driver, dev, dev_name(dev));
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if (!hcd)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Found HC with no register addr.\n");
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retval = -ENODEV;
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goto err1;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = res->end - res->start + 1;
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
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driver->description)) {
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dev_dbg(dev, "controller already in use\n");
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retval = -EBUSY;
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goto err1;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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dev_dbg(dev, "error mapping memory\n");
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retval = -EFAULT;
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goto err2;
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}
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ohci_hcd_init(hcd_to_ohci(hcd));
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retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (retval == 0)
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return retval;
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iounmap(hcd->regs);
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err2:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err1:
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usb_put_hcd(hcd);
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return retval;
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}
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static int cns3xxx_ohci_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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usb_remove_hcd(hcd);
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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/*
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* EHCI and OHCI share the same clock and power,
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* resetting twice would cause the 1st controller been reset.
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* Therefore only do power up at the first up device, and
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* power down at the last down device.
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*/
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if (atomic_dec_return(&usb_pwr_ref) == 0)
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cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
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usb_put_hcd(hcd);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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MODULE_ALIAS("platform:cns3xxx-ohci");
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static struct platform_driver ohci_hcd_cns3xxx_driver = {
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.probe = cns3xxx_ohci_probe,
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.remove = cns3xxx_ohci_remove,
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.driver = {
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.name = "cns3xxx-ohci",
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},
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};
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@ -1111,6 +1111,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ohci_octeon_driver
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#endif
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#ifdef CONFIG_USB_CNS3XXX_OHCI
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#include "ohci-cns3xxx.c"
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#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
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#endif
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#if !defined(PCI_DRIVER) && \
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!defined(PLATFORM_DRIVER) && \
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!defined(OMAP1_PLATFORM_DRIVER) && \
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