thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399
As the TRM says, add the tsadc_q_sel to control the temperature-code sequence since the rk3228/rk3399 need set this bit (1024 - tsadc_q) as output. Fixes: commitb0d7033
"thermal: rockchip: Support the RK3399 SoCs in thermal driver"7b02a5e
"thermal: rockchip: Support the RK3228 SoCs in thermal driver" Reported-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -155,6 +155,13 @@ struct rockchip_thermal_data {
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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/**
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* TSADCV1_AUTO_Q_SEL_EN:
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* whether select (1024 - tsadc_q) as output
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* 1'b0:use tsadc_q as output(temperature-code is rising sequence)
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* 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
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*/
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#define TSADCV3_AUTO_Q_SEL_EN BIT(1)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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@ -184,41 +191,42 @@ struct tsadc_table {
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* Code to Temperature mapping should be updated based on sillcon results.
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* Code to Temperature mapping should be updated based on sillcon results.
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*/
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*/
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static const struct tsadc_table rk3228_code_table[] = {
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static const struct tsadc_table rk3228_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{0, -40000},
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{436, -40000},
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{588, -40000},
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{431, -35000},
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{593, -35000},
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{426, -30000},
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{598, -30000},
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{421, -25000},
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{603, -25000},
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{416, -20000},
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{608, -20000},
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{411, -15000},
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{613, -15000},
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{406, -10000},
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{618, -10000},
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{401, -5000},
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{623, -5000},
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{395, 0},
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{629, 0},
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{390, 5000},
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{634, 5000},
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{385, 10000},
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{639, 10000},
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{380, 15000},
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{644, 15000},
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{375, 20000},
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{649, 20000},
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{370, 25000},
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{654, 25000},
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{364, 30000},
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{660, 30000},
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{359, 35000},
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{665, 35000},
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{354, 40000},
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{670, 40000},
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{349, 45000},
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{675, 45000},
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{343, 50000},
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{681, 50000},
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{338, 55000},
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{686, 55000},
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{333, 60000},
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{691, 60000},
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{328, 65000},
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{696, 65000},
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{322, 70000},
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{702, 70000},
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{317, 75000},
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{707, 75000},
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{312, 80000},
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{712, 80000},
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{307, 85000},
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{717, 85000},
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{301, 90000},
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{723, 90000},
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{296, 95000},
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{728, 95000},
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{291, 100000},
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{733, 100000},
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{286, 105000},
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{738, 105000},
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{280, 110000},
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{744, 110000},
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{275, 115000},
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{749, 115000},
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{270, 120000},
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{754, 120000},
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{264, 125000},
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{760, 125000},
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{TSADCV2_DATA_MASK, 125000},
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};
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};
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static const struct tsadc_table rk3288_code_table[] = {
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static const struct tsadc_table rk3288_code_table[] = {
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@ -299,41 +307,42 @@ static const struct tsadc_table rk3368_code_table[] = {
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};
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};
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static const struct tsadc_table rk3399_code_table[] = {
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static const struct tsadc_table rk3399_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{0, -40000},
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{431, -40000},
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{593, -40000},
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{426, -35000},
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{598, -35000},
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{421, -30000},
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{603, -30000},
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{415, -25000},
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{609, -25000},
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{410, -20000},
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{614, -20000},
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{405, -15000},
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{619, -15000},
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{399, -10000},
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{625, -10000},
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{394, -5000},
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{630, -5000},
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{389, 0},
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{635, 0},
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{383, 5000},
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{641, 5000},
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{378, 10000},
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{646, 10000},
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{373, 15000},
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{651, 15000},
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{367, 20000},
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{657, 20000},
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{362, 25000},
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{662, 25000},
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{357, 30000},
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{667, 30000},
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{351, 35000},
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{673, 35000},
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{346, 40000},
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{678, 40000},
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{340, 45000},
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{684, 45000},
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{335, 50000},
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{689, 50000},
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{330, 55000},
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{694, 55000},
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{324, 60000},
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{700, 60000},
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{319, 65000},
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{705, 65000},
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{313, 70000},
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{711, 70000},
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{308, 75000},
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{716, 75000},
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{302, 80000},
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{722, 80000},
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{297, 85000},
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{727, 85000},
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{291, 90000},
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{733, 90000},
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{286, 95000},
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{738, 95000},
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{281, 100000},
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{743, 100000},
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{275, 105000},
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{749, 105000},
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{270, 110000},
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{754, 110000},
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{264, 115000},
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{760, 115000},
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{259, 120000},
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{765, 120000},
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{253, 125000},
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{771, 125000},
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{TSADCV3_DATA_MASK, 125000},
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};
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};
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static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
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static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
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@ -488,6 +497,25 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
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writel_relaxed(val, regs + TSADCV2_AUTO_CON);
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writel_relaxed(val, regs + TSADCV2_AUTO_CON);
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}
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}
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/**
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* @rk_tsadcv3_control:
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* TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
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* bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
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* setting this bit to enable.
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*/
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static void rk_tsadcv3_control(void __iomem *regs, bool enable)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_AUTO_CON);
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if (enable)
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val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
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else
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val &= ~TSADCV2_AUTO_EN;
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writel_relaxed(val, regs + TSADCV2_AUTO_CON);
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}
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static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
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static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
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int chn, void __iomem *regs, int *temp)
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int chn, void __iomem *regs, int *temp)
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{
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{
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@ -538,7 +566,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
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.initialize = rk_tsadcv2_initialize,
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.initialize = rk_tsadcv2_initialize,
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.irq_ack = rk_tsadcv3_irq_ack,
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.irq_ack = rk_tsadcv3_irq_ack,
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.control = rk_tsadcv2_control,
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.control = rk_tsadcv3_control,
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.get_temp = rk_tsadcv2_get_temp,
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.get_temp = rk_tsadcv2_get_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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@ -547,7 +575,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
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.id = rk3228_code_table,
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.id = rk3228_code_table,
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.length = ARRAY_SIZE(rk3228_code_table),
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.length = ARRAY_SIZE(rk3228_code_table),
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.data_mask = TSADCV3_DATA_MASK,
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.data_mask = TSADCV3_DATA_MASK,
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.mode = ADC_DECREMENT,
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.mode = ADC_INCREMENT,
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},
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},
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};
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};
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@ -610,7 +638,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
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.initialize = rk_tsadcv2_initialize,
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.initialize = rk_tsadcv2_initialize,
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.irq_ack = rk_tsadcv3_irq_ack,
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.irq_ack = rk_tsadcv3_irq_ack,
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.control = rk_tsadcv2_control,
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.control = rk_tsadcv3_control,
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.get_temp = rk_tsadcv2_get_temp,
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.get_temp = rk_tsadcv2_get_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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@ -619,7 +647,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
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.id = rk3399_code_table,
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.id = rk3399_code_table,
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.length = ARRAY_SIZE(rk3399_code_table),
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.length = ARRAY_SIZE(rk3399_code_table),
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.data_mask = TSADCV3_DATA_MASK,
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.data_mask = TSADCV3_DATA_MASK,
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.mode = ADC_DECREMENT,
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.mode = ADC_INCREMENT,
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},
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},
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};
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};
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