ARM: shmobile: r8a7790: Add QSPI module clock in device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -615,13 +615,16 @@
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mstp9_clks: mstp9_clks@e6150994 {
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
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clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
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clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
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<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
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#clock-cells = <1>;
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renesas,clock-indices = <
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R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_I2C3
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R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
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R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
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R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
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R8A7790_CLK_I2C0
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>;
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clock-output-names = "rcan1", "rcan0", "i2c3", "i2c2", "i2c1", "i2c0";
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clock-output-names =
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"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
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};
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};
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};
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@ -97,6 +97,7 @@
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#define R8A7790_CLK_GPIO0 12
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#define R8A7790_CLK_RCAN1 15
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#define R8A7790_CLK_RCAN0 16
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#define R8A7790_CLK_QSPI_MOD 17
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#define R8A7790_CLK_IICDVFS 26
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#define R8A7790_CLK_I2C3 28
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#define R8A7790_CLK_I2C2 29
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