Merge branch 'pci-next+probe_only+bus2res-fb127cb' of git://github.com/bjorn-helgaas/linux into linux-next
This commit is contained in:
commit
ecd58d667a
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@ -7,6 +7,7 @@
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#include <linux/dma-mapping.h>
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#include <asm/scatterlist.h>
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#include <asm/machvec.h>
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#include <asm-generic/pci-bridge.h>
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/*
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* The following structure is used to manage multiple PCI busses.
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|
@ -99,12 +100,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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return channel ? 15 : 14;
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}
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extern void pcibios_resource_to_bus(struct pci_dev *, struct pci_bus_region *,
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struct resource *);
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extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region);
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#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
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static inline int pci_proc_domain(struct pci_bus *bus)
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|
|
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@ -43,12 +43,10 @@ const char *const pci_mem_names[] = {
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const char pci_hae0_name[] = "HAE0";
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/* Indicate whether we respect the PCI setup left by console. */
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/*
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* Make this long-lived so that we know when shutting down
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* whether we probed only or not.
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* If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
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* assignments.
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*/
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int pci_probe_only;
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/*
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* The PCI controller list.
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@ -215,7 +213,7 @@ pdev_save_srm_config(struct pci_dev *dev)
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struct pdev_srm_saved_conf *tmp;
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static int printed = 0;
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if (!alpha_using_srm || pci_probe_only)
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if (!alpha_using_srm || pci_has_flag(PCI_PROBE_ONLY))
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return;
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if (!printed) {
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|
@ -242,7 +240,7 @@ pci_restore_srm_config(void)
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struct pdev_srm_saved_conf *tmp;
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/* No need to restore if probed only. */
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if (pci_probe_only)
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if (pci_has_flag(PCI_PROBE_ONLY))
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return;
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/* Restore SRM config. */
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@ -252,47 +250,18 @@ pci_restore_srm_config(void)
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}
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#endif
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void __devinit
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pcibios_fixup_resource(struct resource *res, struct resource *root)
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{
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res->start += root->start;
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res->end += root->start;
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}
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void __devinit
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pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
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{
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/* Update device resources. */
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struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
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int i;
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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if (!dev->resource[i].start)
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continue;
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if (dev->resource[i].flags & IORESOURCE_IO)
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pcibios_fixup_resource(&dev->resource[i],
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hose->io_space);
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else if (dev->resource[i].flags & IORESOURCE_MEM)
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pcibios_fixup_resource(&dev->resource[i],
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hose->mem_space);
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}
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}
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void __devinit
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pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_dev *dev = bus->self;
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if (pci_probe_only && dev &&
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if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
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(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
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pci_read_bridge_bases(bus);
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pcibios_fixup_device_resources(dev, bus);
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}
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list_for_each_entry(dev, &bus->devices, bus_list) {
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pdev_save_srm_config(dev);
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if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
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pcibios_fixup_device_resources(dev, bus);
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}
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}
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|
@ -302,42 +271,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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}
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void
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pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res)
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{
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struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
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unsigned long offset = 0;
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if (res->flags & IORESOURCE_IO)
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offset = hose->io_space->start;
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else if (res->flags & IORESOURCE_MEM)
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offset = hose->mem_space->start;
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region->start = res->start - offset;
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region->end = res->end - offset;
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}
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void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region)
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{
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struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
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unsigned long offset = 0;
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if (res->flags & IORESOURCE_IO)
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offset = hose->io_space->start;
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else if (res->flags & IORESOURCE_MEM)
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offset = hose->mem_space->start;
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res->start = region->start + offset;
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res->end = region->end + offset;
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}
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#ifdef CONFIG_HOTPLUG
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EXPORT_SYMBOL(pcibios_resource_to_bus);
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EXPORT_SYMBOL(pcibios_bus_to_resource);
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#endif
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int
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pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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|
@ -374,7 +307,8 @@ pcibios_claim_one_bus(struct pci_bus *b)
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if (r->parent || !r->start || !r->flags)
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continue;
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if (pci_probe_only || (r->flags & IORESOURCE_PCI_FIXED))
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if (pci_has_flag(PCI_PROBE_ONLY) ||
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(r->flags & IORESOURCE_PCI_FIXED))
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pci_claim_resource(dev, i);
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}
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}
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|
@ -416,8 +350,10 @@ common_init_pci(void)
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hose->mem_space->end = end;
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INIT_LIST_HEAD(&resources);
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pci_add_resource(&resources, hose->io_space);
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pci_add_resource(&resources, hose->mem_space);
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pci_add_resource_offset(&resources, hose->io_space,
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hose->io_space->start);
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pci_add_resource_offset(&resources, hose->mem_space,
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hose->mem_space->start);
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bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
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hose, &resources);
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|
|
@ -173,9 +173,6 @@ extern void pci_restore_srm_config(void);
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extern struct pci_controller *hose_head, **hose_tail;
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extern struct pci_controller *pci_isa_hose;
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/* Indicate that we trust the console to configure things properly. */
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extern int pci_probe_only;
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extern unsigned long alpha_agpgart_size;
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extern void common_init_pci(void);
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|
@ -384,7 +384,8 @@ marvel_init_pci(void)
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marvel_register_error_handlers();
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pci_probe_only = 1;
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/* Indicate that we trust the console to configure things properly */
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pci_set_flags(PCI_PROBE_ONLY);
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common_init_pci();
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locate_and_init_vga(NULL);
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|
|
|
@ -331,7 +331,8 @@ titan_init_pci(void)
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*/
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titan_late_init();
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pci_probe_only = 1;
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/* Indicate that we trust the console to configure things properly */
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pci_set_flags(PCI_PROBE_ONLY);
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common_init_pci();
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SMC669_Init(0);
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locate_and_init_vga(NULL);
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|
|
|
@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
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goto err1;
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}
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pci_add_resource(&sys->resources, &it8152_io);
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pci_add_resource(&sys->resources, &it8152_mem);
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pci_add_resource_offset(&sys->resources, &it8152_io, sys->io_offset);
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pci_add_resource_offset(&sys->resources, &it8152_mem, sys->mem_offset);
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if (platform_notify || platform_notify_remove) {
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printk(KERN_ERR "PCI: Can't use platform_notify\n");
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@ -57,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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extern void
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pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res);
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extern void
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pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region);
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/*
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* Dummy implementation; always return 0.
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*/
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|
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@ -16,7 +16,6 @@
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#include <asm/mach/pci.h>
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static int debug_pci;
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static int use_firmware;
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/*
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* We can't use pci_find_device() here since we are
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|
@ -294,28 +293,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
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}
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/*
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* Adjust the device resources from bus-centric to Linux-centric.
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*/
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static void __devinit
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pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
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{
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resource_size_t offset;
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int i;
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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if (dev->resource[i].start == 0)
|
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continue;
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if (dev->resource[i].flags & IORESOURCE_MEM)
|
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offset = root->mem_offset;
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else
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offset = root->io_offset;
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|
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dev->resource[i].start += offset;
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dev->resource[i].end += offset;
|
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}
|
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}
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|
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/*
|
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* pcibios_fixup_bus - Called after each bus is probed,
|
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* but before its children are examined.
|
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|
@ -333,8 +310,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
u16 status;
|
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|
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pdev_fixup_device_resources(root, dev);
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|
||||
pci_read_config_word(dev, PCI_STATUS, &status);
|
||||
|
||||
/*
|
||||
|
@ -399,43 +374,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
|
|||
EXPORT_SYMBOL(pcibios_fixup_bus);
|
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#endif
|
||||
|
||||
/*
|
||||
* Convert from Linux-centric to bus-centric addresses for bridge devices.
|
||||
*/
|
||||
void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_sys_data *root = dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = root->io_offset;
|
||||
if (res->flags & IORESOURCE_MEM)
|
||||
offset = root->mem_offset;
|
||||
|
||||
region->start = res->start - offset;
|
||||
region->end = res->end - offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
void __devinit
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_sys_data *root = dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = root->io_offset;
|
||||
if (res->flags & IORESOURCE_MEM)
|
||||
offset = root->mem_offset;
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/*
|
||||
* Swizzle the device pin each time we cross a bridge.
|
||||
* This might update pin and returns the slot number.
|
||||
|
@ -497,10 +435,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
|
|||
|
||||
if (ret > 0) {
|
||||
if (list_empty(&sys->resources)) {
|
||||
pci_add_resource(&sys->resources,
|
||||
&ioport_resource);
|
||||
pci_add_resource(&sys->resources,
|
||||
&iomem_resource);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ioport_resource, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&iomem_resource, sys->mem_offset);
|
||||
}
|
||||
|
||||
sys->bus = hw->scan(nr, sys);
|
||||
|
@ -525,6 +463,7 @@ void __init pci_common_init(struct hw_pci *hw)
|
|||
|
||||
INIT_LIST_HEAD(&hw->buses);
|
||||
|
||||
pci_add_flags(PCI_REASSIGN_ALL_RSRC);
|
||||
if (hw->preinit)
|
||||
hw->preinit();
|
||||
pcibios_init_hw(hw);
|
||||
|
@ -536,7 +475,7 @@ void __init pci_common_init(struct hw_pci *hw)
|
|||
list_for_each_entry(sys, &hw->buses, node) {
|
||||
struct pci_bus *bus = sys->bus;
|
||||
|
||||
if (!use_firmware) {
|
||||
if (!pci_has_flag(PCI_PROBE_ONLY)) {
|
||||
/*
|
||||
* Size the bridge windows.
|
||||
*/
|
||||
|
@ -559,6 +498,7 @@ void __init pci_common_init(struct hw_pci *hw)
|
|||
pci_bus_add_devices(bus);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_flags);
|
||||
|
||||
#ifndef CONFIG_PCI_HOST_ITE8152
|
||||
void pcibios_set_master(struct pci_dev *dev)
|
||||
|
@ -573,7 +513,7 @@ char * __init pcibios_setup(char *str)
|
|||
debug_pci = 1;
|
||||
return NULL;
|
||||
} else if (!strcmp(str, "firmware")) {
|
||||
use_firmware = 1;
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
return NULL;
|
||||
}
|
||||
return str;
|
||||
|
|
|
@ -155,8 +155,8 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
BUG_ON(request_resource(&iomem_resource, res_io) ||
|
||||
request_resource(&iomem_resource, res_mem));
|
||||
|
||||
pci_add_resource(&sys->resources, res_io);
|
||||
pci_add_resource(&sys->resources, res_mem);
|
||||
pci_add_resource_offset(&sys->resources, res_io, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, res_mem, sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
pp->res[0].flags = IORESOURCE_IO;
|
||||
if (request_resource(&ioport_resource, &pp->res[0]))
|
||||
panic("Request PCIe IO resource failed\n");
|
||||
pci_add_resource(&sys->resources, &pp->res[0]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
|
||||
|
||||
/*
|
||||
* IORESOURCE_MEM
|
||||
|
@ -88,7 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
pp->res[1].flags = IORESOURCE_MEM;
|
||||
if (request_resource(&iomem_resource, &pp->res[1]))
|
||||
panic("Request PCIe Memory resource failed\n");
|
||||
pci_add_resource(&sys->resources, &pp->res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -275,11 +275,13 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
|
|||
allocate_resource(&iomem_resource, &res[0], 0x40000000,
|
||||
0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
|
||||
|
||||
pci_add_resource(&sys->resources, &ioport_resource);
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
sys->mem_offset = DC21285_PCI_MEM;
|
||||
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ioport_resource, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -378,9 +378,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
|
|||
* the mem resource for this bus
|
||||
* the prefetch mem resource for this bus
|
||||
*/
|
||||
pci_add_resource(&sys->resources, &ioport_resource);
|
||||
pci_add_resource(&sys->resources, &non_mem);
|
||||
pci_add_resource(&sys->resources, &pre_mem);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ioport_resource, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
|
||||
pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -1084,8 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -243,8 +243,10 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
if (nr >= 1)
|
||||
return 0;
|
||||
|
||||
pci_add_resource(&sys->resources, &ixp2000_pci_io_space);
|
||||
pci_add_resource(&sys->resources, &ixp2000_pci_mem_space);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ixp2000_pci_io_space, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ixp2000_pci_mem_space, sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -281,8 +281,10 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
if (nr >= 1)
|
||||
return 0;
|
||||
|
||||
pci_add_resource(&sys->resources, &ixp23xx_pci_io_space);
|
||||
pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ixp23xx_pci_io_space, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&ixp23xx_pci_mem_space, sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -472,8 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
|
|||
request_resource(&ioport_resource, &res[0]);
|
||||
request_resource(&iomem_resource, &res[1]);
|
||||
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
platform_notify = ixp4xx_pci_platform_notify;
|
||||
platform_notify_remove = ixp4xx_pci_platform_notify_remove;
|
||||
|
|
|
@ -198,9 +198,9 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
if (request_resource(&iomem_resource, &pp->res[1]))
|
||||
panic("Request PCIe%d Memory resource failed\n", index);
|
||||
|
||||
pci_add_resource(&sys->resources, &pp->res[0]);
|
||||
pci_add_resource(&sys->resources, &pp->res[1]);
|
||||
sys->io_offset = 0;
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
|
||||
|
||||
/*
|
||||
* Generic PCIe unit setup.
|
||||
|
|
|
@ -169,8 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
request_resource(&iomem_resource, &pci_mem);
|
||||
request_resource(&ioport_resource, &pci_io);
|
||||
|
||||
pci_add_resource(&sys->resources, &pci_io);
|
||||
pci_add_resource(&sys->resources, &pci_mem);
|
||||
pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset);
|
||||
|
||||
/* Assign and enable processor bridge */
|
||||
ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
|
||||
|
|
|
@ -155,8 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
|
||||
orion_pcie_setup(pp->base);
|
||||
|
||||
pci_add_resource(&sys->resources, &pp->res[0]);
|
||||
pci_add_resource(&sys->resources, &pp->res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -171,13 +171,14 @@ static int __init pcie_setup(struct pci_sys_data *sys)
|
|||
/*
|
||||
* IORESOURCE_IO
|
||||
*/
|
||||
sys->io_offset = 0;
|
||||
res[0].name = "PCIe I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
res[0].start = ORION5X_PCIE_IO_BUS_BASE;
|
||||
res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
|
||||
if (request_resource(&ioport_resource, &res[0]))
|
||||
panic("Request PCIe IO resource failed\n");
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
|
||||
|
||||
/*
|
||||
* IORESOURCE_MEM
|
||||
|
@ -188,9 +189,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
|
|||
res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
|
||||
if (request_resource(&iomem_resource, &res[1]))
|
||||
panic("Request PCIe Memory resource failed\n");
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
|
||||
sys->io_offset = 0;
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
@ -499,13 +498,14 @@ static int __init pci_setup(struct pci_sys_data *sys)
|
|||
/*
|
||||
* IORESOURCE_IO
|
||||
*/
|
||||
sys->io_offset = 0;
|
||||
res[0].name = "PCI I/O Space";
|
||||
res[0].flags = IORESOURCE_IO;
|
||||
res[0].start = ORION5X_PCI_IO_BUS_BASE;
|
||||
res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
|
||||
if (request_resource(&ioport_resource, &res[0]))
|
||||
panic("Request PCI IO resource failed\n");
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
|
||||
|
||||
/*
|
||||
* IORESOURCE_MEM
|
||||
|
@ -516,9 +516,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
|
|||
res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
|
||||
if (request_resource(&iomem_resource, &res[1]))
|
||||
panic("Request PCI Memory resource failed\n");
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
|
||||
sys->io_offset = 0;
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -244,9 +244,11 @@ static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
|
|||
printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
pci_add_resource(&sys->resources, &pci_io_ports);
|
||||
pci_add_resource(&sys->resources, &pci_non_prefetchable_memory);
|
||||
pci_add_resource(&sys->resources, &pci_prefetchable_memory);
|
||||
pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&pci_non_prefetchable_memory, sys->mem_offset);
|
||||
pci_add_resource_offset(&sys->resources,
|
||||
&pci_prefetchable_memory, sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -408,7 +408,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
pp->res[0].flags = IORESOURCE_IO;
|
||||
if (request_resource(&ioport_resource, &pp->res[0]))
|
||||
panic("Request PCIe IO resource failed\n");
|
||||
pci_add_resource(&sys->resources, &pp->res[0]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
|
||||
|
||||
/*
|
||||
* IORESOURCE_MEM
|
||||
|
@ -427,7 +427,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
pp->res[1].flags = IORESOURCE_MEM;
|
||||
if (request_resource(&iomem_resource, &pp->res[1]))
|
||||
panic("Request PCIe Memory resource failed\n");
|
||||
pci_add_resource(&sys->resources, &pp->res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
|
||||
|
||||
/*
|
||||
* IORESOURCE_MEM | IORESOURCE_PREFETCH
|
||||
|
@ -446,7 +446,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||
if (request_resource(&iomem_resource, &pp->res[2]))
|
||||
panic("Request PCIe Prefetch Memory resource failed\n");
|
||||
pci_add_resource(&sys->resources, &pp->res[2]);
|
||||
pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -219,9 +219,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
|
|||
* the mem resource for this bus
|
||||
* the prefetch mem resource for this bus
|
||||
*/
|
||||
pci_add_resource(resources, &io_mem);
|
||||
pci_add_resource(resources, &non_mem);
|
||||
pci_add_resource(resources, &pre_mem);
|
||||
pci_add_resource_offset(resources, &io_mem, sys->io_offset);
|
||||
pci_add_resource_offset(resources, &non_mem, sys->mem_offset);
|
||||
pci_add_resource_offset(resources, &pre_mem, sys->mem_offset);
|
||||
|
||||
goto out;
|
||||
|
||||
|
|
|
@ -32,9 +32,6 @@ EXPORT_SYMBOL(pcibios_min_io);
|
|||
unsigned long pcibios_min_mem = 0x01000000;
|
||||
EXPORT_SYMBOL(pcibios_min_mem);
|
||||
|
||||
unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC;
|
||||
EXPORT_SYMBOL(pci_flags);
|
||||
|
||||
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
|
||||
{
|
||||
if ((unsigned long)addr >= VMALLOC_START &&
|
||||
|
|
|
@ -215,8 +215,8 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0;
|
||||
sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR;
|
||||
|
||||
pci_add_resource(&sys->resources, &res[0]);
|
||||
pci_add_resource(&sys->resources, &res[1]);
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -108,12 +108,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
|
|||
return (pci_domain_nr(bus) != 0);
|
||||
}
|
||||
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region, struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res, struct pci_bus_region *region);
|
||||
|
||||
static inline struct resource *
|
||||
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
|
||||
{
|
||||
|
|
|
@ -320,7 +320,8 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
|
|||
* Ignore these tiny memory ranges */
|
||||
if (!((window->resource.flags & IORESOURCE_MEM) &&
|
||||
(window->resource.end - window->resource.start < 16)))
|
||||
pci_add_resource(&info->resources, &window->resource);
|
||||
pci_add_resource_offset(&info->resources, &window->resource,
|
||||
window->offset);
|
||||
|
||||
return AE_OK;
|
||||
}
|
||||
|
@ -395,54 +396,6 @@ out1:
|
|||
return NULL;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region, struct resource *res)
|
||||
{
|
||||
struct pci_controller *controller = PCI_CONTROLLER(dev);
|
||||
unsigned long offset = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < controller->windows; i++) {
|
||||
struct pci_window *window = &controller->window[i];
|
||||
if (!(window->resource.flags & res->flags))
|
||||
continue;
|
||||
if (window->resource.start > res->start)
|
||||
continue;
|
||||
if (window->resource.end < res->end)
|
||||
continue;
|
||||
offset = window->offset;
|
||||
break;
|
||||
}
|
||||
|
||||
region->start = res->start - offset;
|
||||
region->end = res->end - offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res, struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_controller *controller = PCI_CONTROLLER(dev);
|
||||
unsigned long offset = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < controller->windows; i++) {
|
||||
struct pci_window *window = &controller->window[i];
|
||||
if (!(window->resource.flags & res->flags))
|
||||
continue;
|
||||
if (window->resource.start - window->offset > region->start)
|
||||
continue;
|
||||
if (window->resource.end - window->offset < region->end)
|
||||
continue;
|
||||
offset = window->offset;
|
||||
break;
|
||||
}
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
|
||||
{
|
||||
unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
|
||||
|
@ -464,15 +417,11 @@ static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
|
|||
static void __devinit
|
||||
pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
|
||||
{
|
||||
struct pci_bus_region region;
|
||||
int i;
|
||||
|
||||
for (i = start; i < limit; i++) {
|
||||
if (!dev->resource[i].flags)
|
||||
continue;
|
||||
region.start = dev->resource[i].start;
|
||||
region.end = dev->resource[i].end;
|
||||
pcibios_bus_to_resource(dev, &dev->resource[i], ®ion);
|
||||
if ((is_valid_resource(dev, i)))
|
||||
pci_claim_resource(dev, i);
|
||||
}
|
||||
|
|
|
@ -297,7 +297,8 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
|
|||
s64 status = 0;
|
||||
struct pci_controller *controller;
|
||||
struct pcibus_bussoft *prom_bussoft_ptr;
|
||||
|
||||
LIST_HEAD(resources);
|
||||
int i;
|
||||
|
||||
status = sal_get_pcibus_info((u64) segment, (u64) busnum,
|
||||
(u64) ia64_tpa(&prom_bussoft_ptr));
|
||||
|
@ -315,7 +316,15 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
|
|||
*/
|
||||
controller->platform_data = prom_bussoft_ptr;
|
||||
|
||||
bus = pci_scan_bus(busnum, &pci_root_ops, controller);
|
||||
sn_legacy_pci_window_fixup(controller,
|
||||
prom_bussoft_ptr->bs_legacy_io,
|
||||
prom_bussoft_ptr->bs_legacy_mem);
|
||||
for (i = 0; i < controller->windows; i++)
|
||||
pci_add_resource_offset(&resources,
|
||||
&controller->window[i].resource,
|
||||
controller->window[i].offset);
|
||||
bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
|
||||
&resources);
|
||||
if (bus == NULL)
|
||||
goto error_return; /* error, or bus already scanned */
|
||||
|
||||
|
@ -348,9 +357,6 @@ sn_bus_fixup(struct pci_bus *bus)
|
|||
return;
|
||||
}
|
||||
sn_common_bus_fixup(bus, prom_bussoft_ptr);
|
||||
sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
|
||||
prom_bussoft_ptr->bs_legacy_io,
|
||||
prom_bussoft_ptr->bs_legacy_mem);
|
||||
}
|
||||
list_for_each_entry(pci_dev, &bus->devices, bus_list) {
|
||||
sn_io_slot_fixup(pci_dev);
|
||||
|
|
|
@ -10,7 +10,6 @@
|
|||
#include <linux/pci.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <asm-generic/pci-bridge.h>
|
||||
|
||||
struct device_node;
|
||||
|
||||
|
|
|
@ -94,14 +94,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
|
|||
*/
|
||||
#define PCI_DMA_BUS_IS_PHYS (1)
|
||||
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
|
||||
struct resource *res)
|
||||
{
|
||||
|
|
|
@ -46,9 +46,6 @@ static int global_phb_number; /* Global phb counter */
|
|||
/* ISA Memory physical address */
|
||||
resource_size_t isa_mem_base;
|
||||
|
||||
/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
|
||||
unsigned int pci_flags;
|
||||
|
||||
static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
|
||||
|
||||
unsigned long isa_io_base;
|
||||
|
@ -833,64 +830,7 @@ int pci_proc_domain(struct pci_bus *bus)
|
|||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(bus);
|
||||
|
||||
if (!(pci_flags & PCI_ENABLE_PROC_DOMAINS))
|
||||
return 0;
|
||||
if (pci_flags & PCI_COMPAT_DOMAIN_0)
|
||||
return hose->global_number != 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
|
||||
region->start = (res->start - offset) & mask;
|
||||
region->end = (res->end - offset) & mask;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
res->start = (region->start + offset) & mask;
|
||||
res->end = (region->end + offset) & mask;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/* Fixup a bus resource into a linux resource */
|
||||
static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
|
||||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
|
||||
res->start = (res->start + offset) & mask;
|
||||
res->end = (res->end + offset) & mask;
|
||||
}
|
||||
|
||||
/* This header fixup will do the resource fixup for all devices as they are
|
||||
|
@ -910,13 +850,7 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
|
|||
struct resource *res = dev->resource + i;
|
||||
if (!res->flags)
|
||||
continue;
|
||||
/* On platforms that have PCI_PROBE_ONLY set, we don't
|
||||
* consider 0 as an unassigned BAR value. It's technically
|
||||
* a valid value, but linux doesn't like it... so when we can
|
||||
* re-assign things, we do so, but if we can't, we keep it
|
||||
* around and hope for the best...
|
||||
*/
|
||||
if (res->start == 0 && !(pci_flags & PCI_PROBE_ONLY)) {
|
||||
if (res->start == 0) {
|
||||
pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]" \
|
||||
"is unassigned\n",
|
||||
pci_name(dev), i,
|
||||
|
@ -929,18 +863,11 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
|
|||
continue;
|
||||
}
|
||||
|
||||
pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n",
|
||||
pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]\n",
|
||||
pci_name(dev), i,
|
||||
(unsigned long long)res->start,\
|
||||
(unsigned long long)res->end,
|
||||
(unsigned int)res->flags);
|
||||
|
||||
fixup_resource(res, dev);
|
||||
|
||||
pr_debug("PCI:%s %016llx-%016llx\n",
|
||||
pci_name(dev),
|
||||
(unsigned long long)res->start,
|
||||
(unsigned long long)res->end);
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
|
||||
|
@ -959,10 +886,6 @@ static int __devinit pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
|
|||
u16 command;
|
||||
int i;
|
||||
|
||||
/* We don't do anything if PCI_PROBE_ONLY is set */
|
||||
if (pci_flags & PCI_PROBE_ONLY)
|
||||
return 0;
|
||||
|
||||
/* Job is a bit different between memory and IO */
|
||||
if (res->flags & IORESOURCE_MEM) {
|
||||
/* If the BAR is non-0 (res != pci_mem_offset) then it's
|
||||
|
@ -1037,9 +960,6 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
|
|||
(unsigned long long)res->end,
|
||||
(unsigned int)res->flags);
|
||||
|
||||
/* Perform fixup */
|
||||
fixup_resource(res, dev);
|
||||
|
||||
/* Try to detect uninitialized P2P bridge resources,
|
||||
* and clear them out so they get re-assigned later
|
||||
*/
|
||||
|
@ -1107,9 +1027,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
|
|||
|
||||
static int skip_isa_ioresource_align(struct pci_dev *dev)
|
||||
{
|
||||
if ((pci_flags & PCI_CAN_SKIP_ISA_ALIGN) &&
|
||||
!(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1236,8 +1153,6 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
|
|||
* and as such ensure proper re-allocation
|
||||
* later.
|
||||
*/
|
||||
if (pci_flags & PCI_REASSIGN_ALL_RSRC)
|
||||
goto clear_resource;
|
||||
pr = pci_find_parent_resource(bus->self, res);
|
||||
if (pr == res) {
|
||||
/* this happens when the generic PCI
|
||||
|
@ -1422,27 +1337,19 @@ void __init pcibios_resource_survey(void)
|
|||
list_for_each_entry(b, &pci_root_buses, node)
|
||||
pcibios_allocate_bus_resources(b);
|
||||
|
||||
if (!(pci_flags & PCI_REASSIGN_ALL_RSRC)) {
|
||||
pcibios_allocate_resources(0);
|
||||
pcibios_allocate_resources(1);
|
||||
}
|
||||
|
||||
/* Before we start assigning unassigned resource, we try to reserve
|
||||
* the low IO area and the VGA memory area if they intersect the
|
||||
* bus available resources to avoid allocating things on top of them
|
||||
*/
|
||||
if (!(pci_flags & PCI_PROBE_ONLY)) {
|
||||
list_for_each_entry(b, &pci_root_buses, node)
|
||||
pcibios_reserve_legacy_regions(b);
|
||||
}
|
||||
|
||||
/* Now, if the platform didn't decide to blindly trust the firmware,
|
||||
* we proceed to assigning things that were left unassigned
|
||||
*/
|
||||
if (!(pci_flags & PCI_PROBE_ONLY)) {
|
||||
/* Now proceed to assigning things that were left unassigned */
|
||||
pr_debug("PCI: Assigning unassigned resources...\n");
|
||||
pci_assign_unassigned_resources();
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
|
@ -1535,7 +1442,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
|
|||
res->end = res->start + IO_SPACE_LIMIT;
|
||||
res->flags = IORESOURCE_IO;
|
||||
}
|
||||
pci_add_resource(resources, res);
|
||||
pci_add_resource_offset(resources, res, hose->io_base_virt - _IO_BASE);
|
||||
|
||||
pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n",
|
||||
(unsigned long long)res->start,
|
||||
|
@ -1558,7 +1465,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
|
|||
res->flags = IORESOURCE_MEM;
|
||||
|
||||
}
|
||||
pci_add_resource(resources, res);
|
||||
pci_add_resource_offset(resources, res, hose->pci_mem_offset);
|
||||
|
||||
pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n",
|
||||
i, (unsigned long long)res->start,
|
||||
|
|
|
@ -92,6 +92,7 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
|||
#include <asm/scatterlist.h>
|
||||
#include <linux/string.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm-generic/pci-bridge.h>
|
||||
|
||||
struct pci_dev;
|
||||
|
||||
|
@ -112,12 +113,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
|||
}
|
||||
#endif
|
||||
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region, struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
|
||||
|
||||
static inline int pci_proc_domain(struct pci_bus *bus)
|
||||
|
@ -145,8 +140,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
|||
#define arch_setup_msi_irqs arch_setup_msi_irqs
|
||||
#endif
|
||||
|
||||
extern int pci_probe_only;
|
||||
|
||||
extern char * (*pcibios_plat_setup)(char *str);
|
||||
|
||||
#endif /* _ASM_PCI_H */
|
||||
|
|
|
@ -51,67 +51,6 @@ static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
|
||||
qube_raq_galileo_early_fixup);
|
||||
|
||||
static void __devinit cobalt_legacy_ide_resource_fixup(struct pci_dev *dev,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
|
||||
unsigned long offset = hose->io_offset;
|
||||
struct resource orig = *res;
|
||||
|
||||
if (!(res->flags & IORESOURCE_IO) ||
|
||||
!(res->flags & IORESOURCE_PCI_FIXED))
|
||||
return;
|
||||
|
||||
res->start -= offset;
|
||||
res->end -= offset;
|
||||
dev_printk(KERN_DEBUG, &dev->dev, "converted legacy %pR to bus %pR\n",
|
||||
&orig, res);
|
||||
}
|
||||
|
||||
static void __devinit cobalt_legacy_ide_fixup(struct pci_dev *dev)
|
||||
{
|
||||
u32 class;
|
||||
u8 progif;
|
||||
|
||||
/*
|
||||
* If the IDE controller is in legacy mode, pci_setup_device() fills in
|
||||
* the resources with the legacy addresses that normally appear on the
|
||||
* PCI bus, just as if we had read them from a BAR.
|
||||
*
|
||||
* However, with the GT-64111, those legacy addresses, e.g., 0x1f0,
|
||||
* will never appear on the PCI bus because it converts memory accesses
|
||||
* in the PCI I/O region (which is never at address zero) into I/O port
|
||||
* accesses with no address translation.
|
||||
*
|
||||
* For example, if GT_DEF_PCI0_IO_BASE is 0x10000000, a load or store
|
||||
* to physical address 0x100001f0 will become a PCI access to I/O port
|
||||
* 0x100001f0. There's no way to generate an access to I/O port 0x1f0,
|
||||
* but the VT82C586 IDE controller does respond at 0x100001f0 because
|
||||
* it only decodes the low 24 bits of the address.
|
||||
*
|
||||
* When this quirk runs, the pci_dev resources should contain bus
|
||||
* addresses, not Linux I/O port numbers, so convert legacy addresses
|
||||
* like 0x1f0 to bus addresses like 0x100001f0. Later, we'll convert
|
||||
* them back with pcibios_fixup_bus() or pcibios_bus_to_resource().
|
||||
*/
|
||||
class = dev->class >> 8;
|
||||
if (class != PCI_CLASS_STORAGE_IDE)
|
||||
return;
|
||||
|
||||
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
|
||||
if ((progif & 1) == 0) {
|
||||
cobalt_legacy_ide_resource_fixup(dev, &dev->resource[0]);
|
||||
cobalt_legacy_ide_resource_fixup(dev, &dev->resource[1]);
|
||||
}
|
||||
if ((progif & 4) == 0) {
|
||||
cobalt_legacy_ide_resource_fixup(dev, &dev->resource[2]);
|
||||
cobalt_legacy_ide_resource_fixup(dev, &dev->resource[3]);
|
||||
}
|
||||
}
|
||||
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
|
||||
cobalt_legacy_ide_fixup);
|
||||
|
||||
static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
|
||||
{
|
||||
unsigned short cfgword;
|
||||
|
|
|
@ -204,7 +204,7 @@ static int __init bcm1480_pcibios_init(void)
|
|||
uint64_t reg;
|
||||
|
||||
/* CFE will assign PCI resources */
|
||||
pci_probe_only = 1;
|
||||
pci_set_flags(PCI_PROBE_ONLY);
|
||||
|
||||
/* Avoid ISA compat ranges. */
|
||||
PCIBIOS_MIN_IO = 0x00008000UL;
|
||||
|
|
|
@ -50,7 +50,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
|
|||
bridge_t *bridge;
|
||||
int slot;
|
||||
|
||||
pci_probe_only = 1;
|
||||
pci_set_flags(PCI_PROBE_ONLY);
|
||||
|
||||
printk("a bridge\n");
|
||||
|
||||
|
|
|
@ -270,7 +270,8 @@ static int __devinit ltq_pci_probe(struct platform_device *pdev)
|
|||
{
|
||||
struct ltq_pci_data *ltq_pci_data =
|
||||
(struct ltq_pci_data *) pdev->dev.platform_data;
|
||||
pci_probe_only = 0;
|
||||
|
||||
pci_clear_flags(PCI_PROBE_ONLY);
|
||||
ltq_pci_irq_map = ltq_pci_data->irq;
|
||||
ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE);
|
||||
ltq_pci_mapped_cfg =
|
||||
|
|
|
@ -213,7 +213,7 @@ static int __init sb1250_pcibios_init(void)
|
|||
uint64_t reg;
|
||||
|
||||
/* CFE will assign PCI resources */
|
||||
pci_probe_only = 1;
|
||||
pci_set_flags(PCI_PROBE_ONLY);
|
||||
|
||||
/* Avoid ISA compat ranges. */
|
||||
PCIBIOS_MIN_IO = 0x00008000UL;
|
||||
|
|
|
@ -292,7 +292,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
|
|||
static int __init pcibios_init(void)
|
||||
{
|
||||
/* PSB assigns PCI resources */
|
||||
pci_probe_only = 1;
|
||||
pci_set_flags(PCI_PROBE_ONLY);
|
||||
pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20);
|
||||
|
||||
/* Extend IO port for memory mapped io */
|
||||
|
|
|
@ -20,16 +20,9 @@
|
|||
#include <asm/cpu-info.h>
|
||||
|
||||
/*
|
||||
* Indicate whether we respect the PCI setup left by the firmware.
|
||||
*
|
||||
* Make this long-lived so that we know when shutting down
|
||||
* whether we probed only or not.
|
||||
* If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
|
||||
* assignments.
|
||||
*/
|
||||
int pci_probe_only;
|
||||
|
||||
#define PCI_ASSIGN_ALL_BUSSES 1
|
||||
|
||||
unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
|
||||
|
||||
/*
|
||||
* The PCI controller list.
|
||||
|
@ -92,11 +85,12 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
|
|||
if (!hose->iommu)
|
||||
PCI_DMA_BUS_IS_PHYS = 1;
|
||||
|
||||
if (hose->get_busno && pci_probe_only)
|
||||
if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY))
|
||||
next_busno = (*hose->get_busno)();
|
||||
|
||||
pci_add_resource(&resources, hose->mem_resource);
|
||||
pci_add_resource(&resources, hose->io_resource);
|
||||
pci_add_resource_offset(&resources,
|
||||
hose->mem_resource, hose->mem_offset);
|
||||
pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset);
|
||||
bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
|
||||
&resources);
|
||||
if (!bus)
|
||||
|
@ -115,7 +109,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
|
|||
need_domain_info = 1;
|
||||
}
|
||||
|
||||
if (!pci_probe_only) {
|
||||
if (!pci_has_flag(PCI_PROBE_ONLY)) {
|
||||
pci_bus_size_bridges(bus);
|
||||
pci_bus_assign_resources(bus);
|
||||
pci_enable_bridges(bus);
|
||||
|
@ -241,7 +235,7 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
|
|||
|
||||
unsigned int pcibios_assign_all_busses(void)
|
||||
{
|
||||
return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int pcibios_enable_device(struct pci_dev *dev, int mask)
|
||||
|
@ -254,45 +248,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
|
|||
return pcibios_plat_dev_init(dev);
|
||||
}
|
||||
|
||||
static void pcibios_fixup_device_resources(struct pci_dev *dev,
|
||||
struct pci_bus *bus)
|
||||
{
|
||||
/* Update device resources. */
|
||||
struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
|
||||
unsigned long offset = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
|
||||
if (!dev->resource[i].start)
|
||||
continue;
|
||||
if (dev->resource[i].flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (dev->resource[i].flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
dev->resource[i].start += offset;
|
||||
dev->resource[i].end += offset;
|
||||
}
|
||||
}
|
||||
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
/* Propagate hose info into the subordinate devices. */
|
||||
|
||||
struct list_head *ln;
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (pci_probe_only && dev &&
|
||||
if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
|
||||
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
|
||||
pci_read_bridge_bases(bus);
|
||||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
|
||||
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
|
||||
dev = pci_dev_b(ln);
|
||||
|
||||
if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
|
||||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -302,40 +264,7 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
|
|||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
region->start = res->start - offset;
|
||||
region->end = res->end - offset;
|
||||
}
|
||||
|
||||
void __devinit
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
EXPORT_SYMBOL(PCIBIOS_MIN_IO);
|
||||
EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
|
||||
#endif
|
||||
|
|
|
@ -85,22 +85,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
|||
/* implement the pci_ DMA API in terms of the generic device dma_ one */
|
||||
#include <asm-generic/pci-dma-compat.h>
|
||||
|
||||
/**
|
||||
* pcibios_resource_to_bus - convert resource to PCI bus address
|
||||
* @dev: device which owns this resource
|
||||
* @region: converted bus-centric region (start,end)
|
||||
* @res: resource to convert
|
||||
*
|
||||
* Convert a resource to a PCI device bus address or bus window.
|
||||
*/
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline struct resource *
|
||||
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
|
||||
{
|
||||
|
|
|
@ -32,8 +32,7 @@ struct pci_ops *pci_root_ops;
|
|||
* insert specific PCI bus resources instead of using the platform-level bus
|
||||
* resources directly for the PCI root bus.
|
||||
*
|
||||
* These are configured and inserted by pcibios_init() and are attached to the
|
||||
* root bus by pcibios_fixup_bus().
|
||||
* These are configured and inserted by pcibios_init().
|
||||
*/
|
||||
static struct resource pci_ioport_resource = {
|
||||
.name = "PCI IO",
|
||||
|
@ -77,52 +76,6 @@ static inline int __query(const struct pci_bus *bus, unsigned int devfn)
|
|||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* translate Linuxcentric addresses to PCI bus addresses
|
||||
*/
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
region->start = (res->start & 0x00ffffff);
|
||||
region->end = (res->end & 0x00ffffff);
|
||||
}
|
||||
|
||||
if (res->flags & IORESOURCE_MEM) {
|
||||
region->start = (res->start & 0x03ffffff) | MEM_PAGING_REG;
|
||||
region->end = (res->end & 0x03ffffff) | MEM_PAGING_REG;
|
||||
}
|
||||
|
||||
#if 0
|
||||
printk(KERN_DEBUG "RES->BUS: %lx-%lx => %lx-%lx\n",
|
||||
res->start, res->end, region->start, region->end);
|
||||
#endif
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
/*
|
||||
* translate PCI bus addresses to Linuxcentric addresses
|
||||
*/
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
res->start = (region->start & 0x00ffffff) | 0xbe000000;
|
||||
res->end = (region->end & 0x00ffffff) | 0xbe000000;
|
||||
}
|
||||
|
||||
if (res->flags & IORESOURCE_MEM) {
|
||||
res->start = (region->start & 0x03ffffff) | 0xb8000000;
|
||||
res->end = (region->end & 0x03ffffff) | 0xb8000000;
|
||||
}
|
||||
|
||||
#if 0
|
||||
printk(KERN_INFO "BUS->RES: %lx-%lx => %lx-%lx\n",
|
||||
region->start, region->end, res->start, res->end);
|
||||
#endif
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
|
@ -364,9 +317,6 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
|
|||
if (!dev->resource[i].flags)
|
||||
continue;
|
||||
|
||||
region.start = dev->resource[i].start;
|
||||
region.end = dev->resource[i].end;
|
||||
pcibios_bus_to_resource(dev, &dev->resource[i], ®ion);
|
||||
if (is_valid_resource(dev, i))
|
||||
pci_claim_resource(dev, i);
|
||||
}
|
||||
|
@ -397,6 +347,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
*/
|
||||
static int __init pcibios_init(void)
|
||||
{
|
||||
resource_size_t io_offset, mem_offset;
|
||||
LIST_HEAD(resources);
|
||||
|
||||
ioport_resource.start = 0xA0000000;
|
||||
|
@ -420,8 +371,13 @@ static int __init pcibios_init(void)
|
|||
printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
|
||||
MEM_PAGING_REG);
|
||||
|
||||
pci_add_resource(&resources, &pci_ioport_resource);
|
||||
pci_add_resource(&resources, &pci_iomem_resource);
|
||||
io_offset = pci_ioport_resource.start -
|
||||
(pci_ioport_resource.start & 0x00ffffff);
|
||||
mem_offset = pci_iomem_resource.start -
|
||||
((pci_iomem_resource.start & 0x03ffffff) | MEM_PAGING_REG);
|
||||
|
||||
pci_add_resource_offset(&resources, &pci_ioport_resource, io_offset);
|
||||
pci_add_resource_offset(&resources, &pci_iomem_resource, mem_offset);
|
||||
pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL,
|
||||
&resources);
|
||||
|
||||
|
|
|
@ -82,38 +82,8 @@ struct pci_hba_data {
|
|||
|
||||
#ifdef CONFIG_64BIT
|
||||
#define PCI_F_EXTEND 0xffffffff00000000UL
|
||||
#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
|
||||
|
||||
/* We need to know if an address is LMMMIO or GMMIO.
|
||||
* LMMIO requires mangling and GMMIO we must use as-is.
|
||||
*/
|
||||
static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
|
||||
{
|
||||
return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
|
||||
}
|
||||
|
||||
/*
|
||||
** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
|
||||
** See pci.c for more conversions used by Generic PCI code.
|
||||
**
|
||||
** Platform characteristics/firmware guarantee that
|
||||
** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
|
||||
** (2) PA_VIEW == IO_VIEW for GMMIO
|
||||
*/
|
||||
#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
|
||||
? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
|
||||
: (a)) /* GMMIO */
|
||||
#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
|
||||
? (a) + hba->lmmio_space_offset \
|
||||
: (a))
|
||||
|
||||
#else /* !CONFIG_64BIT */
|
||||
|
||||
#define PCI_BUS_ADDR(hba,a) (a)
|
||||
#define PCI_HOST_ADDR(hba,a) (a)
|
||||
#define PCI_F_EXTEND 0UL
|
||||
#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
|
||||
|
||||
#endif /* !CONFIG_64BIT */
|
||||
|
||||
/*
|
||||
|
@ -245,14 +215,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
|||
}
|
||||
#endif
|
||||
|
||||
extern void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline void pcibios_penalize_isa_irq(int irq, int active)
|
||||
{
|
||||
/* We don't need to penalize isa irq's */
|
||||
|
|
|
@ -195,58 +195,6 @@ void __init pcibios_init_bus(struct pci_bus *bus)
|
|||
pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl);
|
||||
}
|
||||
|
||||
/* called by drivers/pci/setup-bus.c:pci_setup_bridge(). */
|
||||
void __devinit pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region, struct resource *res)
|
||||
{
|
||||
#ifdef CONFIG_64BIT
|
||||
struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
|
||||
#endif
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
/*
|
||||
** I/O space may see busnumbers here. Something
|
||||
** in the form of 0xbbxxxx where bb is the bus num
|
||||
** and xxxx is the I/O port space address.
|
||||
** Remaining address translation are done in the
|
||||
** PCI Host adapter specific code - ie dino_out8.
|
||||
*/
|
||||
region->start = PCI_PORT_ADDR(res->start);
|
||||
region->end = PCI_PORT_ADDR(res->end);
|
||||
} else if (res->flags & IORESOURCE_MEM) {
|
||||
/* Convert MMIO addr to PCI addr (undo global virtualization) */
|
||||
region->start = PCI_BUS_ADDR(hba, res->start);
|
||||
region->end = PCI_BUS_ADDR(hba, res->end);
|
||||
}
|
||||
|
||||
DBG_RES("pcibios_resource_to_bus(%02x %s [%lx,%lx])\n",
|
||||
dev->bus->number, res->flags & IORESOURCE_IO ? "IO" : "MEM",
|
||||
region->start, region->end);
|
||||
}
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
#ifdef CONFIG_64BIT
|
||||
struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
|
||||
#endif
|
||||
|
||||
if (res->flags & IORESOURCE_MEM) {
|
||||
res->start = PCI_HOST_ADDR(hba, region->start);
|
||||
res->end = PCI_HOST_ADDR(hba, region->end);
|
||||
}
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
res->start = region->start;
|
||||
res->end = region->end;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* pcibios align resources() is called every time generic PCI code
|
||||
* wants to generate a new address. The process of looking for
|
||||
|
|
|
@ -154,14 +154,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
|
|||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev,
|
||||
struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
extern void pcibios_claim_one_bus(struct pci_bus *b);
|
||||
|
||||
extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
|
||||
|
|
|
@ -45,8 +45,6 @@ extern void init_pci_config_tokens (void);
|
|||
extern unsigned long get_phb_buid (struct device_node *);
|
||||
extern int rtas_setup_phb(struct pci_controller *phb);
|
||||
|
||||
extern unsigned long pci_probe_only;
|
||||
|
||||
/* ---- EEH internal-use-only related routines ---- */
|
||||
#ifdef CONFIG_EEH
|
||||
|
||||
|
|
|
@ -50,9 +50,6 @@ static int global_phb_number; /* Global phb counter */
|
|||
/* ISA Memory physical address */
|
||||
resource_size_t isa_mem_base;
|
||||
|
||||
/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
|
||||
unsigned int pci_flags = 0;
|
||||
|
||||
|
||||
static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
|
||||
|
||||
|
@ -849,60 +846,6 @@ int pci_proc_domain(struct pci_bus *bus)
|
|||
return 1;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
|
||||
region->start = (res->start - offset) & mask;
|
||||
region->end = (res->end - offset) & mask;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
res->start = (region->start + offset) & mask;
|
||||
res->end = (region->end + offset) & mask;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/* Fixup a bus resource into a linux resource */
|
||||
static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
|
||||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
resource_size_t offset = 0, mask = (resource_size_t)-1;
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
mask = 0xffffffffu;
|
||||
} else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
|
||||
res->start = (res->start + offset) & mask;
|
||||
res->end = (res->end + offset) & mask;
|
||||
}
|
||||
|
||||
|
||||
/* This header fixup will do the resource fixup for all devices as they are
|
||||
* probed, but not for bridge ranges
|
||||
*/
|
||||
|
@ -942,18 +885,11 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
|
|||
continue;
|
||||
}
|
||||
|
||||
pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n",
|
||||
pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]\n",
|
||||
pci_name(dev), i,
|
||||
(unsigned long long)res->start,\
|
||||
(unsigned long long)res->end,
|
||||
(unsigned int)res->flags);
|
||||
|
||||
fixup_resource(res, dev);
|
||||
|
||||
pr_debug("PCI:%s %016llx-%016llx\n",
|
||||
pci_name(dev),
|
||||
(unsigned long long)res->start,
|
||||
(unsigned long long)res->end);
|
||||
}
|
||||
|
||||
/* Call machine specific resource fixup */
|
||||
|
@ -1055,27 +991,18 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
|
|||
continue;
|
||||
}
|
||||
|
||||
pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
|
||||
pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x]\n",
|
||||
pci_name(dev), i,
|
||||
(unsigned long long)res->start,\
|
||||
(unsigned long long)res->end,
|
||||
(unsigned int)res->flags);
|
||||
|
||||
/* Perform fixup */
|
||||
fixup_resource(res, dev);
|
||||
|
||||
/* Try to detect uninitialized P2P bridge resources,
|
||||
* and clear them out so they get re-assigned later
|
||||
*/
|
||||
if (pcibios_uninitialized_bridge_resource(bus, res)) {
|
||||
res->flags = 0;
|
||||
pr_debug("PCI:%s (unassigned)\n", pci_name(dev));
|
||||
} else {
|
||||
|
||||
pr_debug("PCI:%s %016llx-%016llx\n",
|
||||
pci_name(dev),
|
||||
(unsigned long long)res->start,
|
||||
(unsigned long long)res->end);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1589,7 +1516,8 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
|
|||
(unsigned long long)res->start,
|
||||
(unsigned long long)res->end,
|
||||
(unsigned long)res->flags);
|
||||
pci_add_resource(resources, res);
|
||||
pci_add_resource_offset(resources, res,
|
||||
(resource_size_t) hose->io_base_virt - _IO_BASE);
|
||||
|
||||
/* Hookup PHB Memory resources */
|
||||
for (i = 0; i < 3; ++i) {
|
||||
|
@ -1612,7 +1540,7 @@ static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, s
|
|||
(unsigned long long)res->start,
|
||||
(unsigned long long)res->end,
|
||||
(unsigned long)res->flags);
|
||||
pci_add_resource(resources, res);
|
||||
pci_add_resource_offset(resources, res, hose->pci_mem_offset);
|
||||
}
|
||||
|
||||
pr_debug("PCI: PHB MEM offset = %016llx\n",
|
||||
|
|
|
@ -33,8 +33,6 @@
|
|||
#include <asm/machdep.h>
|
||||
#include <asm/ppc-pci.h>
|
||||
|
||||
unsigned long pci_probe_only = 1;
|
||||
|
||||
/* pci_io_base -- the base address from which io bars are offsets.
|
||||
* This is the lowest I/O base address (so bar values are always positive),
|
||||
* and it *must* be the start of ISA space if an ISA bus exists because
|
||||
|
@ -55,9 +53,6 @@ static int __init pcibios_init(void)
|
|||
*/
|
||||
ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
|
||||
|
||||
if (pci_probe_only)
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
|
||||
/* On ppc64, we always enable PCI domains and we keep domain 0
|
||||
* backward compatible in /proc for video cards
|
||||
*/
|
||||
|
|
|
@ -276,7 +276,7 @@ void __init find_and_init_phbs(void)
|
|||
pci_devs_phb_init();
|
||||
|
||||
/*
|
||||
* pci_probe_only and pci_assign_all_buses can be set via properties
|
||||
* PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
|
||||
* in chosen.
|
||||
*/
|
||||
if (of_chosen) {
|
||||
|
@ -284,8 +284,12 @@ void __init find_and_init_phbs(void)
|
|||
|
||||
prop = of_get_property(of_chosen,
|
||||
"linux,pci-probe-only", NULL);
|
||||
if (prop)
|
||||
pci_probe_only = *prop;
|
||||
if (prop) {
|
||||
if (*prop)
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
else
|
||||
pci_clear_flags(PCI_PROBE_ONLY);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32 /* Will be made generic soon */
|
||||
prop = of_get_property(of_chosen,
|
||||
|
|
|
@ -868,7 +868,7 @@ void __init iSeries_pcibios_init(void)
|
|||
/* Install IO hooks */
|
||||
ppc_pci_io = iseries_pci_io;
|
||||
|
||||
pci_probe_only = 1;
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
|
||||
/* iSeries has no IO space in the common sense, it needs to set
|
||||
* the IO base to 0
|
||||
|
|
|
@ -620,7 +620,7 @@ void __init maple_pci_init(void)
|
|||
}
|
||||
|
||||
/* Tell pci.c to not change any resource allocations. */
|
||||
pci_probe_only = 1;
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
}
|
||||
|
||||
int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel)
|
||||
|
|
|
@ -231,7 +231,7 @@ void __init pas_pci_init(void)
|
|||
pci_devs_phb_init();
|
||||
|
||||
/* Use the common resource allocation mechanism */
|
||||
pci_probe_only = 1;
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
}
|
||||
|
||||
void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
|
||||
|
|
|
@ -1059,9 +1059,6 @@ void __init pmac_pci_init(void)
|
|||
}
|
||||
/* pmac_check_ht_link(); */
|
||||
|
||||
/* We can allocate missing resources if any */
|
||||
pci_probe_only = 0;
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
init_p2pbridge();
|
||||
init_second_ohare();
|
||||
|
|
|
@ -1299,15 +1299,14 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
|
|||
/* Setup MSI support */
|
||||
pnv_pci_init_ioda_msis(phb);
|
||||
|
||||
/* We set both probe_only and PCI_REASSIGN_ALL_RSRC. This is an
|
||||
/* We set both PCI_PROBE_ONLY and PCI_REASSIGN_ALL_RSRC. This is an
|
||||
* odd combination which essentially means that we skip all resource
|
||||
* fixups and assignments in the generic code, and do it all
|
||||
* ourselves here
|
||||
*/
|
||||
pci_probe_only = 1;
|
||||
ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb;
|
||||
ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
|
||||
pci_add_flags(PCI_REASSIGN_ALL_RSRC);
|
||||
pci_add_flags(PCI_PROBE_ONLY | PCI_REASSIGN_ALL_RSRC);
|
||||
|
||||
/* Reset IODA tables to a clean state */
|
||||
rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
|
||||
|
|
|
@ -555,10 +555,7 @@ void __init pnv_pci_init(void)
|
|||
{
|
||||
struct device_node *np;
|
||||
|
||||
pci_set_flags(PCI_CAN_SKIP_ISA_ALIGN);
|
||||
|
||||
/* We do not want to just probe */
|
||||
pci_probe_only = 0;
|
||||
pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN);
|
||||
|
||||
/* OPAL absent, try POPAL first then RTAS detection of PHBs */
|
||||
if (!firmware_has_feature(FW_FEATURE_OPAL)) {
|
||||
|
|
|
@ -380,6 +380,9 @@ static void __init pSeries_setup_arch(void)
|
|||
|
||||
fwnmi_init();
|
||||
|
||||
/* By default, only probe PCI (can be overriden by rtas_pci) */
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
|
||||
/* Find and initialize PCI host bridges */
|
||||
init_pci_config_tokens();
|
||||
find_and_init_phbs();
|
||||
|
|
|
@ -682,7 +682,6 @@ static int __init wsp_setup_one_phb(struct device_node *np)
|
|||
/* XXX Force re-assigning of everything for now */
|
||||
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC |
|
||||
PCI_ENABLE_PROC_DOMAINS);
|
||||
pci_probe_only = 0;
|
||||
|
||||
/* Calculate how the TCE space is divided */
|
||||
phb->dma32_base = 0;
|
||||
|
|
|
@ -37,11 +37,20 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
|
|||
static int next_busno;
|
||||
static int need_domain_info;
|
||||
LIST_HEAD(resources);
|
||||
struct resource *res;
|
||||
resource_size_t offset;
|
||||
int i;
|
||||
struct pci_bus *bus;
|
||||
|
||||
for (i = 0; i < hose->nr_resources; i++)
|
||||
pci_add_resource(&resources, hose->resources + i);
|
||||
for (i = 0; i < hose->nr_resources; i++) {
|
||||
res = hose->resources + i;
|
||||
offset = 0;
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
pci_add_resource_offset(&resources, res, offset);
|
||||
}
|
||||
|
||||
bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
|
||||
&resources);
|
||||
|
@ -143,42 +152,12 @@ static int __init pcibios_init(void)
|
|||
}
|
||||
subsys_initcall(pcibios_init);
|
||||
|
||||
static void pcibios_fixup_device_resources(struct pci_dev *dev,
|
||||
struct pci_bus *bus)
|
||||
{
|
||||
/* Update device resources. */
|
||||
struct pci_channel *hose = bus->sysdata;
|
||||
unsigned long offset = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
|
||||
if (!dev->resource[i].start)
|
||||
continue;
|
||||
if (dev->resource[i].flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (dev->resource[i].flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
dev->resource[i].start += offset;
|
||||
dev->resource[i].end += offset;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Called after each bus is probed, but before its children
|
||||
* are examined.
|
||||
*/
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct list_head *ln;
|
||||
|
||||
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
|
||||
dev = pci_dev_b(ln);
|
||||
|
||||
if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
|
||||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -208,36 +187,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
|
|||
return start;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_channel *hose = dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
region->start = res->start - offset;
|
||||
region->end = res->end - offset;
|
||||
}
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_channel *hose = dev->sysdata;
|
||||
unsigned long offset = 0;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
offset = hose->io_offset;
|
||||
else if (res->flags & IORESOURCE_MEM)
|
||||
offset = hose->mem_offset;
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
|
||||
int pcibios_enable_device(struct pci_dev *dev, int mask)
|
||||
{
|
||||
return pci_enable_resources(dev, mask);
|
||||
|
@ -381,8 +330,6 @@ EXPORT_SYMBOL(pci_iounmap);
|
|||
#endif /* CONFIG_GENERIC_IOMAP */
|
||||
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
EXPORT_SYMBOL(PCIBIOS_MIN_IO);
|
||||
EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
|
||||
#endif
|
||||
|
|
|
@ -114,12 +114,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
|||
/* Board-specific fixup routines. */
|
||||
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
|
||||
|
||||
extern void pcibios_resource_to_bus(struct pci_dev *dev,
|
||||
struct pci_bus_region *region, struct resource *res);
|
||||
|
||||
extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
|
||||
|
||||
static inline int pci_proc_domain(struct pci_bus *bus)
|
||||
|
|
|
@ -52,14 +52,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
|||
* 64Kbytes by the Host controller.
|
||||
*/
|
||||
|
||||
extern void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
||||
{
|
||||
return PCI_IRQ_NONE;
|
||||
|
|
|
@ -73,14 +73,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
|||
enum pci_mmap_state mmap_state,
|
||||
int write_combine);
|
||||
|
||||
extern void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
|
||||
extern void
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
|
||||
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
||||
{
|
||||
return PCI_IRQ_NONE;
|
||||
|
|
|
@ -15,14 +15,19 @@
|
|||
|
||||
/* The LEON architecture does not rely on a BIOS or bootloader to setup
|
||||
* PCI for us. The Linux generic routines are used to setup resources,
|
||||
* reset values of confuration-space registers settings ae preseved.
|
||||
* reset values of configuration-space register settings are preserved.
|
||||
*
|
||||
* PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
|
||||
* accessed through a Window which is translated to low 64KB in PCI space, the
|
||||
* first 4KB is not used so 60KB is available.
|
||||
*/
|
||||
void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
|
||||
{
|
||||
LIST_HEAD(resources);
|
||||
struct pci_bus *root_bus;
|
||||
|
||||
pci_add_resource(&resources, &info->io_space);
|
||||
pci_add_resource_offset(&resources, &info->io_space,
|
||||
info->io_space.start - 0x1000);
|
||||
pci_add_resource(&resources, &info->mem_space);
|
||||
|
||||
root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
|
||||
|
@ -38,44 +43,6 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
|
|||
}
|
||||
}
|
||||
|
||||
/* PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
|
||||
* accessed through a Window which is translated to low 64KB in PCI space, the
|
||||
* first 4KB is not used so 60KB is available.
|
||||
*
|
||||
* This function is used by generic code to translate resource addresses into
|
||||
* PCI addresses.
|
||||
*/
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct leon_pci_info *info = dev->bus->sysdata;
|
||||
|
||||
region->start = res->start;
|
||||
region->end = res->end;
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
region->start -= (info->io_space.start - 0x1000);
|
||||
region->end -= (info->io_space.start - 0x1000);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
/* see pcibios_resource_to_bus() comment */
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct leon_pci_info *info = dev->bus->sysdata;
|
||||
|
||||
res->start = region->start;
|
||||
res->end = region->end;
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
res->start += (info->io_space.start - 0x1000);
|
||||
res->end += (info->io_space.start - 0x1000);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
|
||||
{
|
||||
struct leon_pci_info *info = pbus->sysdata;
|
||||
|
|
|
@ -691,8 +691,10 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
|
|||
|
||||
printk("PCI: Scanning PBM %s\n", node->full_name);
|
||||
|
||||
pci_add_resource(&resources, &pbm->io_space);
|
||||
pci_add_resource(&resources, &pbm->mem_space);
|
||||
pci_add_resource_offset(&resources, &pbm->io_space,
|
||||
pbm->io_space.start);
|
||||
pci_add_resource_offset(&resources, &pbm->mem_space,
|
||||
pbm->mem_space.start);
|
||||
bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
|
||||
pbm, &resources);
|
||||
if (!bus) {
|
||||
|
@ -755,46 +757,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *pdev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_pbm_info *pbm = pdev->bus->sysdata;
|
||||
struct resource zero_res, *root;
|
||||
|
||||
zero_res.start = 0;
|
||||
zero_res.end = 0;
|
||||
zero_res.flags = res->flags;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
root = &pbm->io_space;
|
||||
else
|
||||
root = &pbm->mem_space;
|
||||
|
||||
pci_resource_adjust(&zero_res, root);
|
||||
|
||||
region->start = res->start - zero_res.start;
|
||||
region->end = res->end - zero_res.start;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_pbm_info *pbm = pdev->bus->sysdata;
|
||||
struct resource *root;
|
||||
|
||||
res->start = region->start;
|
||||
res->end = region->end;
|
||||
|
||||
if (res->flags & IORESOURCE_IO)
|
||||
root = &pbm->io_space;
|
||||
else
|
||||
root = &pbm->mem_space;
|
||||
|
||||
pci_resource_adjust(res, root);
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
char * __devinit pcibios_setup(char *str)
|
||||
{
|
||||
return str;
|
||||
|
|
|
@ -19,9 +19,9 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm-generic/pci-bridge.h>
|
||||
|
||||
static int debug_pci;
|
||||
static int use_firmware;
|
||||
|
||||
#define CONFIG_CMD(bus, devfn, where) \
|
||||
(0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
|
||||
|
@ -276,7 +276,7 @@ static int __init pci_common_init(void)
|
|||
|
||||
pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq);
|
||||
|
||||
if (!use_firmware) {
|
||||
if (!pci_has_flag(PCI_PROBE_ONLY)) {
|
||||
/*
|
||||
* Size the bridge windows.
|
||||
*/
|
||||
|
@ -303,7 +303,7 @@ char * __devinit pcibios_setup(char *str)
|
|||
debug_pci = 1;
|
||||
return NULL;
|
||||
} else if (!strcmp(str, "firmware")) {
|
||||
use_firmware = 1;
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
return NULL;
|
||||
}
|
||||
return str;
|
||||
|
|
|
@ -153,7 +153,7 @@ static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
|
|||
}
|
||||
res->start += io_offset;
|
||||
res->end += io_offset;
|
||||
pci_add_resource(resources, res);
|
||||
pci_add_resource_offset(resources, res, io_offset);
|
||||
|
||||
for (i = 0; i < 3; i++) {
|
||||
res = &pci_ctrl->mem_resources[i];
|
||||
|
@ -200,24 +200,9 @@ subsys_initcall(pcibios_init);
|
|||
|
||||
void __init pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_controller *pci_ctrl = bus->sysdata;
|
||||
struct resource *res;
|
||||
unsigned long io_offset;
|
||||
int i;
|
||||
|
||||
io_offset = (unsigned long)pci_ctrl->io_space.base;
|
||||
if (bus->parent) {
|
||||
/* This is a subordinate bridge */
|
||||
pci_read_bridge_bases(bus);
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
if ((res = bus->resource[i]) == NULL || !res->flags)
|
||||
continue;
|
||||
if (io_offset && (res->flags & IORESOURCE_IO)) {
|
||||
res->start += io_offset;
|
||||
res->end += io_offset;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -553,7 +553,6 @@ dino_fixup_bus(struct pci_bus *bus)
|
|||
struct list_head *ln;
|
||||
struct pci_dev *dev;
|
||||
struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
|
||||
int port_base = HBA_PORT_BASE(dino_dev->hba.hba_num);
|
||||
|
||||
DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n",
|
||||
__func__, bus, bus->secondary,
|
||||
|
@ -599,8 +598,6 @@ dino_fixup_bus(struct pci_bus *bus)
|
|||
|
||||
|
||||
list_for_each(ln, &bus->devices) {
|
||||
int i;
|
||||
|
||||
dev = pci_dev_b(ln);
|
||||
if (is_card_dino(&dino_dev->hba.dev->id))
|
||||
dino_card_fixup(dev);
|
||||
|
@ -612,21 +609,6 @@ dino_fixup_bus(struct pci_bus *bus)
|
|||
if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
|
||||
continue;
|
||||
|
||||
/* Adjust the I/O Port space addresses */
|
||||
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
|
||||
struct resource *res = &dev->resource[i];
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
res->start |= port_base;
|
||||
res->end |= port_base;
|
||||
}
|
||||
#ifdef __LP64__
|
||||
/* Sign Extend MMIO addresses */
|
||||
else if (res->flags & IORESOURCE_MEM) {
|
||||
res->start |= F_EXTEND(0UL);
|
||||
res->end |= F_EXTEND(0UL);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
/* null out the ROM resource if there is one (we don't
|
||||
* care about an expansion rom on parisc, since it
|
||||
* usually contains (x86) bios code) */
|
||||
|
@ -991,11 +973,14 @@ static int __init dino_probe(struct parisc_device *dev)
|
|||
|
||||
dev->dev.platform_data = dino_dev;
|
||||
|
||||
pci_add_resource(&resources, &dino_dev->hba.io_space);
|
||||
pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
|
||||
HBA_PORT_BASE(dino_dev->hba.hba_num));
|
||||
if (dino_dev->hba.lmmio_space.flags)
|
||||
pci_add_resource(&resources, &dino_dev->hba.lmmio_space);
|
||||
pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
|
||||
dino_dev->hba.lmmio_space_offset);
|
||||
if (dino_dev->hba.elmmio_space.flags)
|
||||
pci_add_resource(&resources, &dino_dev->hba.elmmio_space);
|
||||
pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
|
||||
dino_dev->hba.lmmio_space_offset);
|
||||
if (dino_dev->hba.gmmio_space.flags)
|
||||
pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
|
||||
|
||||
|
|
|
@ -635,7 +635,6 @@ lba_fixup_bus(struct pci_bus *bus)
|
|||
u16 status;
|
||||
#endif
|
||||
struct lba_device *ldev = LBA_DEV(parisc_walk_tree(bus->bridge));
|
||||
int lba_portbase = HBA_PORT_BASE(ldev->hba.hba_num);
|
||||
|
||||
DBG("lba_fixup_bus(0x%p) bus %d platform_data 0x%p\n",
|
||||
bus, bus->secondary, bus->bridge->platform_data);
|
||||
|
@ -726,27 +725,6 @@ lba_fixup_bus(struct pci_bus *bus)
|
|||
if (!res->start)
|
||||
continue;
|
||||
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
DBG("lba_fixup_bus() I/O Ports [%lx/%lx] -> ",
|
||||
res->start, res->end);
|
||||
res->start |= lba_portbase;
|
||||
res->end |= lba_portbase;
|
||||
DBG("[%lx/%lx]\n", res->start, res->end);
|
||||
} else if (res->flags & IORESOURCE_MEM) {
|
||||
/*
|
||||
** Convert PCI (IO_VIEW) addresses to
|
||||
** processor (PA_VIEW) addresses
|
||||
*/
|
||||
DBG("lba_fixup_bus() MMIO [%lx/%lx] -> ",
|
||||
res->start, res->end);
|
||||
res->start = PCI_HOST_ADDR(HBA_DATA(ldev), res->start);
|
||||
res->end = PCI_HOST_ADDR(HBA_DATA(ldev), res->end);
|
||||
DBG("[%lx/%lx]\n", res->start, res->end);
|
||||
} else {
|
||||
DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX",
|
||||
res->flags, res->start, res->end);
|
||||
}
|
||||
|
||||
/*
|
||||
** FIXME: this will result in whinging for devices
|
||||
** that share expansion ROMs (think quad tulip), but
|
||||
|
@ -1514,11 +1492,14 @@ lba_driver_probe(struct parisc_device *dev)
|
|||
lba_dev->hba.lmmio_space.flags = 0;
|
||||
}
|
||||
|
||||
pci_add_resource(&resources, &lba_dev->hba.io_space);
|
||||
pci_add_resource_offset(&resources, &lba_dev->hba.io_space,
|
||||
HBA_PORT_BASE(lba_dev->hba.hba_num));
|
||||
if (lba_dev->hba.elmmio_space.start)
|
||||
pci_add_resource(&resources, &lba_dev->hba.elmmio_space);
|
||||
pci_add_resource_offset(&resources, &lba_dev->hba.elmmio_space,
|
||||
lba_dev->hba.lmmio_space_offset);
|
||||
if (lba_dev->hba.lmmio_space.flags)
|
||||
pci_add_resource(&resources, &lba_dev->hba.lmmio_space);
|
||||
pci_add_resource_offset(&resources, &lba_dev->hba.lmmio_space,
|
||||
lba_dev->hba.lmmio_space_offset);
|
||||
if (lba_dev->hba.gmmio_space.flags)
|
||||
pci_add_resource(&resources, &lba_dev->hba.gmmio_space);
|
||||
|
||||
|
|
|
@ -18,28 +18,36 @@
|
|||
|
||||
#include "pci.h"
|
||||
|
||||
void pci_add_resource(struct list_head *resources, struct resource *res)
|
||||
void pci_add_resource_offset(struct list_head *resources, struct resource *res,
|
||||
resource_size_t offset)
|
||||
{
|
||||
struct pci_bus_resource *bus_res;
|
||||
struct pci_host_bridge_window *window;
|
||||
|
||||
bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
|
||||
if (!bus_res) {
|
||||
printk(KERN_ERR "PCI: can't add bus resource %pR\n", res);
|
||||
window = kzalloc(sizeof(struct pci_host_bridge_window), GFP_KERNEL);
|
||||
if (!window) {
|
||||
printk(KERN_ERR "PCI: can't add host bridge window %pR\n", res);
|
||||
return;
|
||||
}
|
||||
|
||||
bus_res->res = res;
|
||||
list_add_tail(&bus_res->list, resources);
|
||||
window->res = res;
|
||||
window->offset = offset;
|
||||
list_add_tail(&window->list, resources);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_add_resource_offset);
|
||||
|
||||
void pci_add_resource(struct list_head *resources, struct resource *res)
|
||||
{
|
||||
pci_add_resource_offset(resources, res, 0);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_add_resource);
|
||||
|
||||
void pci_free_resource_list(struct list_head *resources)
|
||||
{
|
||||
struct pci_bus_resource *bus_res, *tmp;
|
||||
struct pci_host_bridge_window *window, *tmp;
|
||||
|
||||
list_for_each_entry_safe(bus_res, tmp, resources, list) {
|
||||
list_del(&bus_res->list);
|
||||
kfree(bus_res);
|
||||
list_for_each_entry_safe(window, tmp, resources, list) {
|
||||
list_del(&window->list);
|
||||
kfree(window);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_free_resource_list);
|
||||
|
|
|
@ -15,6 +15,8 @@
|
|||
#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
|
||||
#define CARDBUS_RESERVE_BUSNR 3
|
||||
|
||||
static LIST_HEAD(pci_host_bridges);
|
||||
|
||||
/* Ugh. Need to stop exporting this to modules. */
|
||||
LIST_HEAD(pci_root_buses);
|
||||
EXPORT_SYMBOL(pci_root_buses);
|
||||
|
@ -42,6 +44,82 @@ int no_pci_devices(void)
|
|||
}
|
||||
EXPORT_SYMBOL(no_pci_devices);
|
||||
|
||||
static struct pci_host_bridge *pci_host_bridge(struct pci_dev *dev)
|
||||
{
|
||||
struct pci_bus *bus;
|
||||
struct pci_host_bridge *bridge;
|
||||
|
||||
bus = dev->bus;
|
||||
while (bus->parent)
|
||||
bus = bus->parent;
|
||||
|
||||
list_for_each_entry(bridge, &pci_host_bridges, list) {
|
||||
if (bridge->bus == bus)
|
||||
return bridge;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static bool resource_contains(struct resource *res1, struct resource *res2)
|
||||
{
|
||||
return res1->start <= res2->start && res1->end >= res2->end;
|
||||
}
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
struct pci_host_bridge *bridge = pci_host_bridge(dev);
|
||||
struct pci_host_bridge_window *window;
|
||||
resource_size_t offset = 0;
|
||||
|
||||
list_for_each_entry(window, &bridge->windows, list) {
|
||||
if (resource_type(res) != resource_type(window->res))
|
||||
continue;
|
||||
|
||||
if (resource_contains(window->res, res)) {
|
||||
offset = window->offset;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
region->start = res->start - offset;
|
||||
region->end = res->end - offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_resource_to_bus);
|
||||
|
||||
static bool region_contains(struct pci_bus_region *region1,
|
||||
struct pci_bus_region *region2)
|
||||
{
|
||||
return region1->start <= region2->start && region1->end >= region2->end;
|
||||
}
|
||||
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
struct pci_host_bridge *bridge = pci_host_bridge(dev);
|
||||
struct pci_host_bridge_window *window;
|
||||
struct pci_bus_region bus_region;
|
||||
resource_size_t offset = 0;
|
||||
|
||||
list_for_each_entry(window, &bridge->windows, list) {
|
||||
if (resource_type(res) != resource_type(window->res))
|
||||
continue;
|
||||
|
||||
bus_region.start = window->res->start - window->offset;
|
||||
bus_region.end = window->res->end - window->offset;
|
||||
|
||||
if (region_contains(&bus_region, region)) {
|
||||
offset = window->offset;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
res->start = region->start + offset;
|
||||
res->end = region->end + offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_bus_to_resource);
|
||||
|
||||
/*
|
||||
* PCI Bus Class
|
||||
*/
|
||||
|
@ -135,6 +213,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
{
|
||||
u32 l, sz, mask;
|
||||
u16 orig_cmd;
|
||||
struct pci_bus_region region;
|
||||
|
||||
mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
|
||||
|
||||
|
@ -214,11 +293,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
/* Address above 32-bit boundary; disable the BAR */
|
||||
pci_write_config_dword(dev, pos, 0);
|
||||
pci_write_config_dword(dev, pos + 4, 0);
|
||||
res->start = 0;
|
||||
res->end = sz64;
|
||||
region.start = 0;
|
||||
region.end = sz64;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
} else {
|
||||
res->start = l64;
|
||||
res->end = l64 + sz64;
|
||||
region.start = l64;
|
||||
region.end = l64 + sz64;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
|
||||
pos, res);
|
||||
}
|
||||
|
@ -228,8 +309,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
if (!sz)
|
||||
goto fail;
|
||||
|
||||
res->start = l;
|
||||
res->end = l + sz;
|
||||
region.start = l;
|
||||
region.end = l + sz;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
|
||||
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
|
||||
}
|
||||
|
@ -266,7 +348,8 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
|
|||
struct pci_dev *dev = child->self;
|
||||
u8 io_base_lo, io_limit_lo;
|
||||
unsigned long base, limit;
|
||||
struct resource *res;
|
||||
struct pci_bus_region region;
|
||||
struct resource *res, res2;
|
||||
|
||||
res = child->resource[0];
|
||||
pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
|
||||
|
@ -284,10 +367,13 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
|
|||
|
||||
if (base && base <= limit) {
|
||||
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
|
||||
region.start = base;
|
||||
region.end = limit + 0xfff;
|
||||
pcibios_bus_to_resource(dev, &res2, ®ion);
|
||||
if (!res->start)
|
||||
res->start = base;
|
||||
res->start = res2.start;
|
||||
if (!res->end)
|
||||
res->end = limit + 0xfff;
|
||||
res->end = res2.end;
|
||||
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
|
||||
}
|
||||
}
|
||||
|
@ -297,6 +383,7 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
|
|||
struct pci_dev *dev = child->self;
|
||||
u16 mem_base_lo, mem_limit_lo;
|
||||
unsigned long base, limit;
|
||||
struct pci_bus_region region;
|
||||
struct resource *res;
|
||||
|
||||
res = child->resource[1];
|
||||
|
@ -306,8 +393,9 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
|
|||
limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
|
||||
if (base && base <= limit) {
|
||||
res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
|
||||
res->start = base;
|
||||
res->end = limit + 0xfffff;
|
||||
region.start = base;
|
||||
region.end = limit + 0xfffff;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
|
||||
}
|
||||
}
|
||||
|
@ -317,6 +405,7 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
|
|||
struct pci_dev *dev = child->self;
|
||||
u16 mem_base_lo, mem_limit_lo;
|
||||
unsigned long base, limit;
|
||||
struct pci_bus_region region;
|
||||
struct resource *res;
|
||||
|
||||
res = child->resource[2];
|
||||
|
@ -353,8 +442,9 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
|
|||
IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||
if (res->flags & PCI_PREF_RANGE_TYPE_64)
|
||||
res->flags |= IORESOURCE_MEM_64;
|
||||
res->start = base;
|
||||
res->end = limit + 0xfffff;
|
||||
region.start = base;
|
||||
region.end = limit + 0xfffff;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
|
||||
}
|
||||
}
|
||||
|
@ -900,6 +990,8 @@ int pci_setup_device(struct pci_dev *dev)
|
|||
u8 hdr_type;
|
||||
struct pci_slot *slot;
|
||||
int pos = 0;
|
||||
struct pci_bus_region region;
|
||||
struct resource *res;
|
||||
|
||||
if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
|
||||
return -EIO;
|
||||
|
@ -961,20 +1053,28 @@ int pci_setup_device(struct pci_dev *dev)
|
|||
u8 progif;
|
||||
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
|
||||
if ((progif & 1) == 0) {
|
||||
dev->resource[0].start = 0x1F0;
|
||||
dev->resource[0].end = 0x1F7;
|
||||
dev->resource[0].flags = LEGACY_IO_RESOURCE;
|
||||
dev->resource[1].start = 0x3F6;
|
||||
dev->resource[1].end = 0x3F6;
|
||||
dev->resource[1].flags = LEGACY_IO_RESOURCE;
|
||||
region.start = 0x1F0;
|
||||
region.end = 0x1F7;
|
||||
res = &dev->resource[0];
|
||||
res->flags = LEGACY_IO_RESOURCE;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
region.start = 0x3F6;
|
||||
region.end = 0x3F6;
|
||||
res = &dev->resource[1];
|
||||
res->flags = LEGACY_IO_RESOURCE;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
}
|
||||
if ((progif & 4) == 0) {
|
||||
dev->resource[2].start = 0x170;
|
||||
dev->resource[2].end = 0x177;
|
||||
dev->resource[2].flags = LEGACY_IO_RESOURCE;
|
||||
dev->resource[3].start = 0x376;
|
||||
dev->resource[3].end = 0x376;
|
||||
dev->resource[3].flags = LEGACY_IO_RESOURCE;
|
||||
region.start = 0x170;
|
||||
region.end = 0x177;
|
||||
res = &dev->resource[2];
|
||||
res->flags = LEGACY_IO_RESOURCE;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
region.start = 0x376;
|
||||
region.end = 0x376;
|
||||
res = &dev->resource[3];
|
||||
res->flags = LEGACY_IO_RESOURCE;
|
||||
pcibios_bus_to_resource(dev, res, ®ion);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
@ -1543,21 +1643,27 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
|
|||
struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
||||
struct pci_ops *ops, void *sysdata, struct list_head *resources)
|
||||
{
|
||||
int error, i;
|
||||
int error;
|
||||
struct pci_host_bridge *bridge;
|
||||
struct pci_bus *b, *b2;
|
||||
struct device *dev;
|
||||
struct pci_bus_resource *bus_res, *n;
|
||||
struct pci_host_bridge_window *window, *n;
|
||||
struct resource *res;
|
||||
resource_size_t offset;
|
||||
char bus_addr[64];
|
||||
char *fmt;
|
||||
|
||||
bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
|
||||
if (!bridge)
|
||||
return NULL;
|
||||
|
||||
b = pci_alloc_bus();
|
||||
if (!b)
|
||||
return NULL;
|
||||
goto err_bus;
|
||||
|
||||
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev) {
|
||||
kfree(b);
|
||||
return NULL;
|
||||
}
|
||||
if (!dev)
|
||||
goto err_dev;
|
||||
|
||||
b->sysdata = sysdata;
|
||||
b->ops = ops;
|
||||
|
@ -1569,10 +1675,6 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
goto err_out;
|
||||
}
|
||||
|
||||
down_write(&pci_bus_sem);
|
||||
list_add_tail(&b->node, &pci_root_buses);
|
||||
up_write(&pci_bus_sem);
|
||||
|
||||
dev->parent = parent;
|
||||
dev->release = pci_release_bus_bridge_dev;
|
||||
dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);
|
||||
|
@ -1598,31 +1700,53 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
|
|||
|
||||
b->number = b->secondary = bus;
|
||||
|
||||
/* Add initial resources to the bus */
|
||||
list_for_each_entry_safe(bus_res, n, resources, list)
|
||||
list_move_tail(&bus_res->list, &b->resources);
|
||||
bridge->bus = b;
|
||||
INIT_LIST_HEAD(&bridge->windows);
|
||||
|
||||
if (parent)
|
||||
dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&b->dev));
|
||||
else
|
||||
printk(KERN_INFO "PCI host bridge to bus %s\n", dev_name(&b->dev));
|
||||
|
||||
pci_bus_for_each_resource(b, res, i) {
|
||||
if (res)
|
||||
dev_info(&b->dev, "root bus resource %pR\n", res);
|
||||
/* Add initial resources to the bus */
|
||||
list_for_each_entry_safe(window, n, resources, list) {
|
||||
list_move_tail(&window->list, &bridge->windows);
|
||||
res = window->res;
|
||||
offset = window->offset;
|
||||
pci_bus_add_resource(b, res, 0);
|
||||
if (offset) {
|
||||
if (resource_type(res) == IORESOURCE_IO)
|
||||
fmt = " (bus address [%#06llx-%#06llx])";
|
||||
else
|
||||
fmt = " (bus address [%#010llx-%#010llx])";
|
||||
snprintf(bus_addr, sizeof(bus_addr), fmt,
|
||||
(unsigned long long) (res->start - offset),
|
||||
(unsigned long long) (res->end - offset));
|
||||
} else
|
||||
bus_addr[0] = '\0';
|
||||
dev_info(&b->dev, "root bus resource %pR%s\n", res, bus_addr);
|
||||
}
|
||||
|
||||
down_write(&pci_bus_sem);
|
||||
list_add_tail(&bridge->list, &pci_host_bridges);
|
||||
list_add_tail(&b->node, &pci_root_buses);
|
||||
up_write(&pci_bus_sem);
|
||||
|
||||
return b;
|
||||
|
||||
class_dev_reg_err:
|
||||
device_unregister(dev);
|
||||
dev_reg_err:
|
||||
down_write(&pci_bus_sem);
|
||||
list_del(&bridge->list);
|
||||
list_del(&b->node);
|
||||
up_write(&pci_bus_sem);
|
||||
err_out:
|
||||
kfree(dev);
|
||||
err_dev:
|
||||
kfree(b);
|
||||
err_bus:
|
||||
kfree(bridge);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -25,8 +25,11 @@
|
|||
#include <linux/ioport.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/slab.h>
|
||||
#include <asm-generic/pci-bridge.h>
|
||||
#include "pci.h"
|
||||
|
||||
unsigned int pci_flags;
|
||||
|
||||
struct pci_dev_resource {
|
||||
struct list_head list;
|
||||
struct resource *res;
|
||||
|
|
|
@ -45,6 +45,11 @@ static inline void pci_add_flags(int flags)
|
|||
pci_flags |= flags;
|
||||
}
|
||||
|
||||
static inline void pci_clear_flags(int flags)
|
||||
{
|
||||
pci_flags &= ~flags;
|
||||
}
|
||||
|
||||
static inline int pci_has_flag(int flag)
|
||||
{
|
||||
return pci_flags & flag;
|
||||
|
@ -52,6 +57,7 @@ static inline int pci_has_flag(int flag)
|
|||
#else
|
||||
static inline void pci_set_flags(int flags) { }
|
||||
static inline void pci_add_flags(int flags) { }
|
||||
static inline void pci_clear_flags(int flags) { }
|
||||
static inline int pci_has_flag(int flag)
|
||||
{
|
||||
return 0;
|
||||
|
|
|
@ -6,30 +6,6 @@
|
|||
#ifndef _ASM_GENERIC_PCI_H
|
||||
#define _ASM_GENERIC_PCI_H
|
||||
|
||||
/**
|
||||
* pcibios_resource_to_bus - convert resource to PCI bus address
|
||||
* @dev: device which owns this resource
|
||||
* @region: converted bus-centric region (start,end)
|
||||
* @res: resource to convert
|
||||
*
|
||||
* Convert a resource to a PCI device bus address or bus window.
|
||||
*/
|
||||
static inline void
|
||||
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res)
|
||||
{
|
||||
region->start = res->start;
|
||||
region->end = res->end;
|
||||
}
|
||||
|
||||
static inline void
|
||||
pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region)
|
||||
{
|
||||
res->start = region->start;
|
||||
res->end = region->end;
|
||||
}
|
||||
|
||||
static inline struct resource *
|
||||
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
|
||||
{
|
||||
|
|
|
@ -368,6 +368,18 @@ static inline int pci_channel_offline(struct pci_dev *pdev)
|
|||
return (pdev->error_state != pci_channel_io_normal);
|
||||
}
|
||||
|
||||
struct pci_host_bridge_window {
|
||||
struct list_head list;
|
||||
struct resource *res; /* host bridge aperture (CPU address) */
|
||||
resource_size_t offset; /* bus address + offset = CPU address */
|
||||
};
|
||||
|
||||
struct pci_host_bridge {
|
||||
struct list_head list;
|
||||
struct pci_bus *bus; /* root bus */
|
||||
struct list_head windows; /* pci_host_bridge_windows */
|
||||
};
|
||||
|
||||
/*
|
||||
* The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
|
||||
* to P2P or CardBus bridge windows) go in a table. Additional ones (for
|
||||
|
@ -636,6 +648,10 @@ void pci_fixup_cardbus(struct pci_bus *);
|
|||
|
||||
/* Generic PCI functions used internally */
|
||||
|
||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
||||
struct resource *res);
|
||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
||||
struct pci_bus_region *region);
|
||||
void pcibios_scan_specific_bus(int busn);
|
||||
extern struct pci_bus *pci_find_bus(int domain, int busnr);
|
||||
void pci_bus_add_devices(const struct pci_bus *bus);
|
||||
|
@ -896,6 +912,8 @@ void pci_release_selected_regions(struct pci_dev *, int);
|
|||
|
||||
/* drivers/pci/bus.c */
|
||||
void pci_add_resource(struct list_head *resources, struct resource *res);
|
||||
void pci_add_resource_offset(struct list_head *resources, struct resource *res,
|
||||
resource_size_t offset);
|
||||
void pci_free_resource_list(struct list_head *resources);
|
||||
void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
|
||||
struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
|
||||
|
|
Loading…
Reference in New Issue