Commit Graph

2360 Commits

Author SHA1 Message Date
Linus Torvalds 44c916d58b ARM: SoC cleanups for 3.17
This merge window brings a good size of cleanups on various
 platforms. Among the bigger ones:
 
 * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
   lacked active support for quite a while, and after asking around nobody
   showed interest in keeping them around. If needed, they could be
   resurrected in the future but it's more likely that we would prefer
   reintroduction of them as DT and multiplatform-enabled platforms
   instead.
 * OMAP4 controller code register define diet. They defined a lot of registers
   that were never actually used, etc.
 * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
   to drivers/soc so it can be shared with 64-bit code. This also converts them
   over to traditional driver models where possible.
 * Removal of legacy gpio-samsung driver, since the last users have been
   removed (moved to pinctrl)
 
 Plus a bunch of smaller changes for various platforms that sort of
 dissapear in the diffstat for the above. clps711x cleanups, shmobile
 header file refactoring/moves for multiplatform friendliness, some misc
 cleanups, etc.
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Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
2014-08-08 11:00:26 -07:00
Linus Torvalds e669830526 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 3.17.  It contains:

   - misc Cavium Octeon, BCM47xx, BCM63xx and Alchemy  updates
   - MIPS ptrace updates and cleanups
   - various fixes that will also go to -stable
   - a number of cleanups and small non-critical fixes.
   - NUMA support for the Loongson 3.
   - more support for MSA
   - support for MAAR
   - various FP enhancements and fixes"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits)
  MIPS: jz4740: remove unnecessary null test before debugfs_remove
  MIPS: Octeon: remove unnecessary null test before debugfs_remove_recursive
  MIPS: ZBOOT: implement stack protector in compressed boot phase
  MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT
  MIPS: Bonito64: remove a duplicate define
  MIPS: Malta: initialise MAARs
  MIPS: Initialise MAARs
  MIPS: detect presence of MAARs
  MIPS: define MAAR register accessors & bits
  MIPS: mark MSA experimental
  MIPS: Don't build MSA support unless it can be used
  MIPS: consistently clear MSA flags when starting & copying threads
  MIPS: 16 byte align MSA vector context
  MIPS: disable preemption whilst initialising MSA
  MIPS: ensure MSA gets disabled during boot
  MIPS: fix read_msa_* & write_msa_* functions on non-MSA toolchains
  MIPS: fix MSA context for tasks which don't use FP first
  MIPS: init upper 64b of vector registers when MSA is first used
  MIPS: save/disable MSA in lose_fpu
  MIPS: preserve scalar FP CSR when switching vector context
  ...
2014-08-07 08:47:00 -07:00
Linus Torvalds 1325b6550a spi: Updates for v3.17
A quiet release, more bug fixes than anything else.  A few things do
 stand out though:
 
  - Updates to several drivers to move towards the standard GPIO chip
    select handling in the core.
  - DMA support for the SH MSIOF driver.
  - Support for Rockchip SPI controllers (their first mainline
    submission).
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Merge tag 'spi-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "A quiet release, more bug fixes than anything else.  A few things do
  stand out though:

   - updates to several drivers to move towards the standard GPIO chip
     select handling in the core.
   - DMA support for the SH MSIOF driver.
   - support for Rockchip SPI controllers (their first mainline
     submission)"

* tag 'spi-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (64 commits)
  spi: davinci: use spi_device.cs_gpio to store gpio cs per spi device
  spi: davinci: add support to configure gpio cs through dt
  spi/pl022: Explicitly truncate large bitmask
  spi/atmel: Fix pointer to int conversion warnings on 64 bit builds
  spi: davinci: fix to support more than 2 chip selects
  spi: topcliff-pch: don't hardcode PCI slot to get DMA device
  spi: orion: fix incorrect handling of cell-index DT property
  spi: orion: Fix error return code in orion_spi_probe()
  spi/rockchip: fix error return code in rockchip_spi_probe()
  spi/rockchip: remove redundant dev_err call in rockchip_spi_probe()
  spi/rockchip: remove duplicated include from spi-rockchip.c
  ARM: dts: fix the chip select gpios definition in the SPI nodes
  spi: s3c64xx: Update binding documentation
  spi: s3c64xx: use the generic SPI "cs-gpios" property
  spi: s3c64xx: Revert "spi: s3c64xx: Added provision for dedicated cs pin"
  spi: atmel: Use dmaengine_prep_slave_sg() API
  spi: topcliff-pch: Update error messages for dmaengine_prep_slave_sg() API
  spi: sh-msiof: Use correct device for DMA mapping with IOMMU
  spi: sh-msiof: Handle dmaengine_prep_slave_single() failures gracefully
  spi: rspi: Handle dmaengine_prep_slave_sg() failures gracefully
  ...
2014-08-05 16:18:13 -07:00
Mark Brown fab6a0410d Merge remote-tracking branches 'spi/topic/sh', 'spi/topic/sh-msiof' and 'spi/topic/topcliff-pch' into spi-next 2014-08-04 17:21:16 +01:00
Mark Brown 0c18b7638a Merge remote-tracking branches 'spi/topic/orion', 'spi/topic/pl022', 'spi/topic/qup', 'spi/topic/rockchip' and 'spi/topic/rspi' into spi-next 2014-08-04 17:21:12 +01:00
Mark Brown 7e5ad716b6 Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/efm32', 'spi/topic/fsl' and 'spi/topic/omap-uwire' into spi-next 2014-08-04 17:21:08 +01:00
Mark Brown d1345c524e Merge remote-tracking branches 'spi/topic/adi-v3', 'spi/topic/atmel', 'spi/topic/cleanup' and 'spi/topic/davinci' into spi-next 2014-08-04 17:21:04 +01:00
Mark Brown fa2b5647cf Merge remote-tracking branch 'spi/topic/core' into spi-next 2014-08-04 17:21:03 +01:00
Mark Brown 8331c49c48 Merge remote-tracking branches 'spi/fix/s3c64xx', 'spi/fix/samsung' and 'spi/fix/xilinx' into spi-linus 2014-08-04 17:20:59 +01:00
Mark Brown 95607c3033 Merge remote-tracking branches 'spi/fix/au1550', 'spi/fix/cadence', 'spi/fix/omap2-mcspi' and 'spi/fix/orion' into spi-linus 2014-08-04 17:20:54 +01:00
Mark Brown 9afabfe3f8 Merge remote-tracking branch 'spi/fix/core' into spi-linus 2014-08-04 17:20:53 +01:00
Grygorii Strashko c060014063 spi: davinci: use spi_device.cs_gpio to store gpio cs per spi device
Rework Davinci SPI driver to store GPIO CS number in cs_gpio field
of SPI device structure (spi_device) for both DT and non-DT cases.
This will make Davinci SPI driver code simpler and allows to reuse
more SPI core functionality.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-08-01 19:20:52 +01:00
Murali Karicheri a88e34ea21 spi: davinci: add support to configure gpio cs through dt
Currently driver supports only configuration of GPIO CS through
platform data. This patch enhances the driver to configure GPIO
CS through DT. Also update the DT binding documentation to
reflect the availability of cs-gpios.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-08-01 19:20:52 +01:00
Mark Brown d555ea05f9 spi/pl022: Explicitly truncate large bitmask
When building on 64 bit architectures the use of bitwise negation generates
constants larger than 32 bits which won't fit in u32s used to represent
32 bit register values on the device. Explicitly cast to let the compiler
know that the higher bits are not significant and can be discarded.

Signed-off-by: Mark Brown <broonie@linaro.org>
2014-08-01 18:24:37 +01:00
Mark Brown 67f08d690a spi/atmel: Fix pointer to int conversion warnings on 64 bit builds
On 64 bit systems integers are generally still 32 bit but long values and
pointers are usually 64 bit. GCC warns when casting a 64 bit pointer into
a 32 bit integer so cast to a long instead in order to avoid warnings.

Signed-off-by: Mark Brown <broonie@linaro.org>
2014-08-01 18:22:42 +01:00
Murali Karicheri 7480e755c6 spi: davinci: fix to support more than 2 chip selects
Currently, the driver defines SPI_MAX_CHIPSELECT as 2 and
use per device array bytes_per_word based on this. This breaks
if num_chipselect per device is greater than 2. This patch
fix this and allocate memory for this array based on
num_chipselect.

It's preparation patch to enable GPIO CS feature for
Davinci SPI.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-31 20:35:32 +01:00
Andy Shevchenko a9082105b3 spi: topcliff-pch: don't hardcode PCI slot to get DMA device
The DMA is a function 0 of the multifunction device where SPI host is attached.
Thus, we may avoid to hardcode PCI slot number.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-31 00:03:42 +01:00
Manuel Lauss 2f73bfbe08 MIPS: Alchemy: remove au_read/write/sync
replace au_read/write/sync with __raw_read/write and wmb.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7465/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 13:56:34 +02:00
Thomas Petazzoni e06871cd2c spi: orion: fix incorrect handling of cell-index DT property
In commit f814f9ac5a ("spi/orion: add device tree binding"), Device
Tree support was added to the spi-orion driver. However, this commit
reads the "cell-index" property, without taking into account the fact
that DT properties are big-endian encoded.

Since most of the platforms using spi-orion with DT have apparently
not used anything but cell-index = <0>, the problem was not
visible. But as soon as one starts using cell-index = <1>, the problem
becomes clearly visible, as the master->bus_num gets a wrong value
(actually it gets the value 0, which conflicts with the first bus that
has cell-index = <0>).

This commit fixes that by using of_property_read_u32() to read the
property value, which does the appropriate endianness conversion when
needed.

Fixes: f814f9ac5a ("spi/orion: add device tree binding")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: <stable@vger.kernel.org> # v3.6+
2014-07-28 22:30:43 +01:00
Sylwester Nawrocki 86be408bfb clk: Support for clock parents and rates assigned from device tree
This patch adds helper functions to configure clock parents and rates
as specified through 'assigned-clock-parents', 'assigned-clock-rates'
DT properties for a clock provider or clock consumer device.
The helpers are now being called by the bus code for the platform, I2C
and SPI busses, before the driver probing and also in the clock core
after registration of a clock provider.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-25 15:16:27 -07:00
Wei Yongjun 1403381638 spi: orion: Fix error return code in orion_spi_probe()
Fix to return a negative error code from the error handling case of
orion_spi_reset() instead of 0, as done elsewhere in this function.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-25 18:28:46 +01:00
Wei Yongjun db7e8d90ca spi/rockchip: fix error return code in rockchip_spi_probe()
Fix to return -EINVAL from the error handling case instead of 0 when
failed to get fifo length.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-25 18:25:59 +01:00
Wei Yongjun 4e6fafee02 spi/rockchip: remove redundant dev_err call in rockchip_spi_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-25 18:25:59 +01:00
Wei Yongjun c4950143fc spi/rockchip: remove duplicated include from spi-rockchip.c
Remove duplicated include.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-25 18:25:58 +01:00
Naveen Krishna Chatradhi 306972cedf spi: s3c64xx: use the generic SPI "cs-gpios" property
The s3c64xx SPI driver uses a custom DT binding to specify
the GPIO used to drive the chip select (CS) line instead of
using the generic "cs-gpios" property already defined in:
Documentation/devicetree/bindings/spi/spi-bus.txt.

It's unfortunate that drivers are not using standard bindings
and creating custom ones instead but in most cases this can't
be changed without breaking Device Tree backward compatibility.

But in the case of this driver, its DT binding has been broken
for more than a year. Since after commit (dated June, 21 2013):

3146bee ("spi: s3c64xx: Added provision for dedicated cs pin")

DT backward compatibility was broken and nobody noticed until
now when the commit was reverted. So it seems to be safe to
change the binding to use the standard SPI "cs-gpios" property
instead of using a custom one just for this driver.

This patch also allows boards that don't use a GPIO pin for the
CS to work with the driver since the SPI core will take care of
setting spi->cs_gpio to -ENOENT if a board wants to use the built
in CS instead of a GPIO as explained in the SPI bus DT binding:
Documentation/devicetree/bindings/spi/spi-bus.txt.

For non-DT platforms, spi->cs_gpio will be set to -ENOENT as well
unless they specify a GPIO pin in their platform data. So both
native and GPIO chip select is also supported for legacy boards.

The above use case was what motivated commit 3146bee which broke
the DT binding backward compatibility in the first place.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[javier.martinez@collabora.co.uk: split changes and improve commit message]
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-17 19:37:49 +01:00
Javier Martinez Canillas e2689b946a spi: s3c64xx: Revert "spi: s3c64xx: Added provision for dedicated cs pin"
This reverts commit 3146beec21.

This commit resulted in a DT backward compatibility breakage.

Some devices use the native chip select (CS) instead of a GPIO
pin to drive the CS line. But the SPI driver made it mandatory
to specify a GPIO pin in the SPI device node controller-data.
So, using the built-in CS was not possible with the driver.

Commit 3146bee tried to fix that by adding a "cs-gpio" property
which could be defined in the SPI device node to make the driver
request the GPIO from the controller-data node.

Unfortunately that changed the old DT binding semantics since
now it's mandatory to have the "cs-gpio" property defined in
the SPI device node in order to use a GPIO pin to drive the CS.

As an example, a SPI device was defined before the commit with:

spi@12d20000 {
    slave-node@0 {
        controller-data {
             cs-gpio = <&gpb1 2 0>;
        }
   }
}

and after the commit, the following DTS snippet must be used:

spi@12d20000 {
    cs-gpio;
    slave-node@0 {
        controller-data {
             cs-gpio = <&gpb1 2 0>;
        }
   }
}

So, after commit 3146bee the driver does not look for the GPIO
by default and it only looks for it if the top level "cs-gpio"
property is defined while the default used to be the opposite.
To always request the GPIO defined in the controller-data node.

This means that old FDT that of course didn't have this added
"cs-gpio" DT property in the SPI node broke after this change.

The offending commit can't be reverted cleanly since more than
a year have passed and other changes were made in the meantime
but this patch partially reverts the driver to it's original
state so old FDT can work again.

This patch will break Device Trees that were relying on the new
behavior of course but the patch should be reverted because:

a) There aren't DTS in mainline that use this new property.
b) They were relying on a behavior that broke DT compatibility.
c) The new binding is awkard, needing two properties with the
   same name (cs-gpio) on different nodes is confusing at least.
d) The new property was not added to the DT binding doc:
   Documentation/devicetree/bindings/spi/spi-samsung.txt

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-17 19:37:41 +01:00
Geert Uytterhoeven ef40eb39e0 spi: atmel: Use dmaengine_prep_slave_sg() API
Use the inline wrapper introduced by commit
16052827d9 ("dmaengine/dma_slave: introduce
inline wrappers").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-16 23:24:14 +01:00
Geert Uytterhoeven 2857d80aca spi: topcliff-pch: Update error messages for dmaengine_prep_slave_sg() API
Commit 16052827d9 ("dmaengine/dma_slave:
introduce inline wrappers") changed the code to use the new API, but forgot
to update the error messages.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
--
v2:
  - New
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-16 23:22:14 +01:00
Geert Uytterhoeven 5dabcf2f27 spi: sh-msiof: Use correct device for DMA mapping with IOMMU
To function correctly in the presence of an IOMMU, the DMA buffers must be
mapped using the DMA channel's device instead of the MSIOF platform
device's device.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-16 23:19:34 +01:00
Geert Uytterhoeven 279d2378c9 spi: sh-msiof: Handle dmaengine_prep_slave_single() failures gracefully
As typically a shmobile SoC has less DMA channels than devices that can use
DMA, we may want to prioritize access to the DMA channels in the future.
This means that dmaengine_prep_slave_single() may start failing
arbitrarily.

Handle dmaengine_prep_slave_single() failures gracefully by falling back to
PIO. This requires moving DMA-specific configuration of the MSIOF device
after the call(s) to dmaengine_prep_slave_single().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-16 22:41:51 +01:00
Geert Uytterhoeven 85912a88c1 spi: rspi: Handle dmaengine_prep_slave_sg() failures gracefully
As typically a shmobile SoC has less DMA channels than devices that can use
DMA, we may want to prioritize access to the DMA channels in the future.
This means that dmaengine_prep_slave_sg() may start failing arbitrarily.

Handle dmaengine_prep_slave_sg() failures gracefully by falling back to
PIO.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-16 22:41:12 +01:00
Olof Johansson db6d842b84 Cleanup S5P SoCs for 3.17
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
   no more user and if it is required next time, it will be
   supported with DT.
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Merge tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

Merge "Samsung cleanup 2nd version for S5P SoCs for 3.17" from Kukjin Kim:

Cleanup S5P SoCs for 3.17
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
  no more user and if it is required next time, it will be
  supported with DT.

* tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes
  mtd: onenand: remove s5pc100 related onenand codes
  spi: s3c64xx: remove s5pc100 related spi codes
  gpio: samsung: remov s5pc100 related gpio codes
  ARM: S5PC100: no more support S5PC100 SoC
  video: fbdev: s3c-fb: remove s5p64x0 related fimd codes
  spi: s3c64xx: remove s5p64x0 related spi codes
  gpio: samsung: remove s5p64x0 related gpio codes
  ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-12 21:20:47 -07:00
Kukjin Kim f34b89bf83 spi: s3c64xx: remove s5pc100 related spi codes
This patch removes sp5c100 related spi because of no more support
s5pc100 SoC.

Cc: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-13 07:35:13 +09:00
Lars-Peter Clausen b48b9488e3 spi: cadence: Configure SPI clock in the prepare_message() callback
Currently the cadence SPI driver does the SPI clock configuration (setup CPOL
and CPHA) in the prepare_transfer_hardware() callback. The
prepare_transfer_hardware() callback is only called though when the controller
transitions from a idle state to a non-idle state. Such a transitions happens
when the message queue goes from empty to non-empty. If multiple messages from
different SPI slaves with different clock settings are in the message queue the
clock settings will not be properly updated when switching from one slave device
to another. Instead do the updating of the clock configuration in the
prepare_message() callback which will be called for each individual message.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 14:39:26 +01:00
Lars-Peter Clausen a39e65e9cc spi: cadence: Make sure that clock polarity changes are applied
It seems that the cadence SPI controller does not immediately change the clock
polarity setting when writing the CR register. Instead the change is delayed
until the next transfer starts. This happens after the chip select line has
already been asserted. As a result the first transfer after a clock polarity
change will generate spurious clock transitions which typically results in the
SPI slave not being able to properly understand the message. Toggling the ER
register seems to cause the SPI controller to apply the clock polarity changes,
so implement this as a workaround to fix the issue.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 14:39:26 +01:00
Addy Ke b839b78518 spi/rockchip: add compatible strings for RK3188 and RK3288
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:59:58 +01:00
Addy Ke ee78099764 spi/rockchip: master->mode_bits: remove SPI_CS_HIGH bit
Suggested-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:59:57 +01:00
Addy Ke 2df08e7890 spi/rockchip: call wait_for_idle() for the transfer to complete
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:59:57 +01:00
Addy Ke 5dcc44ed91 spi/rockchip: cleanup some coding issues and uncessary output
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:59:57 +01:00
Geert Uytterhoeven 3fc25421f5 spi: core: Pass correct device to dma_map_sg()
According to Documentation/dmaengine.txt, scatterlists must be mapped
using the DMA struct device.

However, "dma_chan.dev->device" is the sysfs class device's device.
Use "dma_chan.device->dev" instead, which is the real DMA device's device.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:57:10 +01:00
Geert Uytterhoeven 89e4b66a2e spi: core: Fix check for dma_map_sg() failures
According to Documentation/DMA-API.txt, dma_map_sg() returns 0 on failure.
As spi_map_buf() returns an error code, convert zero into -ENOMEM.
Keep the existing check for negative numbers just in case.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:57:10 +01:00
Uwe Kleine-König 10ed7e9847 spi: efm32: correct namespacing of location property
Olof Johansson pointed out that usually the company name is picked as
namespace prefix to specific properties. So expect "energymicro,location"
but fall back to the previously introduced name "efm32,location".

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-11 13:39:36 +01:00
Lars-Peter Clausen 4b153a2137 spi: xilinx: Use pdev->id instead of pdev->dev.id for the SPI bus number
The Xilinx SPI driver initializes the bus_num field of the SPI master to
pdev->dev.id. pdev->dev.id is always 0 for platform devices which causes bus
number conflicts for the SPI controller when creating multiple device instances
of the driver. Instead use pdev->id which will have the assignt platform device
id. If the device is instantiated via devicetree pdev->id is -1 which will cause
the SPI core to dynamically assign a id (or use the id defined via a alias in
the devicetree).

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-10 12:38:45 +02:00
Geert Uytterhoeven 533465a8f8 spi: rspi: Relax DMA dependency and increase build coverage
As of commit ab116a4df4 ("dmaengine:
shdma: fix a build failure on platforms with no DMA support"), the DMA
filter function shdma_chan_filter() is sufficiently abstracted to allow
building without DMA support. Hence drop the SH_DMAE_BASE dependency on
SUPERH.
Also increase build coverage by allowing the driver to be enabled if
COMPILE_TEST=y.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-10 12:36:11 +02:00
Geert Uytterhoeven 51fd509046 spi: sh-msiof: SPI_SH_MSIOF should depend on HAS_DMA
If NO_DMA=y:

    drivers/built-in.o: In function `sh_msiof_release_dma':
    spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single'
    drivers/built-in.o: In function `sh_msiof_request_dma':
    spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single'
    spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error'
    spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single'
    drivers/built-in.o: In function `sh_msiof_dma_once':
    spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu'
    spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu'

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-10 12:33:55 +02:00
Mark Brown 8b6c5d8c8b Linux 3.16-rc3
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Merge tag 'v3.16-rc3' into spi-sh-msiof

Linux 3.16-rc3
2014-07-08 17:17:56 +02:00
Kukjin Kim add924f9db spi: s3c64xx: remove s5p64x0 related spi codes
This patch removes s5p64x0 related spi because of no more support for
s5p64x0 SoCs. Meanwhile, cleanup SPI DT bindings for s5p6440-spi, it
should be s5p64x0-spi instead.

Cc: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-08 07:28:55 +09:00
Geert Uytterhoeven afcc98dec9 spi: rspi: Pass spi_master pointer to rspi_release_dma()
rspi_release_dma() doesn't need access to any fields in the driver private
data, except for the pointer to the SPI master object. Hence just pass the
needed pointer.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-07 12:55:20 +02:00
Geert Uytterhoeven 95029a0088 spi: rspi: Remove unused variable in rspi_rz_transfer_one()
Introduced by commit 8b983e90ea ("spi: rspi:
Extract rspi_common_transfer()"), which removed its users.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-07 12:55:20 +02:00
Himangi Saraogi e9d42d1527 spi/spi-sh: Use devm_ioremap
This patch introduces the use of devm_ioremap and removes the iounmaps
in the probe and remove functions. Also, the labels are renamed to
preserve ordering.

Signed-off-by: Himangi Saraogi <himangi774@gmail.com>
Acked-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-07-07 12:50:52 +02:00