Commit Graph

52 Commits

Author SHA1 Message Date
Russell King 86f5e73304 GPU: ipu: Fix race in installing IPU chained IRQ handler
The IPU code was installing its chained interrupt handler (which enables
the interrupt) before it was setting its data, which provokes an oops on
kexec.  Fix this by converting to irq_set_chained_handler_and_data().

[drm] Initialized drm 1.1.0 20060810
imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available
imx-drm display-subsystem: parent device of /soc/aips-bus@02000000/ldb@020e0008/lvds-channel@1 is not available
Unable to handle kernel NULL pointer dereference at virtual address 00000070
pgd = c0004000
[00000070] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.0-rc6+ #1693
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
task: d74c0000 ti: d74aa000 task.ti: d74aa000
PC is at ipu_irq_handle+0x28/0xd8
LR is at ipu_irq_handler+0x6c/0xc0
pc : [<c03c56d8>]    lr : [<c03c58a4>]    psr: 200001d3
sp : d74abbd0  ip : d74abc00  fp : d74abbfc
r10: 000001e0  r9 : c0085154  r8 : 00000009
r7 : 00000000  r6 : 00000000  r5 : d74abc04  r4 : c0a6b6a8
r3 : 00000000  r2 : 00000009  r1 : d74abc04  r0 : 00000000
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c5387d  Table: 10004059  DAC: 00000015
Process swapper/0 (pid: 1, stack limit = 0xd74aa210)
Stack: (0xd74abbd0 to 0xd74ac000)
Backtrace:
[<c03c56b0>] (ipu_irq_handle) from [<c03c58a4>] (ipu_irq_handler+0x6c/0xc0)
[<c03c5838>] (ipu_irq_handler) from [<c0080154>] (generic_handle_irq+0x28/0x38)
[<c008012c>] (generic_handle_irq) from [<c0080288>] (__handle_domain_irq+0x5c/0xb8)
[<c008022c>] (__handle_domain_irq) from [<c0009428>] (gic_handle_irq+0x28/0x68)
[<c0009400>] (gic_handle_irq) from [<c0013dc4>] (__irq_svc+0x44/0x5c)
[<c07638fc>] (_raw_spin_unlock_irqrestore) from [<c00803bc>] (__irq_put_desc_unlock+0x1c/0x40)
[<c00803a0>] (__irq_put_desc_unlock) from [<c00841f4>] (__irq_set_handler+0x54/0x5c)
[<c00841a0>] (__irq_set_handler) from [<c03c5f48>] (ipu_probe+0x29c/0x708)
[<c03c5cac>] (ipu_probe) from [<c03d3848>] (platform_drv_probe+0x50/0xac)
[<c03d37f8>] (platform_drv_probe) from [<c03d1f3c>] (driver_probe_device+0x1d4/0x278)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/E1Z4z02-0002SI-Br@rmk-PC.arm.linux.org.uk
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-18 14:03:08 +02:00
Dave Airlie 1d2add28ed imx-drm changes to use media bus formats and LDB drm_panel support
- Add media bus formats needed by imx-drm
 - Switch to use media bus formats to describe the pixel format
   on the internal parallel bus between display interface and
   encoders
 - Some preparations for TV Output via TVEv2 on i.MX5
 - Add drm_panel support to the i.MX LVDS driver, allow to
   determine the bus pixel format from the panel descriptor.
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Merge tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm changes to use media bus formats and LDB drm_panel support

- Add media bus formats needed by imx-drm
- Switch to use media bus formats to describe the pixel format
  on the internal parallel bus between display interface and
  encoders
- Some preparations for TV Output via TVEv2 on i.MX5
- Add drm_panel support to the i.MX LVDS driver, allow to
  determine the bus pixel format from the panel descriptor.

* tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux:
  drm/imx: imx-ldb: allow to determine bus format from the connected panel
  drm/imx: imx-ldb: reset display clock input when disabling LVDS
  drm/imx: imx-ldb: add drm_panel support
  drm/imx: consolidate bus format variable names
  drm/imx: switch to use media bus formats
  Add RGB666_1X24_CPADHI media bus format
  Add YUV8_1X24 media bus format
  Add BGR888_1X24 and GBR888_1X24 media bus formats
  Add LVDS RGB media bus formats
  Add RGB444_1X12 and RGB565_1X16 media bus formats
  drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2
  drm/imx: Add support for interlaced scanout
2015-04-13 17:28:57 +10:00
Philipp Zabel 8f361b279f gpu: ipu-v3: turns out the IPU can only downsize 4:1
The value for downsizing 8:1 is marked as reserved in the technical reference
manual and the documentation states downsizing capability up to 4:1 only.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31 12:03:55 +02:00
Philipp Zabel f7089d923e gpu: ipu-v3: limit pixel clock divider to 8-bits
The DI pixel clock divider bit field is only 8 bits wide for the
integer part, so limit the divider to the 1...255 interval before
deciding whether the internal clock can be used and before writing
to the register.

Reported-by: Felix Mellmann <felix.mellmann@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31 12:03:54 +02:00
Philipp Zabel 2872c8072a drm/imx: consolidate bus format variable names
This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt,
and pixfmt variables to a common name "bus_format" wherever they describe the
pixel format on the bus between display controller and encoder hardware.
At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-03-31 11:59:34 +02:00
Philipp Zabel a7c6e76fee drm/imx: switch to use media bus formats
imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to
describe the pixel format of frame buffers in memory, to describe the pixel
format on the bus between the display controller and the encoder hardware.
Now that MEDIA_BUS_FMT constants are available to drm drivers, use those
instead.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-03-31 11:59:34 +02:00
Philipp Zabel 89ce4b0f4e gpu: ipu-v3: do not divide by zero if the pixel clock is too large
Even if an unsupported mode with a pixel clock larger than two times the
264 MHz IPU HSP clock is set, don't divide by zero.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-02-23 17:18:59 +01:00
Dave Airlie 85840c76d8 imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE
- Corrected handling of wait_for_completion_timeout return value
   when disabling IPUv3 DC channels
 - Fixed error return value propagation in TVE mode_set
 - Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53
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Merge tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE

- Corrected handling of wait_for_completion_timeout return value
  when disabling IPUv3 DC channels
- Fixed error return value propagation in TVE mode_set
- Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53

* tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: Fix IC control register offset
  drm: imx: imx-tve: Check and propagate the errors
  gpu: ipu-v3: wait_for_completion_timeout does not return negative status
2015-02-11 15:35:26 +10:00
Philipp Zabel a49e7c0d07 gpu: ipu-v3: Fix IC control register offset
The IC register offset is at +0x20000 relative to the control module
registers on all IPUv3 versions. This patch fixes wrong values for
i.MX51 and i.MX53.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-27 16:28:01 +01:00
Nicholas Mc Guire af7537d3c8 gpu: ipu-v3: wait_for_completion_timeout does not return negative status
This fixes up the return value handling and the return type.

Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-27 15:55:49 +01:00
Steve Longerbeam 503f1631ae gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calc
We can use the DIV_ROUND_CLOSEST() macro when calculating the DI
clock divider, rounded to nearest int.

Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07 19:15:04 +01:00
Steve Longerbeam b6835a719a gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfg
This patch changes struct ipu_di_signal_cfg to use struct videomode
to define video timings and flags.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07 19:15:03 +01:00
Steve Longerbeam 73099f12b0 gpu: ipu-di: remove some non-functional code
h_total and v_total were calculated in ipu_di_init_sync_panel()
but never actually used. Remove.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07 19:12:07 +01:00
Jiada Wang 6541d71082 gpu: ipu-di: Add ipu_di_adjust_videomode()
On some monitors, high resolution modes are not working, exhibiting
pixel column truncation problems (for example, 1280x1024 displays as
1280x1022).

The function ipu_di_adjust_videomode() aims to fix these issues by
adjusting a passed videomode to IPU restrictions. The function can
be called from the drm_crtc_helper_funcs->mode_fixup() methods.

Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Deepak Das <deepak_das@mentor.com>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07 19:12:07 +01:00
Steve Longerbeam f853f3daac gpu: ipu-v3: Implement use counter for ipu_dc_enable(), ipu_dc_disable()
The functions ipu_dc_enable() and ipu_dc_disable() enable/disable the DC
globally in the IPU_CONF register, but the DC is used by multiple clients
on different DC channels. So make sure to only disable/enable the DC
globally based on a use counter.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-06 17:36:14 +01:00
Boris BREZILLON 3e47608f2d [media] gpu: ipu-v3: Make use of media_bus_format enum
In order to have subsytem agnostic media bus format definitions we've
moved media bus definition to include/uapi/linux/media-bus-format.h and
prefixed enum values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT.

Reference new definitions in the ipu-v3 driver.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2014-11-14 17:55:27 -02:00
Dave Airlie 46d987af76 IPUv3 fixes for v3.18
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Merge tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux into drm-next

IPUv3 fixes for v3.18

* tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE Kconfig
  gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined
  gpu: ipu-v3: Return proper error on ipu_add_client_devices error path
  gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
2014-10-07 14:31:14 +10:00
Fabio Estevam c7750e8321 gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE Kconfig
SOC_IMX6SL does not have the IPU block, so remove it from the Kconfig entry.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-24 23:50:25 +02:00
Steve Longerbeam 3feb049f37 gpu: ipu-v3: Add ipu_dump()
Adds ipu_dump() which dumps IPU register state to debug.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:56 +02:00
Steve Longerbeam 60c04456f6 gpu: ipu-cpmem: Add ipu_cpmem_dump()
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:55 +02:00
Steve Longerbeam 9a34cef013 gpu: ipu-v3: Add more planar formats support
Adds support for the following planar and partial-planar formats:

YUV422
NV12
NV16

Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>
Signed-off-by: Mohsin Kazmi <mohsin_kazmi@mentor.com>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>

Unified base offset and Y plane offset into a single variable,
moved all ipu_cpmem_set_buffer calls to a single location.
Removed NV21 and NV61 for now. The IDMAC doesn't understand U/V
order for chroma interleaved formats, so we'd need to work around
this by implenting U/V switching via the CSC unit.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:55 +02:00
Steve Longerbeam 2094b603ae gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()
Add a second buffer physaddr to struct ipu_image, for double-buffering
support.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:54 +02:00
Steve Longerbeam c42d37ca42 gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()
Adds ipu_cpmem_set_rotation().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:54 +02:00
Steve Longerbeam 555f0e6690 gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()
Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel
will use to transfer data onto AXI bus.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:53 +02:00
Steve Longerbeam 9b9da0be37 gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()
Adds ipu_cpmem_set_block_mode().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:52 +02:00
Steve Longerbeam 4fd1a07af5 gpu: ipu-v3: Add ipu_idmac_lock_enable()
Adds ipu_idmac_lock_enable(), which enables or disables channel
burst locking.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:51 +02:00
Steve Longerbeam 2bcf577eb6 gpu: ipu-v3: Add ipu_idmac_enable_watermark()
Adds the function ipu_idmac_enable_watermark(), which enables or disables
watermarking in the IDMAC channel. Enabling watermarking can increase a
channel's AXI bus arbitration priority.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:50 +02:00
Steve Longerbeam 6930afdccf gpu: ipu-v3: Add ipu_stride_to_bytes()
Adds ipu_stride_to_bytes(), which converts a pixel stride to bytes,
suitable for passing to cpmem.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:50 +02:00
Steve Longerbeam e7268c699b gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer()
Adds __ipu_idmac_reset_current_buffer() that resets a channel's
internal current buffer pointer so that transfers start from buffer
0 on the next channel enable.

This operation is required for channel linking to work correctly,
for instance video capture pipelines that carry out image rotations
will fail after the first streaming unless this function is called
for each channel before re-enabling the channels.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:49 +02:00
Steve Longerbeam bce6f087a9 gpu: ipu-v3: Add ipu_idmac_clear_buffer()
Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer
ready status in a channel.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:49 +02:00
Steve Longerbeam aa52f57894 gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in
the given channel is set ready (owned by IPU), or false if not ready
(owned by CPU core).

Support has been added for third buffer, there is no support yet for
triple-buffering in idmac channels, but this function checks
buffer-ready for third buffer in case this support is added later.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:48 +02:00
Steve Longerbeam a4cd8f229f gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h
Move the IDMAC channel names to imx-ipu-v3.h, to make the names
available outside IPU. Add a couple new channels in the process
(async display BG/FG, channels 24 and 29).

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:47 +02:00
Steve Longerbeam 4cea940d34 gpu: ipu-v3: Add helper function checking if pixfmt is planar
Add simple helper function returning true if passed pixel format is one
of supported planar ones.

Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:47 +02:00
Steve Longerbeam f835f386a1 gpu: ipu-v3: Add rotation mode conversion utilities
Add two functions:

- ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting
  to an IPU rotation mode.
- ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip
  and vflip settings to degrees.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:46 +02:00
Steve Longerbeam ae0e9708b3 gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()
Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a
media bus pixel format code.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:45 +02:00
Steve Longerbeam a2be35e332 gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()
Adds ipu_smfc_set_watermark() which programs a channel's SMFC FIFO
levels at which the watermark signal is set and cleared.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:45 +02:00
Steve Longerbeam 7fafa8f06f gpu: ipu-v3: smfc: Convert to per-channel
Convert the smfc object to be specific to a single smfc channel.
Add ipu_smfc_{get|put} to retrieve and release a single smfc channel
for exclusive use, and add use counter to ipu_smfc_{enable|disable}.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:44 +02:00
Steve Longerbeam fc4353559e gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c
Move the SMFC module enable/disable helpers into the ipu-smfc submodule.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:43 +02:00
Steve Longerbeam 1aa8ea0d2b gpu: ipu-v3: Add Image Converter unit
Adds the Image Converter (IC) unit.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>

Condensed the three CSC setup functions into a single one that
uses static tables to set up the CSC task parameters.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:43 +02:00
Steve Longerbeam 2ffd48f2e7 gpu: ipu-v3: Add Camera Sensor Interface unit
Adds the Camera Sensor Interface (CSI) unit required for video capture.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>

Removed the unused clk_get_rate in ipu_csi_init_interface and the
ipu_csi_ccir_err_detection_enable/disable functions.
Checkpatch cleanup.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 14:55:42 +02:00
Fabio Estevam e68885e24a gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined
Let's only define DEBUG for debugging purpose and not by default to avoid
printing debugging message unnecessarily.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 11:13:48 +02:00
Axel Lin e4946cdcab gpu: ipu-v3: Return proper error on ipu_add_client_devices error path
Avoid returning an uninitialized variable in the error path.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 10:43:15 +02:00
Axel Lin b6c044a3d8 gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
This driver uses GENERIC_IRQ_CHIP, so it needs to select GENERIC_IRQ_CHIP to
avoid build error.

Fixes below build errors:
ERROR: "irq_alloc_domain_generic_chips" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_clr_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_generic_chip_ops" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_ack_set_bit" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_get_domain_generic_chip" [drivers/gpu/ipu-v3/imx-ipu-v3.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02 10:42:59 +02:00
Steve Longerbeam c2d670fd3b gpu: ipu-v3: Rename and add IDMAC channels
Rename the ENC/VF/PP rotation channel names, to be more consistent
with the convention that *_MEM is write-to-memory channels and
MEM_* is read-from-memory channels. Also add the channels who's
source and destination is the IC.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:48 +02:00
Steve Longerbeam ba07975f0f gpu: ipu-v3: Add functions to set CSI/IC source muxes
Adds two new functions, ipu_set_csi_src_mux() and ipu_set_ic_src_mux(),
that select the inputs to the CSI and IC respectively. Both muxes are
programmed in the IPU_CONF register.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:47 +02:00
Steve Longerbeam 7d2691da90 gpu: ipu-v3: Add ipu-cpmem unit
Move channel parameter memory setup functions and macros into a new
submodule ipu-cpmem. In the process, cleanup arguments to the functions
to take a channel pointer instead of a pointer into cpmem for that
channel. That allows the structure of the parameter memory to be
private to ipu-cpmem.c.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-08-18 14:17:41 +02:00
Linus Torvalds 682b7c1c8e Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "This is the main drm merge window pull request, changes all over the
  place, mostly normal levels of churn.

  Highlights:

  Core drm:
     More cleanups, fix race on connector/encoder naming, docs updates,
     object locking rework in prep for atomic modeset

  i915:
     mipi DSI support, valleyview power fixes, cursor size fixes,
     execlist refactoring, vblank improvements, userptr support, OOM
     handling improvements

  radeon:
     GPUVM tuning and large page size support, gart fixes, deep color
     HDMI support, HDMI audio cleanups

  nouveau:
     - displayport rework should fix lots of issues
     - initial gk20a support
     - gk110b support
     - gk208 fixes

  exynos:
     probe order fixes, HDMI changes, IPP consolidation

  msm:
     debugfs updates, misc fixes

  ast:
     ast2400 support, sync with UMS driver

  tegra:
     cleanups, hdmi + hw cursor for Tegra 124.

  panel:
     fixes existing panels add some new ones.

  ipuv3:
     moved from staging to drivers/gpu"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (761 commits)
  drm/nouveau/disp/dp: fix tmds passthrough on dp connector
  drm/nouveau/dp: probe dpcd to determine connectedness
  drm/nv50-: trigger update after all connectors disabled
  drm/nv50-: prepare for attaching a SOR to multiple heads
  drm/gf119-/disp: fix debug output on update failure
  drm/nouveau/disp/dp: make use of postcursor when its available
  drm/g94-/disp/dp: take max pullup value across all lanes
  drm/nouveau/bios/dp: parse lane postcursor data
  drm/nouveau/dp: fix support for dpms
  drm/nouveau: register a drm_dp_aux channel for each dp connector
  drm/g94-/disp: add method to power-off dp lanes
  drm/nouveau/disp/dp: maintain link in response to hpd signal
  drm/g94-/disp: bash and wait for something after changing lane power regs
  drm/nouveau/disp/dp: split link config/power into two steps
  drm/nv50/disp: train PIOR-attached DP from second supervisor
  drm/nouveau/disp/dp: make use of existing output data for link training
  drm/gf119/disp: start removing direct vbios parsing from supervisor
  drm/nv50/disp: start removing direct vbios parsing from supervisor
  drm/nouveau/disp/dp: maintain receiver caps in response to hpd signal
  drm/nouveau/disp/dp: create subclass for dp outputs
  ...
2014-06-12 11:32:30 -07:00
Philipp Zabel d6ca8ca7ec gpu: ipu-v3: Register the CSI modules
This patch registers the two CSI platform devices per IPU.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:12 +02:00
Philipp Zabel 3f5a8a946d gpu: ipu-v3: Add CSI and SMFC module enable wrappers
IPU_CONF_..._EN bits are implementation details, not to be made public.
Add wrappers around ipu_module_enable/disable, so the CSI V4L2 driver
can enable/disable the CSI and SMFC modules.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:11 +02:00
Philipp Zabel e90460970f gpu: ipu-v3: Add ipu_idmac_get_current_buffer function
This function returns the currently active buffer (0 or 1)
of a double buffered IDMAC channel. It is to be used by the
CSI driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-06-04 11:07:11 +02:00