Since commit 6ce0d20016 ("ARM: dma: Use dma_pfn_offset for dma address translation"),
dma_to_pfn() already returns the PFN with the physical memory start offset
so we don't need to add it again.
This fixes USB mass storage lock-up problem on systems that can't do DMA
over the entire physical memory range (e.g.) Keystone 2 systems with 4GB RAM
can only do DMA over the first 2GB. [K2E-EVM].
What happens there is that without this patch SCSI layer sets a wrong
bounce buffer limit in scsi_calculate_bounce_limit() for the USB mass
storage device. dma_max_pfn() evaluates to 0x8fffff and bounce_limit
is set to 0x8fffff000 whereas maximum DMA'ble physical memory on Keystone 2
is 0x87fffffff. This results in non DMA'ble pages being given to the
USB controller and hence the lock-up.
NOTE: in the above case, USB-SCSI-device's dma_pfn_offset was showing as 0.
This should have really been 0x780000 as on K2e, LOWMEM_START is 0x80000000
and HIGHMEM_START is 0x800000000. DMA zone is 2GB so dma_max_pfn should be
0x87ffff. The incorrect dma_pfn_offset for the USB storage device is because
USB devices are not correctly inheriting the dma_pfn_offset from the
USB host controller. This will be fixed by a separate patch.
Fixes: 6ce0d20016 ("ARM: dma: Use dma_pfn_offset for dma address translation")
Cc: stable@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Whilst MPIDR values themselves are less than 32 bits, it is still
perfectly valid for a DT to have #address-cells > 1 in the CPUs node,
resulting in the "reg" property having leading zero cell(s). In that
situation, the big-endian nature of the data conspires with the current
behaviour of only reading the first cell to cause the kernel to think
all CPUs have ID 0, and become resoundingly unhappy as a consequence.
Take the full property length into account when parsing CPUs so as to
be correct under any circumstances.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- Various cleanups and removal of redundant code
- Two important fixes for not using an in-kernel irqchip
- A bit of optimizations
- Handle SError exceptions and present them to guests if appropriate
- Proxying of GICV access at EL2 if guest mappings are unsafe
- GICv3 on AArch32 on ARMv8
- Preparations for GICv3 save/restore, including ABI docs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX6rKQAAoJEEtpOizt6ddy8i4H/0bfB1EVukggoL/FfGeds/dg
p2FG0oOsggcSBwK7VXUUvVllO7ioUssRCqqkn1e0/bCLtQrN4ex4PqJ3618EHFz/
pLP72hf8Zl33rP3OVtPaDcxzjjKKdf+xGbBIv3AE7x7O5rFZg4lWHeWjy4yuhFv2
Jm+8ul7JCxCMse08Xc90riou4i/jWjyoLadHbAoeX3tR+dVcZyOUZSlgAPI1bS/P
rOQi/zkl3bT2R3kh28QuEFTrJ9BVTnmw25BRW8DNr6+CWmR9bpM6y7AGzOwrZ3FZ
F1MbsPpN3ogcjvPg2QTYuOoqrwz8NLLHw5pR5YNj84VppjSpSsAhKU7Ug5Uhsr0=
=1z/L
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into next
KVM/ARM Changes for v4.9
- Various cleanups and removal of redundant code
- Two important fixes for not using an in-kernel irqchip
- A bit of optimizations
- Handle SError exceptions and present them to guests if appropriate
- Proxying of GICV access at EL2 if guest mappings are unsafe
- GICv3 on AArch32 on ARMv8
- Preparations for GICv3 save/restore, including ABI docs
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
As noted in [1], "there are a number of problems with skeleton.dtsi,
and it would be prefereable to remove it entirely." This patch is to
remove skeleton.dtsi inclusion from berlin2.
[1] http://www.spinics.net/lists/arm-kernel/msg528080.html
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
As noted in [1], "there are a number of problems with skeleton.dtsi,
and it would be prefereable to remove it entirely." This patch is to
remove skeleton.dtsi inclusion from berlin2cd.
[1] http://www.spinics.net/lists/arm-kernel/msg528080.html
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
As noted in [1], "there are a number of problems with skeleton.dtsi,
and it would be prefereable to remove it entirely." This patch is to
remove skeleton.dtsi inclusion from berlin2q.
[1] http://www.spinics.net/lists/arm-kernel/msg528080.html
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
After commit f29a72c24a ("watchdog: dw_wdt: Convert to use watchdog
infrastructure"), the dw_wdt driver can support multiple variants, so
unconditionally enable all dw_wdt nodes now.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
After commit f29a72c24a ("watchdog: dw_wdt: Convert to use watchdog
infrastructure"), the dw_wdt driver can support multiple variants, so
unconditionally enable all dw_wdt nodes now.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The HTC GPIO driver is a pure GPIO driver and I just can not
see what it is doing inside MFD. Let's just move it to GPIO
and take this opportunity to move the platform data to
<linux/platform_data/gpio-htc-egpio.h>
Cc: arm@kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJX6H4uAAoJEHm+PkMAQRiG5sMH/3yzrMiUCSokdS+cvY+jgKAG
JS58JmRvBPz2mRaU3MRPBGRDeCz/Nc9LggL2ZcgM+E1ZYirlYyQfIED3lkqk5R07
kIN1wmb+kQhXyU4IY3fEX7joqyKC6zOy4DUChPkBQU0/0+VUmdVmcJvsuPlnMZtf
g95m0BdYTui+eDezASRqOEp3Lb5ONL4c3ao4yBP0LHF033ctj3VJQiyi5uERPZJ0
5e6Mo7Wxn78t9WqJLQAiEH46kTwT2plNlxf3XXqTenfIdbWhqE873HPGeSMa3VQV
VywXTpCpSPQsA8BYg66qIbebdKOhs9MOviHVfqDtwQlvwhjlBDya0gNHfI5fSy4=
=Y/L5
-----END PGP SIGNATURE-----
Merge tag 'v4.8-rc8' into drm-next
Linux 4.8-rc8
There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge
it now to avoid troubles.
* tag 'v4.8-rc8': (1442 commits)
Linux 4.8-rc8
fault_in_multipages_readable() throws set-but-unused error
mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing
radix tree: fix sibling entry handling in radix_tree_descend()
radix tree test suite: Test radix_tree_replace_slot() for multiorder entries
fix memory leaks in tracing_buffers_splice_read()
tracing: Move mutex to protect against resetting of seq data
MIPS: Fix delay slot emulation count in debugfs
MIPS: SMP: Fix possibility of deadlock when bringing CPUs online
mm: delete unnecessary and unsafe init_tlb_ubc()
huge tmpfs: fix Committed_AS leak
shmem: fix tmpfs to handle the huge= option properly
blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx
MIPS: Fix pre-r6 emulation FPU initialisation
arm64: kgdb: handle read-only text / modules
arm64: Call numa_store_cpu_info() earlier.
locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text
nvme-rdma: only clear queue flags after successful connect
i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended
perf/core: Limit matching exclusive events to one PMU
...
The Exynos MIPI driver does not work anymore (it is board file only) so
it is removed. Remove also config options.
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Donghwa Lee <dh09.lee@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones for all Tegra124 platform, these trips can trigger
shut down or reset.
Tegra124 Jetson TK1 was already set "critical" trips before, so it
can overwrite the general values.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Use the new sun7i-a20-mmc compatible for the mmc controllers on sun7i
and newer.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch updates the s3c24xx dma driver to be able to pass a
dma_slave_map array via the platform data. This is needed to
be able to use the new, simpler dmaengine API [1].
I used the virtual DMA channels as a parameter for the dma_filter
function. By doing that, I could reuse the existing filter function in
drivers/dma/s3c24xx-dma.c.
I have tested this on my mini2440 board with the audio driver.
According to my observations, dma_request_slave_channel in the
function dmaengine_pcm_new in the file
sound/soc/soc-generic-dmaengine-pcm.c now returns a valid DMA channel
whereas before no DMA channel was returned at that point.
Entries for DMACH_XD0, DMACH_XD1 and DMACH_TIMER are missing because I
don't realy know which driver to use for these.
[1]
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/393635.html
Signed-off-by: Sam Van Den Berge <sam.van.den.berge@telenet.be>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Add methods to map/unmap device resources addresses for dma_map_ops that
are IOMMU aware. This is needed to map a device MMIO register from a
physical address.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Instead of comparing the name to a magic string, use archdata to
explicitly communicate whether the arch timer is suitable for
direct vdso access.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
A new accessor for gic_write_bpr1 is added to arch_gicv3.h in 4.9,
whilst the CP15 accessors are redifined in a separate branch.
This leads to a horrible clash, where the new accessor ends up with
a crap "asm volatile" definition.
Work around this by carrying our own definition of gic_write_bpr1,
creating a small conflict which will be obvious to resolve.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
the tilcdc quirks:
- Fix typo with recent beagleboard-x15 changes for mmc2_pins_default
- Add am335x blue-and-red-wiring quirk as specified in the binding in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt. Also
fix up the whitespace formatting for am335x-evmsk.
- Fix for recent igepv5 power button for GPIO_ACTIVE_LOW. Also fix
up the whitespace formatting for the button
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJX4w32ERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzGggP
+waNl/O3wMsqw4VlTKxOKWAT3KtS3pWiCs0U0YO7KXV4txKqwinVr2uLn4HRb9Jv
W254ngX7m0II6d4ws04+amcWuCmCaebwgm7zZwb4vf20TQ9MIns4oymPWXQRLhYK
NY4ADMz+7nQ5uevhGtxOXqQqOK1aE5l+51zJ93ytMvqaq806ho8W9XaNo9kEUBI6
0521PFDJuK+6rwIbb8VwXLE6cUajKz/j/25Nq5lC7RUpN+tHyfo+WSGesTW4+/Mi
/27c9LS0tsrYlk1MRYPZ5c2ly1NBwTBCtdg6lJxgvWapH5+8YNdxgfgT8Sym+h8W
aN3ZpiYkpdWhTptU4TW3o9sETxWZWAKn0TS6YklAzlXylZ6PTTRuLNzYV92P5IUq
AtGIyfInkhk9tiioQo6b9ftwjxQYvTTd0GUpVmvCwTCjxQN9yZ5ut8ZaCaIAXiq4
FzH5j36QmhLd9xaDiu5Gi+RqPhlIJXQVyOm/4fdCY8RWnQq2k6yh5+TLpErXIR0q
xM4fY/DH9CtqTR8T6zqvwOnakSOvy9cDlVfCrP1nB2L2IT82oso82bkajnSMjWNB
lDCE707Iwj13hkvAOfPoT03YAZqq3T6zc2VARRSXKyt6D83NT5q7I+xOxp3kL4U5
dXiDX+qKcjkrb6/lqKyCxq7cK/gYh60dkHjomRE7E6Ij
=14Zw
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.9/dt-pt3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "few minor fixes for omap dts files for v4.9 merge window"
Few fixes for omap dts files for v4.9 merge window. Let's also add
the tilcdc quirks:
- Fix typo with recent beagleboard-x15 changes for mmc2_pins_default
- Add am335x blue-and-red-wiring quirk as specified in the binding in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt. Also
fix up the whitespace formatting for am335x-evmsk.
- Fix for recent igepv5 power button for GPIO_ACTIVE_LOW. Also fix
up the whitespace formatting for the button
* tag 'omap-for-v4.9/dt-pt3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5-igep0050.dts: Use tabs for indentation
ARM: dts: Fix igepv5 power button GPIO direction
ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am57xx-beagle-x15-common: Fix wrong pinctrl selection for mmc2
commit d47529b2e9
"gpio: don't include module.h in shared driver header"
removed <linux/module.h> from the <linux/gpio/driver.h> header.
It seems arch/arm/mach-omap2/board-rx51-peripherals.c
is using __initdata_or_module from <linux/module.h> through
<linux/gpio.h> to <linux/gpio/driver.h>, so break this dependency
so that we get a clean compile.
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Tony Lindgren <tony@atomide.com>
Fixes: d47529b2e9 ("gpio: don't include module.h in shared driver header")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
By now both VHE and non-VHE initialisation sequences query supported
VMID size. Lets keep only single instance of this code under
init_common_resources().
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This patch allows to build and use vgic-v3 in 32-bit mode.
Unfortunately, it can not be split in several steps without extra
stubs to keep patches independent and bisectable. For instance,
virt/kvm/arm/vgic/vgic-v3.c uses function from vgic-v3-sr.c, handling
access to GICv3 cpu interface from the guest requires vgic_v3.vgic_sre
to be already defined.
It is how support has been done:
* handle SGI requests from the guest
* report configured SRE on access to GICv3 cpu interface from the guest
* required vgic-v3 macros are provided via uapi.h
* static keys are used to select GIC backend
* to make vgic-v3 build KVM_ARM_VGIC_V3 guard is removed along with
the static inlines
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
vgic-v3 save/restore routines are written in such way that they map
arm64 system register naming nicely, but it does not fit to arm
world. To keep virt/kvm/arm/hyp/vgic-v3-sr.c untouched we create a
mapping with a function for each register mapping the 32-bit to the
64-bit accessors.
Please, note that 64-bit wide ICH_LR is split in two 32-bit halves
(ICH_LR and ICH_LRC) accessed independently.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Headers linux/irqchip/arm-gic.v3.h and arch/arm/include/asm/kvm_hyp.h
are included in virt/kvm/arm/hyp/vgic-v3-sr.c and both define macros
called __ACCESS_CP15 and __ACCESS_CP15_64 which obviously creates a
conflict. These macros were introduced independently for GIC and KVM
and, in fact, do the same thing.
As an option we could add prefixes to KVM and GIC version of macros so
they won't clash, but it'd introduce code duplication. Alternatively,
we could keep macro in, say, GIC header and include it in KVM one (or
vice versa), but such dependency would not look nicer.
So we follow arm64 way (it handles this via sysreg.h) and move only
single set of macros to asm/cp15.h
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
vgic-v3 driver uses architecture specific MPIDR_LEVEL_SHIFT macro to
encode the affinity in a form compatible with ICC_SGI* registers.
Unfortunately, that macro is missing on ARM, so let's add it.
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
PCI_DOMAINS config should be selected for any SoCs
having more than a single PCIe controller. Without PCI_DOMAINS
config, only one PCIe controller gets registered.
Select PCI_DOMAINS in ARCH_MULTIPLATFORM if PCI is selected, since
it doesn't harm even if a platform has a single PCIe port.
Also remove PCI_DOMAINS being selected from other platform
specific configs.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
*MIGHT_HAVE_PCI* config is already selected in ARCH_MULTIPLATFORM.
Don't select it redundantly in all ARCH_MULTIPLATFORM based machines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Here is a bunch of late changes for the 4.9 merge window, mostly:
- Added a bunch of touchscreens nodes to tablets
- Added support for the AXP806 PMIC found in the A80 boards
- Enabled a few pinmux options for the H3
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX4kquAAoJEBx+YmzsjxAg0hoQAMBb/q6gytX4BiTw+wp1winh
bidJiX0N8BzCWcSe8iraFXfCPGjKQEt+Cean/EH56FkgId5uD68aEQWYhGYpKSZZ
0x64Lq0U2SMOzQEYQAoZTPm6wn0LS0m07pi/pxPJGj08cD4sssWh/oPg6Bv71Rrr
jN21RfVJFEcd4DsqN5Ze2TGT2WeYtkFuYepUDysEGfll8qn9KiLH/10s4hR92R1M
TPU4nvNUajkPVNTAfF9LOmdjVmfq+IdtpJ9S7s0srCMt6hPgqPVHyVREOODwAgtA
llEA2zrVobE+hGSrFNPhXEIv9XN5McIY56CYLzuV0TQLzNIwTKpSc072i7IL6L1X
K+UF0nUCVbl/6z+/OKhMZubHMWfv9d6QUQqI81cbkcAAhABoewRZmF/PLRdf9xuc
5k5plcOfp/Bhs93DiV/2vjYpxfUuzPAnhl96orTfIMNPNx3nCWOlrirB/PLQUqSA
nBkcZCvbPIAkOlfELd7YPAjH4YwXX/gYHiKcmgFHnsa7PYMvR3VWU+2QOvc8k9vg
004OwclLa9gUJ6/neQa+oDnGQ85iAVUSzLaK0mnWHAWVTJrl9kaklDP7PkRQH6u9
eaEqQvR5pIjq8R2Ippgib33p7BA50RRPEtXSoCFmwwDcqMYqcUA78VVeBfYrRBRM
kJi2dZ+ywt7Lf4ZIwCPp
=YfLG
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.9-3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late
Pull "Allwinner DT changes for 4.9, late edition" from Maxime Ripard:
Here is a bunch of late changes for the 4.9 merge window, mostly:
- Added a bunch of touchscreens nodes to tablets
- Added support for the AXP806 PMIC found in the A80 boards
- Enabled a few pinmux options for the H3
* tag 'sunxi-dt-for-4.9-3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
ARM: dts: sun8i: add pinmux for UART1 at PG
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: add pinmux definitions for UART2-3
ARM: dts: sun9i: a80-optimus: Disable EHCI1
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
It includes a patch series that moves registrations and initializations
of all peripherals which are GPIO line consumers for all legacy boards
from .init_machine to .init_late init level. This is needed to
proactively prevent boot time issues on the legacy boards due to the
deprioritized init level of the GPIO controller driver (set lower than
IOMUX controller driver init level), which is shared among all i.MX
SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX4iCuAAoJEFBXWFqHsHzOUKUH/1Cw90wcp4+JupTAWcOrPWBH
5sEukURoA6IXKlEYsRrLqaTFLIg5dNqvJaJMyJI8g2G/95YluSmG1NaGCKLZ3Ipn
lYVSNkeeW5rwfini3Kg35b9eb4FPR16ygOwl9sltUDLwYZCyHHk4oorMvyOxRALP
dK6YBmEN6wUoxMaUFd622g80GsMPOEV3wY2NzQS+x+3rfVCQPQ7ZjQjqftvgw6yu
J/tZ1/71qj//dZPjnytIB/dpd732a5fIRXbRicMC7JSU0wuHXFj5iddDzOXaIBoT
u7YVg76xJ0ugRfMwMGk0r6Aoh0sxyglrb5e/OO4xdvfaIUVPrDhDtWImk0E09Wo=
=Vylx
-----END PGP SIGNATURE-----
Merge tag 'imx-legacy-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX legacy board file changes for 4.9" from Shawn Guo:
It includes a patch series that moves registrations and initializations
of all peripherals which are GPIO line consumers for all legacy boards
from .init_machine to .init_late init level. This is needed to
proactively prevent boot time issues on the legacy boards due to the
deprioritized init level of the GPIO controller driver (set lower than
IOMUX controller driver init level), which is shared among all i.MX
SoCs.
* tag 'imx-legacy-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx legacy: pca100: move peripheral initialization to .init_late
ARM: imx legacy: mx27ads: move peripheral initialization to .init_late
ARM: imx legacy: mx21ads: move peripheral initialization to .init_late
ARM: imx legacy: pcm043: move peripheral initialization to .init_late
ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late
ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late
ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late
ARM: imx legacy: vpr200: move peripheral initialization to .init_late
ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late
ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late
ARM: imx legacy: qong: move peripheral initialization to .init_late
ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late
ARM: imx legacy: pcm037: move peripheral initialization to .init_late
ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late
ARM: imx legacy: mx31ads: move peripheral initialization to .init_late
ARM: imx legacy: mx31lite: move peripheral initialization to .init_late
ARM: imx legacy: kzm: move peripheral initialization to .init_late
Provide a nicer to_sa1111_device macro to convert a struct device to a
sa1111_dev. We will need this for drivers when converting them to
dev_pm_ops, or removing shutdown methods.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add a dt node describing the mma7660 accelerometer on the
polaroid-mid2407pxe03 tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
UART1 is connected to the bluetooth part of RTL8723BS WiFi/BT combo card
on iNet D978 Rev2 board.
Enable the UART1 to make it possible to use the modified hciattach by
Realtek to drive the BT part of RTL8723BS.
On the board no r_uart pins are found now (the onboard RX/TX pins are
wired to PF2/PF4, which is muxed with mmc0), so also disabled it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The UART1 at PG (PG6, PG7, PG8, PG9) is, in the Allwinner's reference
tablet design of A23/33, used to connect to UART Bluetooth cards.
Add the pinmux for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These peripherals can only be muxed to these pins, so they are
associated in the DTSI instead of the board files. This makes it very
easy to enable them using overlays or u-boot commands:
=> fdt set /soc/i2c@01c2ac00 status okay
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These are the only possible pins for these peripherals according to the
datasheet.
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These H3 boards all expose UART1-3 on their expansion header. Since
other functions can be muxed to these pins, they are explicitly
disabled. To enable them, one could use DT overlays or U-boot commands:
=> fdt set /soc/serial@01c28c00 status okay
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This was done to make UART1-3 on H3 consistent, and less complicated to
enable UART1-3 on the breakout header on the several H3 board (notably
Orange Pi's). This patch adds a bit of complexity for the existing Banana
Pi, which already had the RTS/CTS associated on UART1.
The RTS/CTS for UART2-3 could be defined in the same way, but since
there is no actual use case for them at the moment, they are left out.
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These are the pinmux definitions for UART2-3 on H3. These UARTs can only
be muxed to these pins, so _a and @0 do not really make sense. I have
left out RTS/CTS, since these are rarely used. These can easily be
enabled using an additional pinmux set.
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
EHCI1 provides an HSIC interface. This interface is exposed on the
board through two pins among the GPIO header.
With the PHY now powered up and responding, enabling the interface when
nothing is connected results in a lot of error messages:
usb 2-1: device descriptor read/64, error -71
usb 2-1: device descriptor read/64, error -71
usb 2-1: new high-speed USB device number 3 using ehci-platform
usb 2-1: device descriptor read/64, error -71
usb 2-1: device descriptor read/64, error -71
usb 2-1: new high-speed USB device number 4 using ehci-platform
usb 2-1: device not accepting address 4, error -71
usb 2-1: new high-speed USB device number 5 using ehci-platform
usb 2-1: device not accepting address 5, error -71
usb usb2-port1: unable to enumerate USB device
Disable it by default, but leave the entries in the board DTS.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP806 PMIC is the secondary PMIC. It provides various supply
voltages for the SoC and other peripherals. The PMIC's interrupt
line is connected to NMI pin of the SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP806 PMIC is the secondary PMIC. It provides various supply
voltages for the SoC and other peripherals. The PMIC's interrupt
line is connected to NMI pin of the SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP809's SW (switch) regulator is unused on the Cubieboard 4.
Add an empty node for it so that the OS can generate constraints.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP809's SW (switch) regulator is unused on the A80 Optimus.
Add an empty node for it so that the OS can generate constraints.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ga10h tablet has a gsl3675 touchscreen, add a dt node describing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Add a node enabling the gsl3670 touchscreen controller found on
sun8i-a23-polaroid-mid2809pxe04 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Add a node enabling the gsl1680 touchscreen controller found on
sun8i-a23-polaroid-mid2407pxe03 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The inet86dz tablet has a gsl1680 touchscreen,
add a dt node describing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The gt90h tablet has a gsl3675 touchscreen, add a dt node describing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
And here's another nitpick ;-)
Cc: Agustí Fontquerni i Gorchs <afontquerni@iseebcn.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Pau Pajuel <ppajuel@gmail.com>
Fixes: b118c6a6ff ("ARM: dts: Add power button support for igepv5")
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
It should be GPIO_ACTIVE_LOW instead of GPIO_ACTIVE_HIGH as
pointed out by Pau Pajuel <ppajuel@gmail.com>.
Cc: Agustí Fontquerni i Gorchs <afontquerni@iseebcn.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Pau Pajuel <ppajuel@gmail.com>
Fixes: b118c6a6ff ("ARM: dts: Add power button support for igepv5")
Signed-off-by: Tony Lindgren <tony@atomide.com>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
The change is tested on qemu kzm target.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Clean up the duplication in the IRQ chip implementation - we can compute
the register address from the interrupt number rather than duplicating
the code for each register.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add a gpio_chip instance for SA1111 GPIOs. This allows us to use
gpiolib to lookup and manipulate SA1111 GPIOs.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Move the SA1111 interrupt cleanup to a separate function, so it can be
re-used in the probe error cleanup path.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Convert sa1111 to use devm_clk_get() to get its clock resource, and
strip out the clk_put() calls. This simplifies the error handling
a little.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use devm_kzalloc() to allocate our driver data, so we can eliminate its
kfree() from the device removal and error cleanup paths.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
When removing a SA1111 device, we try to remove all child devices.
However, we must only remove our own RAB bus typed devices from the
tree, there may be other devices present which should not be touched.
This is necessary before we introduce gpiochip to SA1111 to avoid
incorrectly trying to remove the gpiochip device, leading to an oops
in __release_resource().
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add blue-and-red-wiring -property to lcdc node. The am335x-evmsk has
blue and red wires crossed to get 24-bit RGB (and 16-bit BGR)
support. After this patch am335x-evmsk supports BGR565, RGB888, and
XRGB8888 color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Whitespace cleanup of lcdc related nodes. Do all indentation and
alignment with tabs instead of spaces.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add blue-and-red-wiring -property to lcdc node. The am335x-evm has
blue and red wires crossed to get 24-bit RGB (and 16-bit BGR)
support. After this patch am335x-evm supports BGR565, RGB888, and
XRGB8888 color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pull crypto fixes from Herbert Xu:
"This fixes a potential weakness in IPsec CBC IV generation, as well as
a number of issues that arose out of an OOM crash on ARM with CTR-mode
AES"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: arm64/aes-ctr - fix NULL dereference in tail processing
crypto: arm/aes-ctr - fix NULL dereference in tail processing
crypto: skcipher - Fix blkcipher walk OOM crash
crypto: echainiv - Replace chaining with multiplication
Replace in DT sources hard-coded values for pinctrl configuration like pull
up/down, drive strength and function. This makes the DTS easier to read,
especially that some drive strengths values are quite non-obvious.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX3r13AAoJEME3ZuaGi4PX1yUQAIgtpY7loocP8eZnvKSxL0Sv
mFDpDIyTot75P4enDJ762rqk12dyEKfBwOAhw3s1oFOUQyVKC+vQaC0Rg2xtGSPH
b+SBGSi8qhtjp3Idw6LNxgDYlgaKSbAVjIDNl4Wb6se0/CsV2yWrHpUT0oPuxlEb
zUe9qmBzuDvYkLiHiHSKtGFw0Slg1XiTS82Jp0xvpX8OwYNjz1AYJAsnsFcns0RH
aNtMlndVq7qVMyJnksnKm7E4DCAqLEesV9h7dqDDAnqgBKN40PK4uN2yjkA/YCra
ZbrLf5BTHDnEbaoctVwTjXh5uFDK0Jdu/F7U6XKKOxM9Ld7+0SVSeOJozK0Noi2S
7UN57Dga4xRzaDqQp0Bh7nucUeEsMPuVYiwG89e+LEYkCkF+P0hG38l3tMMxA6XA
8SDqeeTyEYu8q+2olFlkCFCqpOU/WcIdoWfbwbVgxRlx9UmaC6h7bmURLlHIsl5l
U1iGubxuGc3QEBi8rrFKNoImTnTqwfffwcLEawCGcji+qNRKV0gZUGW/gceLs4Db
7M3Vw43pM9Z1yc2R2D+LVLWaa7FUYAajD5zyAZ4Czhr2G3ZW670LVHp0PU8nqCGj
5Yo5nkNEiutyQ/77wp72aEzrFv9rOlpm8XY4kuZ3RRFzYSt6xbZYS1oO7QGk9Tey
DqAIGXIaU80bT87Hc7A3
=NN8A
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-pinctrl-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Topic branch for Samsung DeviceTree cleanup for 4.9" from Krzysztof Kozłowski:
Replace in DT sources hard-coded values for pinctrl configuration like pull
up/down, drive strength and function. This makes the DTS easier to read,
especially that some drive strengths values are quite non-obvious.
* tag 'samsung-dt-pinctrl-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s3c64xx: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415
ARM: dts: exynos: Fix mismatched value for SD4 pull up/down configuration on exynos4210
ARM: dts: exynos: Use macros for pinctrl configuration on exynos542x/exynos5800
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5410
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5260
ARM: dts: exynos: Use macros for pinctrl configuration on exynos5250
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4415
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4x12
ARM: dts: exynos: Use macros for pinctrl configuration on exynos4210
ARM: dts: exynos: Use macros for pinctrl configuration on exynos3250
ARM: dts: exynos: Use common macros for pinctrl configuration
pinctrl: dt-bindings: samsung: Update documentation with new macros
pinctrl: dt-bindings: samsung: Add header with values used for configuration
1. Enable HDMI on Arndale Octa board.
2. Update list of clocks for FIMC-IS block on Exynos4x12.
3. Remove skeleton.dtsi thus fixing DT compiler warning:
"Node /memory has a reg or ranges property, but no unit name"
This is a tree-wide effort by various people. Javier Martinez Canillas did
it for Exynos and S5PV210.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX3r7xAAoJEME3ZuaGi4PXBhAQAINQXD3iOkN8bLI6t29uZYgz
JMaOw+uIowZnOsREj/MnqN3b2GbuTl4ubPshKoPmZZPJSW5z+ekE1pBq4rsd5seh
M4FNUZShyhpu8UeMXbn1xzXXBc1/iOYVRSbfwUnlfHeZ0yMdPd6/GliR6ecvq2Mo
vMbdQsqrLNWZEXbSzifOtDKBAuCM8Nedz90arKn1BieYP3cRSs14PQ+l31m6U7n8
6JQ5/1C8Gd23xFArzETLmWHJqBIDry8LrtswmYJ4tbZEvP+zoFEpNTvQxpNWgIW5
NOMnr/IPGajY4n+UACoX6QMTOV98GWwequb4RFVc02nQkyIlfK7jStPQ8O6uYJcL
IGNStOIrJhhrh4vejwlL6VA8xzSXligfDVpNUWWxrELBIMU1LqNTY1gMMjljn1i8
/RHip+5RBnpKc0JIebRLFeSQ7lE3WhxMTiGCdf01taXOpzYpw0tgcGQMqb1052ol
Fse2uICYBV9GJC5dAzSMSLOGERaZBvqyA5uD7WeGq8yeHnM5ORzXmHhVNc3ohpYv
Vjnww1LHBzwFFbQyelygp9CpHi/5YALgkhe+Eh3v11qrrKrJUus0Sb14eNb1aKDz
qo3+G+b9l/o6Aq2Zs4iIhjOPhnk1q5TTIIdzBffgDf6WShd7/VtZnB0xVTlzG/f9
7dGXx1DKq4bJEREdW8xs
=gG35
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DeviceTree update for v4.9, second round" from Krzysztof Kozłowski:
1. Enable HDMI on Arndale Octa board.
2. Update list of clocks for FIMC-IS block on Exynos4x12.
3. Remove skeleton.dtsi thus fixing DT compiler warning:
"Node /memory has a reg or ranges property, but no unit name"
This is a tree-wide effort by various people. Javier Martinez Canillas did
it for Exynos and S5PV210.
* tag 'samsung-dt-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5p: Add missing unit name to memory nodes for S5PV210 boards
ARM: dts: s5p: Remove skeleton.dtsi inclusion for S5PV210
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos5 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos4 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos3 DTS
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos5
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos4
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos3
ARM: dts: exynos: Add missing memory node for Exynos5440 boards
ARM: dts: exynos: Add all required FIMC-IS clocks to exynos4x12
ARM: dts: exynos: Enable HDMI for Arndale Octa board
is mostly usability and non-critical fixes except for the addition of
beagleboard-x15 rev B1 support:
- Fix omap4 pandaboard SDIO WLAN latencies in idle mode by enabling wakeirq
- Usability fixes for WLAN, USB, LEDs and power button on omap5 boards
- Remove am57xx beagleboard-x15 pinmux configuration as the processor requires
that it's done in IO isolation in bootloader except for MMC and DCAN
- Add support for beagleboard-x15 rev B1 by moving most of the
configuration to am57xx-beagle-x15-common.dtsi
- Enable support for more than 2GB of memory for omap5 with LPAE with
#address-cells
- Fix omap3-gta04 backlight PWM frequency until the PWM driver
- Revert am335x dts changes related to cpufreq as the driver changes
still have not merged and the dts changes broke cpufreq
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJX2tgCERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzUg8Q
ANdFJ1HyqD0fUkIiNb1DCM4oq3dTNiIaTbrDxoUcUJgaf7/IGPDhKjP4Os/14cQf
F929u90B/ZKx1gVgcdUCUSMzBoTc2bQr4SvtvyJd7irz9sVH+Q0aIleGjPnXxRBS
qn7IbzeIy054wYU0NkNb3YefCdI1DN96FRhYJXPey1F9FD+tfbFFLKtzyEJvKn7M
35Y4wvwZcUqGBAbIhkK6BfQIEi2VSZL93xe/d2c5EfGpiXUlH6TshiDk+QxS+lx2
DqErsJwb+NZ0T8n/GsWaX3YQTH+X1P1aa+W94ZjJswo2buiuLxhrsRxB8Y6gJQ1r
hPKc9RnoqcxMLEbur0MSHVfYXHWU8kpt4vWwCaJfip5i/xQHpyxuyEeMGif/RtFN
2V6L3gDgRQ+/S34dVw486cCcGStTicC+xPU011tvNCRuPZ/cwv6nV7nzlA2dchOg
izd6Y/SVUbOZjPtBNzx/Cq3FZFK5vF3sAQ0/swnJpbl8VaHpjLzHOfG7/+4aQVGH
VB6zC413y+F3A0vzY640jQ4/enUWlJ5mZ59rO7PQfXhmuvFtZgK/mlCYnGtbI/Nn
lNV9+WsQ4/n/qIR+SVHpfLKU1NGRf1B/bWsCpeRPCeONktl9V7dpuDRiHZXyAVxZ
xDAsoscWtT77FWUQryc2hMLP1L+ED9rMnBuObXQRxFoZ
=HYYB
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "omap dts updates for v4.9 merge window, part 2" from Tony Lindgren:
Part two of device tree changes for omaps for v4.9 merge window. This
is mostly usability and non-critical fixes except for the addition of
beagleboard-x15 rev B1 support:
- Fix omap4 pandaboard SDIO WLAN latencies in idle mode by enabling wakeirq
- Usability fixes for WLAN, USB, LEDs and power button on omap5 boards
- Remove am57xx beagleboard-x15 pinmux configuration as the processor requires
that it's done in IO isolation in bootloader except for MMC and DCAN
- Add support for beagleboard-x15 rev B1 by moving most of the
configuration to am57xx-beagle-x15-common.dtsi
- Enable support for more than 2GB of memory for omap5 with LPAE with
#address-cells
- Fix omap3-gta04 backlight PWM frequency until the PWM driver
- Revert am335x dts changes related to cpufreq as the driver changes
still have not merged and the dts changes broke cpufreq
* tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Revert "ARM: dts: dra7: Move to operating-points-v2 table"
Revert "ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver"
Revert "ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu"
ARM: dts: omap3-gta04: reduce panel backlight PWM frequency to 83Hz
ARM: dts: Add support for more than 2GB of memory for omap5
ARM: dts: am57xx-beagle-x15: Add support for rev B1
ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869
ARM: dts: Fix LEDs for igepv5
ARM: dts: Add power button support for igepv5
ARM: dts: Configure omap5 OTG ID pin
ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt
ARM: dts: Configure panda SDIO WLAN wakeirq
Rafael J. Wysocki
Mark Brown
Roger Quadros
Robin Murphy
Radim Krčmář
Jisheng Zhang
Linus Walleij
Dave Airlie
Al Viro
Krzysztof Kozlowski
Wei Ni
Hans de Goede
Sam Van Den Berge
Niklas Söderlund
Scott Wood
Marc Zyngier
Arnd Bergmann
Vladimir Murzin
Kishon Vijay Abraham I
Russell King
Alexandre TORGUE
Icenowy Zheng
Jorik Jonker
Chen-Yu Tsai
Thomas Gleixner
Ladislav Michl
Tony Lindgren
Vladimir Zapolskiy
Ingo Molnar
Jyri Sarha
Linus Torvalds
Sebastian Andrzej Siewior
Benjamin Gaignard