please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
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Merge tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based Device Tree changes for v4.9,
please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
* tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: bcm2835: Add Raspberry Pi Zero
DT: bindings: bcm: Add Raspberry Pi Zero
ARM: dts: bcm283x: Add dtsi for USB host mode
ARM: dts: bcm283x: Add missing USB clock
ARM: dts: NSP: Add new DT file for bcm958622hr
ARM: dts: NSP: Add new DT file for bcm958623hr
ARM: dts: NSP: Add new DT file for bcm988312hr
ARM: dts: NSP: Add new DT file for bcm958522er
ARM: dts: NSP: Add new DT file for bcm958525er
ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file
ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file
ARM: dts: NSP: Specify RAM amount for BCM958525XMC board
ARM: dts: NSP: Specify RAM amount for BCM958625K board
ARM: dts: NSP: Enable SATA and add i2c devices on XMC
ARM: dts: NSP: Enable SATA on bcm958625hr
ARM: dts: NSP: Correct RAM amount for BCM958625HR board
ARM: dts: NSP: Add PWM Support to DT
ARM: BCM5301X: Specify PHY of USB 2.0 in DT
ARM: dts: NSP: Add BCM958625HR switch ports
ARM: dts: NSP: Add Switch Register Access Block node
...
Add support for big endian on the Allwinner A20, and the Nextthing GR8 SoC
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Merge tag 'sunxi-core-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner core changes for 4.9" from Maxime Ripard:
Add support for big endian on the Allwinner A20, and the Nextthing GR8 SoC
* tag 'sunxi-core-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Support the Nextthing GR8
ARM: sunxi: enable big-endian
This cycle is covering :
- the removal of the legacy DMA API
This is the major contributor to the negative diffstat, as dmaengine
have taken over in this area.
- IDE subsystem defconfig fixes
- preparation for pxa25x to be device-tree compliant
- various irq related fixes
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Merge tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux into next/soc
Pull "This is the pxa changes for v4.9 cycle" from Robert Jarzmik:
This cycle is covering :
- the removal of the legacy DMA API
This is the major contributor to the negative diffstat, as dmaengine
have taken over in this area.
- IDE subsystem defconfig fixes
- preparation for pxa25x to be device-tree compliant
- various irq related fixes
* tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux:
ARM: pxa: pxa_cplds: fix interrupt handling
ARM: pxa: remove irq init from dt machines
ARM: pxa: Use kmalloc_array() in pxa_pm_init()
ARM: pxa: magician: Remove duplicated I2C pins declaration
ARM: pxa: fix GPIO double shifts
arm: trizeps4_defconfig: disable IDE subsystem
arm: pxa255-idp_defconfig: disable IDE subsystem
arm: lpda270_defconfig: disable IDE subsystem
arm: colibri_pxa270_defconfig: disable IDE subsystem
ARM: pxa: add pxa25x device-tree support
ARM: pxa: prepare pxa25x interrupts for device-tree platforms
ARM: pxa: remove platform dma code
ARM: pxa: remove devicetree boards from pxa_defconfig
Clean-up:
* Only use smp_init when SMP is selected
Enablement:
* Add debug-ll support for r8a7992
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Merge tag 'renesas-soc-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.9" from Simon Horman:
Clean-up:
* Only use smp_init when SMP is selected
Enablement:
* Add debug-ll support for r8a7992
* tag 'renesas-soc-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: only use smp_init when SMP is selected
ARM: shmobile: r8a7790: only use smp_init when SMP is selected
ARM: debug-ll: Add support for r8a7992
the following:
- Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a
single core Cortex A7 and re-using a bunch of iProc peripherals
- Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by
reading the chip family_id value from a known location and deriving the UART
based address
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Merge tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC changes for 4.9, please pull
the following:
- Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a
single core Cortex A7 and re-using a bunch of iProc peripherals
- Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by
reading the chip family_id value from a known location and deriving the UART
based address
* tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux:
ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs
ARM: brcmstb: Add earlyprintk support using run-time checks
- Enable i.MX6 SATA and cpufreq driver support in multi_v7_defconfig.
- Enable MPL3115, Etnaviv GPU, WM8960 Codec driver and more USB
functions support in imx_v6_v7_defconfig.
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Merge tag 'imx-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
Merge "i.MX defconfig updates for 4.9" from Shawn Guo:
- Enable i.MX6 SATA and cpufreq driver support in multi_v7_defconfig.
- Enable MPL3115, Etnaviv GPU, WM8960 Codec driver and more USB
functions support in imx_v6_v7_defconfig.
* tag 'imx-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the wm8960 codec driver
ARM: imx_v6_v7_defconfig: Add CONFIG_MPL3115
ARM: imx_v6_v7_defconfig: Enable GPU support
ARM: imx_v6_v7_defconfig: enable more USB configurations
ARM: multi_v7_defconfig: Enable ARM_IMX6Q_CPUFREQ
ARM: multi_v7_defconfig: Enable AHCI_IMX
- update dsa config with new symbol
- add flash related config for mvebu v7
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Merge tag 'mvebu-defconfig-4.9-1' of git://git.infradead.org/linux-mvebu into next/defconfig
Pull "mvebu defconfig for 4.9 (part 1)" from Gregory CLEMENT:
- update dsa config with new symbol
- add flash related config for mvebu v7
* tag 'mvebu-defconfig-4.9-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu_v5_defconfig: use MV88E6XXX
ARM: mvebu: enable UBI and UBIFS in mvebu_v7_defconfig
ARM: mvebu: enable MTD command line partition table in mvebu_v7_defconfig
Keystone usb phy needs CONFIG_NOP_USB_XCEIV to be enabled.
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Merge tag 'keystone_config_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/defconfig
Pull "ARM: config: Add CONFIG_NOP_USB_XCEIV" from Santosh Shilimkar:
Keystone usb phy needs CONFIG_NOP_USB_XCEIV to be enabled.
* tag 'keystone_config_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: defconfig: Fix USB configuration
This helps to get 100% intensity closer to "always on".
It compensates for an effect of dmtimer which at 100% still emits short
"off" impulses and the startup-time of the DC/DC converter makes
backlight intensity not reach full scale. The lower the PWM frequency
is, the smaller is this effect.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
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Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
The default PHY configuration disables most of the LEDs. The following
configures the ethernet activity LEDs as Netgear intended.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This is a router based on the mv88f5181 chipset.
http://www.netgear.com/support/product/WNR854T.aspxhttp://wiki.openwrt.org/toh/netgear/wnr854t
[gregory.clement@free-electrons.com:
- extract dt part from "arm: orion5x: Add DT-based support for Netgear
WNR854T"
- squashed "arm: orion5x: Alias uart0 to serial0 for all orion5x" into
this commit and move serial0 alias from dtsi to dts]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
rd88f6183ap-ge passes NO_IRQ as the interrupt line for its m25p80
NOR flash. However, this device never uses an interrupt and the
driver doesn't care, so we can simply remove the deprecated constant
here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
One of the last users of NO_IRQ on ARM is the switch initialization
code on orion5x, which sometimes passes a GPIO based IRQ number.
However, the driver doesn't actually use this number, and according
to Andrew Lunn never will do it for non-DT based machines, so
we can simply drop the irq argument.
Simplifying it further, we can also drop the static platform_device
and instead call platform_device_register_data(), which in turn
lets us mark the platform_data structures as __initdata and slightly
reduce the memory consumption.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For most devices, we know in advance whether they have an
interrupt line or not, so we can avoid passing NO_IRQ and
instead split fill_resources() into two interfaces, with
only the new fill_resources_irq() function taking an irq
argument, which it then can use unconditionally.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Out of the four ethernet devices on mv78xx0, only the first one
has an error interrupt line, for the other ones we pass NO_IRQ
and then ignore the argument.
In order to get closer to complete remove of NO_IRQ, this simply
drops the unused function arguments.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Common definitions for the SoC for board definitions to use.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
orion-wdt refuses to start without these properties defined, so lift
definitions out of kirkwood/dove.dtsi
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit 88e957d6e4 ("xen: introduce xen_vcpu_id mapping") broke SMP
ARM guests on Xen. When FIFO-based event channels are in use (this is
the default), evtchn_fifo_alloc_control_block() is called on
CPU_UP_PREPARE event and this happens before we set up xen_vcpu_id
mapping in xen_starting_cpu. Temporary fix the issue by setting direct
Linux CPU id <-> Xen vCPU id mapping for all possible CPUs at boot. We
don't currently support kexec/kdump on Xen/ARM so these ids always
match.
In future, we have several ways to solve the issue, e.g.:
- Eliminate all hypercalls from CPU_UP_PREPARE, do them from the
starting CPU. This can probably be done for both x86 and ARM and, if
done, will allow us to get Xen's idea of vCPU id from CPUID/MPIDR on
the starting CPU directly, no messing with ACPI/device tree
required.
- Save vCPU id information from ACPI/device tree on ARM and use it to
initialize xen_vcpu_id mapping. This is the same trick we currently
do on x86.
Reported-by: Julien Grall <julien.grall@arm.com>
Tested-by: Wei Chen <Wei.Chen@arm.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
This patch enables the uniperif players 2 & 3 for b2120 boards
and also adds the "simple-audio-card" device node to interconnect
the SoC sound device and the codec.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT node for the uniperif reader
IP block found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT nodes for the uniperif player
IP blocks found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the dt node for the internal audio
codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the pinctrl config for the spidf out
pins used by the sasg codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_in pins
used by the uniperif reader IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_out pins
used by the uniperif player IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec31
("ARM: dts: DRA7: change address-cells and size-cells").
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Latest update to the BeagleBoard-X15 platform (revision B1)[1] updates
for allowing UHS SD cards to function with the split of supply to SD
card from a dedicated LDO.
As a result of this, AM57xx BeagleBoard-X15 now uses gpio2_30 instead
of gpio6_28 for HDMI because HDMI_LS_OE should now be switched from
GPIO6_28(Y9) to GPIO2_30 (AG8) to avoid a 1.8V GPIO toggling a 3.3V
SoC input when the SD card is in UHS 1.8V mode.
NOTE: For UHS mode to function, we need full fledged IODelay support
in kernel to be functional. IODelay support is yet to be added.
Further, It does not make much sense to spin off a new board
compatible flag since there is no real functional benefit for the
same.
Note: Even though production version is supposed to be B1, there is
over ~200 boards of previous version (A2)[2] out there which continue
to get supported with the existing dts file (to maintain compatibility
with existing bootloaders for A2) and the production board is now
supported as revb1.
[1] https://github.com/beagleboard/beagleboard-x15/blob/master/BEAGLEBOARD_X15_REV_B1.pdf
[2] http://marc.info/?l=linux-arm-kernel&m=147273929820708&w=2
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
isolation as part of initial bootloader executed from SRAM. This is
done as part of iodelay configuration sequence and is required due
to the limitations introduced by erratum ID: i869[1] (IO Glitches
can occur when changing IO settings) and elaborated in the Technical
Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
Only peripheral that is permitted for dynamic pin mux configuration
is MMC and DCAN. MMC is permitted to change to accommodate the
requirements for varied speeds (which require IO-delay support in
kernel as well). DCAN is a result of i893[1] (DCAN initialization
sequence). However, since we don't use DCAN on X15, with the exception
of MMC, all other pin mux configurations are removed from the dts.
[1] http://www.ti.com/lit/pdf/sprz429
[2] http://www.ti.com/lit/pdf/sprui30
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LEDs on igepv5 are on the GPIO expander unlike on omap5-uevm.
Configuration copied from git.isee.biz git tree except fixed for
red and blue mapping.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add power button support for igepv5.
Cc: Agustí Fontquerni i Gorchs <afontquerni@iseebcn.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Pau Pajuel <ppajuel@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
for the driver to use, and also make sure the PMIC GPIO pin muxing
is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
the ID pin GPIO work.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Few changes to fix issues I've noticed while debugging omap5-uevm
wl18xx issues:
1. Move wlcore irq pin muxing under wlcore. This irq could be
different from gpio_wk14 on some board variants
2. Don't configure pull on wlcore irq pin. There is a 10k
pull up resistor R105 on the device to VDDS_1v8_MAIN
3. The padconf register for wlsdio_data1 is wrong, it's really
at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
for wlsdio_data0
4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
that's what the TDK R078 part seems to be
5. The MMC interrupt for WLAN musb be wakeupgen, not gic
Looks like omap5-uevm WLAN behaves better now, but I still seem
to have issues with some access points.
Signed-off-by: Tony Lindgren <tony@atomide.com>
A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.
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Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late
Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:
A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.
To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.
* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
ARM: dts: gr8: Add support for the GR8 evaluation board
ARM: dts: Add NextThing GR8 dtsi
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
ARM: sun8i: a23/a33: Add RGB666 pins
ARM: sun8i: a33: Add display pipeline
ARM: sun8i: Convert the A23 and A33 to the CCU
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
...
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Merge tag 'clcd-nomadik' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "CLCD graphics on the Nomadik NHK15" from Linus Walleij:
* tag 'clcd-nomadik' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add the CLCD LCD display to the NHK15
ARM: dts: add PMU to the NHK15 device tree
ARM: nomadik: select MFD_SYSCON
dt-bindings: Add TPO TPG110 binding
dt-bindings: add vendor TPO
ARM: dts: add STMPE PWM to the NHK15 device tree
- Add SoC support for i.MX7 Solo which is a reduced version of i.MX7
Dual.
- New board support: Gateworks Ventana i.MX6Q/DL GW553x, Inverse Path
i.MX53 USB armory, i.MX6Q/DL TS-4900 from Technologic Systems,
i.MX6UL GEA M6UL modules from Engicam, i.MX7 Solo Warp7 board.
- Add DMA and IPU CSI devices for i.MX53 SoC support.
- Refine i.MX7 Dual SoC DTS as a preparation of i.MX7 Solo support.
- Use of_graph dt nodes to describe the panel for vf610-colibri and
ls1021a-twr boards.
- Add gpio-ranges property to i.MX6 GPIO controllers, which will be
useful when GPIO driver is changed to request pad configuration as
GPIO function.
- Random device additions or small changes for various board support.
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Merge tag 'imx-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree changes for 4.9" from Shawn Guo:
- Add SoC support for i.MX7 Solo which is a reduced version of i.MX7
Dual.
- New board support: Gateworks Ventana i.MX6Q/DL GW553x, Inverse Path
i.MX53 USB armory, i.MX6Q/DL TS-4900 from Technologic Systems,
i.MX6UL GEA M6UL modules from Engicam, i.MX7 Solo Warp7 board.
- Add DMA and IPU CSI devices for i.MX53 SoC support.
- Refine i.MX7 Dual SoC DTS as a preparation of i.MX7 Solo support.
- Use of_graph dt nodes to describe the panel for vf610-colibri and
ls1021a-twr boards.
- Add gpio-ranges property to i.MX6 GPIO controllers, which will be
useful when GPIO driver is changed to request pad configuration as
GPIO function.
- Random device additions or small changes for various board support.
* tag 'imx-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
ARM: dts: add gpio-ranges property to iMX GPIO controllers
ARM: dts: imx35: add iim module to imx35.dtsi
ARM: dts: vf610-colibri: use of_graph dt nodes to describe the panel
ARM: dts: ls1021a: Add of_graph dt nodes to describe the panel
ARM: dts: imx53: add support for USB armory board
devicetree: Add vendor prefix for Inverse Path
ARM: dts: imx7s-warp: Add Bluetooth support
ARM: dts: imx7s-warp: Add User Button support
ARM: dts: imx7s-warp: Enable I2C2 device support
ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
ARM: dts: imx7-colibri: add Audio support
ARM: dts: imx7-colibri: add basic supply regulators
ARM: dts: imx7-colibri: move SD-card to module level
ARM: dts: imx6sx: Add GPU bindings
ARM: dts: imx7s-warp: Let the codec control MCLK pinctrl
ARM: dts: imx6ul-pico-hobbit: Use WDOG_B pin reset
ARM: dts: imx6q-bx50v3: configure unused pca953x pins
ARM: dts: imx6sx: document SION necessity of ENET1_REF_CLK1
ARM: dts: imx7s-warp: Use WDOG_B pin reset
...
Split the DTS files in per-revision variants
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Merge tag 'realview-dts-split' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Pull "RealView DTS file fixup and split" from Linus Walleij:
Fix the ethernet issue on revision D of the RealView EB
Split the DTS files in per-revision variants
* tag 'realview-dts-split' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: add RealView EB rev D A9 MPCore variant
ARM: dts: split RealView EB 11MPCore variants
ARM: dts: add device tree for the RealView EB Rev D
ARM: dts: fix RealView EB SMSC ethernet version
Contains a couple of cleanups for Tegra114 device trees.
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Merge tag 'tegra-for-4.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Contains a couple of cleanups for Tegra114 device trees.
* tag 'tegra-for-4.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Correct polarity for Tegra114 PMIC interrupt
ARM: tegra: Fix Tegra114 USB compatible values
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
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Merge tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.9" from Heiko Stübner:
32bit Rockchip devicetree changes containing two new rk3288 boards (Fennec
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
* tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add sensor-supplies on PopMetal-RK3288 board
ARM: dts: rockchip: fix L3G4200D i2c address on PopMetal-RK3288 board
ARM: dts: rockchip: enable usbotg for Popemtal-rk3288 board
ARM: dts: rockchip: add missing regulators for firefly reload board
ARM: dts: rockchip: remove excess sd properties from firefly reload
ARM: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
ARM: dts: rockchip: move rk3288 usbphy under the GRF node
ARM: dts: rockchip: add rk3288-firefly-reload
ARM: dts: rockchip: add dts for RK3288-Fennec boards
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with rk808 pmu
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with act8846 pmu
ARM: dts: rockchip: add eDP/panel display device nodes for rk3288-evb
Business as usual on our side, with a mix of new boards and new IPs enabled
on boards:
- Support for the GPIO found on the AXP PMIC
- ESP8089 on the relevant boards
- More boards converted to the reference design and q8 designs
- New boards: Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange
Pi Lite, Olimex A33-Olinuxino, Empire Electronix M712, inet-d978_rev2,
Nano Pi Neo
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Merge tag 'sunxi-dt-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.9" from Maxime Ripard:
Business as usual on our side, with a mix of new boards and new IPs enabled
on boards:
- Support for the GPIO found on the AXP PMIC
- ESP8089 on the relevant boards
- More boards converted to the reference design and q8 designs
- New boards: Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange
Pi Lite, Olimex A33-Olinuxino, Empire Electronix M712, inet-d978_rev2,
Nano Pi Neo
* tag 'sunxi-dt-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (31 commits)
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
ARM: dts: sun8i: Add PWM controller node in H3
ARM: dts: sun8i: Add dts file for inet-d978_rev2 tablets
ARM: dts: sun9i: Add missing #interrupt-cells to R_PIO pinctrl device node
ARM: dts: sun8i: Rename reference-design-tablet touchscreen node
ARM: dts: sun5i: Add dts file for the Empire Electronix M712 tablet
ARM: dts: sun5i: Convert inet-98v-rev2 dts to use reference-design-tablet.dtsi
ARM: dts: sun4i: Disable ohci1 on ba10-tv-box
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2809
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2407
ARM: dts: sun8i: add NAND controller node for A23/A33
ARM: dts: sun6i: Add new dts file for tablets using the inet-q972 PCB
ARM: dts: sun6i: Add sun6i-reference-design-tablet.dtsi
ARM: dts: sun6i: colorfly-e708-q1: Remove unused mma8452_int_e708_q1 node
ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32k
ARM: dts: sun9i: cubieboard4: Add device node for AC100
...
* Removal of skeleton.dtsi from the common armv7-m dtsi together
with lpc18xx and efm32 platforms.
* Fix for unit address warnings from the dtc on lpc18xx/efm32.
That is made possible with skeleton.dtsi gone.
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Merge tag 'lpc18xx_dts_for_4.9_part2' of https://github.com/manabian/linux-lpc into next/dt
Pull "Device Tree clean up for LPC18xx platform" from Joachim Eastwood:
* Removal of skeleton.dtsi from the common armv7-m dtsi together
with lpc18xx and efm32 platforms.
* Fix for unit address warnings from the dtc on lpc18xx/efm32.
That is made possible with skeleton.dtsi gone.
* tag 'lpc18xx_dts_for_4.9_part2' of https://github.com/manabian/linux-lpc:
ARM: dts: efm32: remove skeleton.dtsi include and fix unit address warnings
ARM: dts: lpc18xx: remove skeleton.dtsi include and fix unit address warnings
ARM: dts: armv7-m: remove skeleton.dtsi include
- update for Armada XP/38x allowing using direct access SPI
- various improvement for Armada 39x platforms
- add pinctrl information for NANd on Armada 38x
- fix the kirkwood based Openblock A6 external GPIO pins
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Merge tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.9 (part 1)" from Gregory CLEMENT:
- update for Armada XP/38x allowing using direct access SPI
- various improvement for Armada 39x platforms
- add pinctrl information for NANd on Armada 38x
- fix the kirkwood based Openblock A6 external GPIO pins
* tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: fix reference to a390 spi controller
ARM: dts: armada-38x: Add NAND pinctrl information
ARM: dts: kirkwood: Fix Openblock A6 external GPIO pins
ARM: dts: mvebu: armada-395-gp: add support for the Armada 395 GP Board
ARM: dts: mvebu: armada-390-db: add support for the Armada 390 DB board
ARM: dts: mvebu: armada-398-db: enable supported usb interfaces
ARM: dts: mvebu: armada-398: update the dtsi about missing interfaces
ARM: dts: mvebu: armada-395: add support for the Armada 395 SoC family
ARM: dts: mvebu: armada-39x: enable rtc for all Armada-39x SoCs
ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's
ARM: dts: mvebu: armada-39x: enable watchdog for all Armada-39x SoCs
ARM: dts: mvebu: armada-39x: enable the thermal sensor in Armada-39x SoCs
ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric
ARM: dts: mvebu: armada-39x: update the SDHCI node on Armada 39x
ARM: dts: mvebu: armada-390: add missing compatibility string and bracket
ARM: dts: mvebu: a385-db-ap: add default partition description for NAND
ARM: dts: mvebu: a385-db-ap: enable USB (orion-ehci) port
ARM: dts: mvebu: armada-370-xp: Add MBus mappings for all SPI devices
ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node
ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XP
As noted in commit 3ebee5a2e1 ("arm64: dts: kill skeleton.dtsi"),
there are a number of problems with skeleton.dtsi, and it would be
prefereable to remove it entirely. As there are a large number of
existing users, fixing these up will take a while.
This patch adds a note to arm's skeleton.dtsi noting that this is the
case, to make this more obvious and hopefully minimize new uptake of
skeleton.dtsi in the mean time.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update elm phandle for am335x
- Fix overo NAND gpmc ranges, this has always been broken so it can
wait for the merge window
- Fix NAND and use NAND ready pin for logicpd gpmc, this can wait too
as it's been using the older configration since the dts got added
- A series of dtc warning fixes for unit names
- Keep dcdc3, 5 and 6 enabled during suspend on am347x boards
- Disable DDR regulator during rtc-only/poweroff mode for am437x boards
- Remove redundant regulator compatibles for am437x boards
- Increas QSPI max frequency for dra7 boards
- Enable QSPI for am57xx-idk-common
- Enable am335x-wega audio support
- Workaround for i845 for dra7
- Update binding for logicpd boards
- Add gpio-decoder nodes for am335x-icev2 board
- Add linux,pci-domain property for dra7
- Fix dra7 clock data gmac_gmii_ref_clk_div and related clock tree
entries, these can wait for merge window as Ethernet works on dra7
- A series of changes to drop skeleton.dtsi because of dtc warnings
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Merge tag 'omap-for-v4.9/dt-pt1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "DTS related changes for omaps for v4.9 merge window" from Tony Lindgren:
- Update elm phandle for am335x
- Fix overo NAND gpmc ranges, this has always been broken so it can
wait for the merge window
- Fix NAND and use NAND ready pin for logicpd gpmc, this can wait too
as it's been using the older configration since the dts got added
- A series of dtc warning fixes for unit names
- Keep dcdc3, 5 and 6 enabled during suspend on am347x boards
- Disable DDR regulator during rtc-only/poweroff mode for am437x boards
- Remove redundant regulator compatibles for am437x boards
- Increas QSPI max frequency for dra7 boards
- Enable QSPI for am57xx-idk-common
- Enable am335x-wega audio support
- Workaround for i845 for dra7
- Update binding for logicpd boards
- Add gpio-decoder nodes for am335x-icev2 board
- Add linux,pci-domain property for dra7
- Fix dra7 clock data gmac_gmii_ref_clk_div and related clock tree
entries, these can wait for merge window as Ethernet works on dra7
- A series of changes to drop skeleton.dtsi because of dtc warnings
* tag 'omap-for-v4.9/dt-pt1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (54 commits)
ARM: dts: dra7: Add missing unit name to memory nodes
ARM: dts: dra62x: Add missing unit name to memory nodes
ARM: dts: dm8168: Add missing unit name to memory nodes
ARM: dts: dm8148: Add missing unit name to memory nodes
ARM: dts: am572x: Add missing unit name to memory nodes
ARM: dts: am4372: Add missing unit name to memory nodes
ARM: dts: am3517: Add missing unit name to memory nodes
ARM: dts: am335x: Add missing unit name to memory nodes
ARM: dts: omap5: Add missing unit name to memory nodes
ARM: dts: omap4: Add missing unit name to memory nodes
ARM: dts: omap3: Add missing unit name to memory nodes
ARM: dts: omap2: Add missing unit name to memory nodes
ARM: dts: am4372: Remove skeleton.dtsi usage
ARM: dts: dra7: Remove skeleton.dtsi usage
ARM: dts: dm816x: Remove skeleton.dtsi usage
ARM: dts: dm814x: Remove skeleton.dtsi usage
ARM: dts: am33xx: Remove skeleton.dtsi usage
ARM: dts: omap5: Remove skeleton.dtsi usage
ARM: dts: omap4: Remove skeleton.dtsi usage
ARM: dts: omap3: Remove skeleton.dtsi usage
...
* Match DT names other projects and documents
* Switch over to PSCI
* Use clock/reset drivers
* Misc
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Merge tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
Merge "UniPhier ARM SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Switch over to PSCI
* Use clock/reset drivers
* Misc
* tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: add specific compatible to SoC-Glue node
ARM: dts: uniphier: use clock/reset controllers
ARM: dts: uniphier: switch over to PSCI
ARM: dts: uniphier: match DT names to other projects and documents
ARM: dts: uniphier: remove a whitespace after tabs
1. Set chosen serial bitrate which allows proper serial output when
bootloader does pass all the data in command line.
2. Cleanup.
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Merge tag 'samsung-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung DeviceTree update for v4.9" from Krzysztof Kozlowski:
1. Set chosen serial bitrate which allows proper serial output when
bootloader does pass all the data in command line.
2. Cleanup.
* tag 'samsung-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use 'hpd-gpios' instead of 'hpd-gpio'
ARM: dts: exynos: Use stdout non-deprecated property and add serial options to Odroid XU/XU3/XU4
Small fix for the compatible string for the NXP SE97 I2C chip on the
Hitex Eval board from Guenter and a couple of additional DT properties
for the DWMAC that is need for correct operation.
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Merge tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc into next/dt
Merge "Device Tree additions for LPC18xx platform" from Joachim Eastwood:
Small fix for the compatible string for the NXP SE97 I2C chip on the
Hitex Eval board from Guenter and a couple of additional DT properties
for the DWMAC that is need for correct operation.
* tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc:
ARM: dts: lpc18xx: configure dwmac properly
ARM: dts: lpc4350-hitex-eval: fix binding for SE97 i2c device
Use the cache settings that were determined to give best performance
on artpec-6 typical workloads.
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Paul Mackerras writes:
The highlights are:
* Reduced latency for interrupts from PCI pass-through devices, from
Suresh Warrier and me.
* Halt-polling implementation from Suraj Jitindar Singh.
* 64-bit VCPU statistics, also from Suraj.
* Various other minor fixes and improvements.
The AES-CTR glue code avoids calling into the blkcipher API for the
tail portion of the walk, by comparing the remainder of walk.nbytes
modulo AES_BLOCK_SIZE with the residual nbytes, and jumping straight
into the tail processing block if they are equal. This tail processing
block checks whether nbytes != 0, and does nothing otherwise.
However, in case of an allocation failure in the blkcipher layer, we
may enter this code with walk.nbytes == 0, while nbytes > 0. In this
case, we should not dereference the source and destination pointers,
since they may be NULL. So instead of checking for nbytes != 0, check
for (walk.nbytes % AES_BLOCK_SIZE) != 0, which implies the former in
non-error conditions.
Fixes: 86464859cc ("crypto: arm - AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions")
Cc: stable@vger.kernel.org
Reported-by: xiakaixu <xiakaixu@huawei.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
defconfigs.
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Merge tag 'samsung-defconfig-schedutil-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into pm-cpufreq-sched
The schedutil cpufreq governor will be switched from tristate to bool. Fix
defconfigs.
* tag 'samsung-defconfig-schedutil-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Don't attempt to enable schedutil governor as module
ARM: exynos_defconfig: Don't attempt to enable schedutil governor as module
Currently, when running on FVP, CPU 0 boots up with its BPR changed from
the reset value. This renders it impossible to (preemptively) prioritize
interrupts on CPU 0.
This is harmless on normal systems since Linux typically does not
support preemptive interrupts. It does however cause problems in
systems with additional changes (such as patches for NMI simulation).
Many thanks to Andrew Thoelke for suggesting the BPR as having the
potential to harm preemption.
Suggested-by: Andrew Thoelke <andrew.thoelke@arm.com>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
is invoked at module load time, to get rid of the O(n^2) algorithm
that results in pathological load times of 10 seconds or more for
large modules on certain STB platforms
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Merge tag 'arm-plt-optimizations-for-v4.9' of git://git.linaro.org/people/ard.biesheuvel/linux-arm into devel-stable
This series of 4 patches optimizes the ARM PLT generation code that
is invoked at module load time, to get rid of the O(n^2) algorithm
that results in pathological load times of 10 seconds or more for
large modules on certain STB platforms
Add the required PCMCIA clock for the SA1111 "1800" device. This clock
is used to compute timing information for the PCMCIA interface in the
SoC device, rather than the SA1111. Hence, the provision of this clock
is a convenience for the driver and does not reflect the hardware, so
this must not be copied into DT.
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Accidentally booting Collie on Assabet reveals that the locomo driver
incorrectly overwrites gpio-sa1100's chip data for its parent interrupt,
leading to oops in sa1100_gpio_unmask() and sa1100_update_edge_regs()
when "gpio: sa1100: convert to use IO accessors" is applied. Fix locomo
to use the handler data rather than chip data for its parent interrupt.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The cachepolicy variable gets initialized using a masked pmd
value. So far, the pmd has been masked with flags valid for the
2-page table format, but the 3-page table format requires a
different mask. On LPAE, this lead to a wrong assumption of what
initial cache policy has been used. Later a check forces the
cache policy to writealloc and prints the following warning:
Forcing write-allocate cache policy for SMP
This patch introduces a new definition PMD_SECT_CACHE_MASK for
both page table formats which masks in all cache flags in both
cases.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
SA1111 PCMCIA was broken when PCMCIA switched to using dev_pm_ops for
the PCMCIA socket class. PCMCIA used to handle suspend/resume via the
socket hosting device, which happened at normal device suspend/resume
time.
However, the referenced commit changed this: much of the resume now
happens much earlier, in the noirq resume handler of dev_pm_ops.
However, on SA1111, the PCMCIA device is not accessible as the SA1111
has not been resumed at _noirq time. It's slightly worse than that,
because the SA1111 has already been put to sleep at _noirq time, so
suspend doesn't work properly.
Fix this by converting the core SA1111 code to use dev_pm_ops as well,
and performing its own suspend/resume at noirq time.
This fixes these errors in the kernel log:
pcmcia_socket pcmcia_socket0: time out after reset
pcmcia_socket pcmcia_socket1: time out after reset
and the resulting lack of PCMCIA cards after a S2RAM cycle.
Fixes: d7646f7632 ("pcmcia: use dev_pm_ops for class pcmcia_socket_class")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The polarity of the high IRQs was being calculated using
SA1111_IRQMASK_HI(), but this assumes a Linux interrupt number, not a
hardware interrupt number. Hence, the resulting mask was incorrect.
Fix this.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Ensure that we propagate the platform_get_irq() error code out of the
probe function. This allows probe deferrals to work correctly should
platform_get_irq() not be able to resolve the interrupt in a DT
environment at probe time.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND,
an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI,
I2S and LCD.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The GR8 is an SoC made by Nextthing loosely based on the sun5i family.
Since it's not clear yet what we can factor out and merge with the A10s and
A13 support, let's keep it out of the sun5i.dtsi include tree. We will
figure out what can be shared when things settle down.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Switch the jornada720 touchscreen driver to obtain its gpio from
the platform device via gpiolib and derive the interrupt from the
GPIO, rather than via a hard-coded interrupt number obtained from
the mach/irqs.h and mach/hardware.h headers.
Tested-by: Adam Wysocki <armlinux@chmurka.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The usbphy and usb_otg nodes in the A23 and A33 dts files only differ
by compatible, and for the usbphy, the size of one of its register
regions.
Move all the common bits to the A23/A33 common dtsi file.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The LCD output needs to be muxed. Add the proper pinctrl node.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Now that we have support for the CCU driver in sunxi-ng, convert the A23
and A33 DTs to that driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Now that we have a different clock representation, switch to it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds the TPG110 TDO43MTEA2 24-bit RGB LCD panel and sets
up the Nomadik device tree to activate the CLCD and connect it
to this panel.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The so-called Nomadik Power Mangament Unit is actually a set
of some power management registers and some miscellaneous
system control stuff like muxing of entire hardware units.
Add this as a system controller.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the Power Management Unit is using syscon to access a
set of necessary hardware muxing, let's select MFD_SYSCON for
the Nomadik subarchitecture.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since its initial commit, the driver is buggy for multiple interrupts
handling. The translation from the former lubbock.c file was not
complete, and might stall all interrupt handling when multiple
interrupts occur.
This is especially true when inside the interrupt handler and if a new
interrupt comes and is not handled, leaving the output line still held,
and not creating a transition as the GPIO block behind would expect to
trigger another cplds_irq_handler() call.
For the record, the hardware is working as follows.
The interrupt mechanism relies on :
- one status register
- one mask register
Let's suppose the input irq lines are called :
- i_sa1111
- i_lan91x
- i_mmc_cd
Let's suppose the status register for each irq line is called :
- status_sa1111
- status_lan91x
- status_mmc_cd
Let's suppose the interrupt mask for each irq line is called :
- irqen_sa1111
- irqen_lan91x
- irqen_mmc_cd
Let's suppose the output irq line, connected to GPIO0 is called :
- o_gpio0
The behavior is as follows :
- o_gpio0 = not((status_sa1111 & irqen_sa1111) |
(status_lan91x & irqen_lan91x) |
(status_mmc_cd & irqen_mmc_cd))
=> this is a N-to-1 NOR gate and multiple AND gates
- irqen_* is exactly as programmed by a write to the FPGA
- status_* behavior is governed by a bi-stable D flip-flop
=> on next FPGA clock :
- if i_xxx is high, status_xxx becomes 1
- if i_xxx is low, status_xxx remains as it is
- if software sets status_xxx to 0, the D flip-flop is reset
=> status_xxx becomes 0
=> on next FPGA clock cycle, if i_xxx is high, status_xxx becomes
1 again
Fixes: fc9e38c0f4 ("ARM: pxa: lubbock: use new pxa_cplds driver")
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The init_irq and handle_irq can be declared through standard irqchip
declaration and are not necessary in machine descriptions.
This is another step towards the generic kernel for the pxa
architecture.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by using the Coccinelle software.
* Replace the specification of a data type by a pointer dereference
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Magician has GPIO117_I2C_SCL and GPIO118_I2C_SDA pins declared twice.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The commit 9bf448c66d ("ARM: pxa: use generic gpio operation instead of
gpio register") from Oct 17, 2011, leads to the following static checker
warning:
arch/arm/mach-pxa/spitz_pm.c:172 spitz_charger_wakeup()
warn: double left shift '!gpio_get_value(SPITZ_GPIO_KEY_INT)
<< (1 << ((SPITZ_GPIO_KEY_INT) & 31))'
As Dan reported, the value is shifted three times :
- once by gpio_get_value(), which returns either 0 or BIT(gpio)
- once by the shift operation '<<'
- a last time by GPIO_bit(gpio) which is BIT(gpio)
Therefore the calculation lead to a chained or operator of :
- (1 << gpio) << (1 << gpio) = (2^gpio)^gpio = 2 ^ (gpio * gpio)
It is be sheer luck the former statement works, only because each gpio
used is strictly smaller than 6, and therefore 2^(gpio^2) never
overflows a 32 bits value, and because it is used as a boolean value to
check a gpio activation.
As the xxx_charger_wakeup() functions are used as a true/false detection
mechanism, take that opportunity to change their prototypes from integer
return value to boolean one.
Fixes: 9bf448c66d ("ARM: pxa: use generic gpio operation instead of
gpio register")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
With the introduction of critical-clock support in v4.8, our developers'
default configuration is to run with 'clk_ignore_unused' removed. This
patch-set ensures they can achieve successful boot when a) booting from
an SD Card and when b) booting using USB->Eth adaptors for NFS booting.
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Merge tag 'sti-dt-fixes-for-v4.8-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into fixes
Pull "Handle STiH410 interconnect clock required for EHCI/OHCI and SDHCI" from Patrice Chotard:
With the introduction of critical-clock support in v4.8, our developers'
default configuration is to run with 'clk_ignore_unused' removed. This
patch-set ensures they can achieve successful boot when a) booting from
an SD Card and when b) booting using USB->Eth adaptors for NFS booting.
* tag 'sti-dt-fixes-for-v4.8-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI
ARM: dts: STiH410: Handle interconnect clock required by EHCI/OHCI (USB)
This file is included from DTS files under arch/arm64 too (via
broadcom/bcm2837-rpi-3-b.dts and broadcom/bcm2837.dtsi). There is a desire
not to have skeleton.dtsi for ARM64. See commit 3ebee5a2e1 ("arm64: dts:
kill skeleton.dtsi") for rationale for its removal.
As well as the addition of #*-cells also requires adding the device_type to
the rpi memory node explicitly.
Note that this change results in the removal of an empty /aliases node from
bcm2835-rpi-a.dtb and bcm2835-rpi-a-plus.dtb. I have no hardware to check
if this is a problem or not.
It also results in some reordering of the nodes in the DTBs (the /aliases
and /memory nodes come later). This isn't supposed to matter but, again,
I've no hardware to check if it is true in this particular case.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull ARM fixes from Russell King:
"A few ARM fixes:
- Robin Murphy noticed that the non-secure privileged entry was
relying on undefined behaviour, which needed to be fixed.
- Vladimir Murzin noticed that prov-v7 fails to build for MMUless
configurations because a required header file wasn't included.
- A bunch of fixes for StrongARM regressions found while testing
4.8-rc on such platforms"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: sa1100: clear reset status prior to reboot
ARM: 8600/1: Enforce some NS-SVC initialisation
ARM: 8599/1: mm: pull asm/memory.h explicitly
ARM: sa1100: register clocks early
ARM: sa1100: fix 3.6864MHz clock
By using a common attr_groups array, the common arm_pmu code can set up
common files (e.g. cpumask) for us in subsequent patches.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Cortex A9 MPCore tile can be mounted on top of the revision
D variant of the RealView EB, so create another variant of the
DTS file for this.
arm-realview-eb-a9mp = mounted on pre-revision D baseboard
arm-realview-eb-a9mp-bbrevd = mounted on the revision D baseboard
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There used to be two versions of the RealView EB 11MPCore:
- arm-realview-eb-11mp.dts: the most common variant supported by
QEMU with the revision C core tile
- arm-realview-eb-revb.dts: for the variant with the elder revision
B core tile.
As it turns out that there are also a few variants of the
baseboard, unrelated to the coretile, and that these can of
course be mounted on top of each other in all permutations, we
create:
- arm-realview-eb-11mp.dts: the most common variant supported by
QEMU with the pre-revision D baseboard and the revision C core
tile.
- arm-realview-eb-11mp-bbrevd.dts: the revision D baseboard
with the common revision C core tile.
- arm-realview-eb-11mp-ctrevb.dts: the pre-revision D baseboard
with the revision B core tile.
- arm-realview-eb-11mp-bbrevd-ctrevb.dts: the revision D baseboard
with the revision B core time.
Or as a table:
| Core tile: C | Core tile: B
-----------+----------------------------+-----------------------------------
Baseboard: | |
pre-D |arm-realvie-eb-11mp | arm-realview-eb-11mp-ctrevb
-----------+----------------------------+-----------------------------------
Baseboard: | |
D |arm-realview-eb-11mp-bbrevd | arm-realview-eb-11mp-bbrevd-ctrevb
-----------+----------------------------+-----------------------------------
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The RealView EB baseboard revision D is a special case as it appears
to be undocumented in ARM official documents, while the Linux kernel
still contains special code for handling it.
commit be4f3c8691
"Add RealView/EB support for the LAN9118 Ethernet chip"
adds support for the SMSC LAN9118 chip used on the D revision of
the baseboard, but no other traces of hardware deviations for this
variant can be found.
This creates a separate top-level .dts file especially for this
board version, so that it gets registered with the right type
of ethernet controller. The ethernet controller modifications
are then put into a separate .dtsi file so it can be overlaid
on other EB variants using the revision D baseboard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ethernet version in the earlier RealView EB variants is
LAN91C111 and not LAN9118 according to ARM DUI 0303E
"RealView Emulation Baseboard User Guide" page 3-57.
Make sure that this is used for the base variant of the board.
As the DT bindings for LAN91C111 does not specify any power
supplies, these need to be deleted from the DTS file.
Fixes: 2440d29d2a ("ARM: dts: realview: support all the RealView EB board variants")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On arm/arm64, we depend on the kvm_unmap_hva* callbacks (via
mmu_notifiers::invalidate_*) to unmap the stage2 pagetables when
the userspace buffer gets unmapped. However, when the Hypervisor
process exits without explicit unmap of the guest buffers, the only
notifier we get is kvm_arch_flush_shadow_all() (via mmu_notifier::release
) which does nothing on arm. Later this causes us to access pages that
were already released [via exit_mmap() -> unmap_vmas()] when we actually
get to unmap the stage2 pagetable [via kvm_arch_destroy_vm() ->
kvm_free_stage2_pgd()]. This triggers crashes with CONFIG_DEBUG_PAGEALLOC,
which unmaps any free'd pages from the linear map.
[ 757.644120] Unable to handle kernel paging request at virtual address
ffff800661e00000
[ 757.652046] pgd = ffff20000b1a2000
[ 757.655471] [ffff800661e00000] *pgd=00000047fffe3003, *pud=00000047fcd8c003,
*pmd=00000047fcc7c003, *pte=00e8004661e00712
[ 757.666492] Internal error: Oops: 96000147 [#3] PREEMPT SMP
[ 757.672041] Modules linked in:
[ 757.675100] CPU: 7 PID: 3630 Comm: qemu-system-aar Tainted: G D
4.8.0-rc1 #3
[ 757.683240] Hardware name: AppliedMicro X-Gene Mustang Board/X-Gene Mustang Board,
BIOS 3.06.15 Aug 19 2016
[ 757.692938] task: ffff80069cdd3580 task.stack: ffff8006adb7c000
[ 757.698840] PC is at __flush_dcache_area+0x1c/0x40
[ 757.703613] LR is at kvm_flush_dcache_pmd+0x60/0x70
[ 757.708469] pc : [<ffff20000809dbdc>] lr : [<ffff2000080b4a70>] pstate: 20000145
...
[ 758.357249] [<ffff20000809dbdc>] __flush_dcache_area+0x1c/0x40
[ 758.363059] [<ffff2000080b6748>] unmap_stage2_range+0x458/0x5f0
[ 758.368954] [<ffff2000080b708c>] kvm_free_stage2_pgd+0x34/0x60
[ 758.374761] [<ffff2000080b2280>] kvm_arch_destroy_vm+0x20/0x68
[ 758.380570] [<ffff2000080aa330>] kvm_put_kvm+0x210/0x358
[ 758.385860] [<ffff2000080aa524>] kvm_vm_release+0x2c/0x40
[ 758.391239] [<ffff2000082ad234>] __fput+0x114/0x2e8
[ 758.396096] [<ffff2000082ad46c>] ____fput+0xc/0x18
[ 758.400869] [<ffff200008104658>] task_work_run+0x108/0x138
[ 758.406332] [<ffff2000080dc8ec>] do_exit+0x48c/0x10e8
[ 758.411363] [<ffff2000080dd5fc>] do_group_exit+0x6c/0x130
[ 758.416739] [<ffff2000080ed924>] get_signal+0x284/0xa18
[ 758.421943] [<ffff20000808a098>] do_signal+0x158/0x860
[ 758.427060] [<ffff20000808aad4>] do_notify_resume+0x6c/0x88
[ 758.432608] [<ffff200008083624>] work_pending+0x10/0x14
[ 758.437812] Code: 9ac32042 8b010001 d1000443 8a230000 (d50b7e20)
This patch fixes the issue by moving the kvm_free_stage2_pgd() to
kvm_arch_flush_shadow_all().
Cc: <stable@vger.kernel.org> # 3.9+
Tested-by: Itaru Kitayama <itaru.kitayama@riken.jp>
Reported-by: Itaru Kitayama <itaru.kitayama@riken.jp>
Reported-by: James Morse <james.morse@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Add the hva (multi-format video encoder for STMicroelectronics SoC)
dt nodes for the hva device, defining register address, interrupt
and clock.
Signed-off-by: Jean-Christophe TROTIN <jean-christophe.trotin@st.com>
To establish a connection between GPIO controllers and pin multiplexor
controller add gpio-ranges properties to all GPIO controllers found
on iMX50, iMX6Q/D, iMX6DL/S, iMX6SL, iMX6SX, iMX6UL and iMX7D/S
SoCs. The change was done after human parsing of output from
% gawk -n '{ sub(/.*__/, ""); if ($1 ~ "^GPIO") print $1, $2/4}' imxXX-pinfunc.h | sort -n
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is a prerequisite to remove the static mappings for imx35 devicetree
based machines.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is a slightly larger batch of fixes that we've been sitting on a few
-rcs. Most of them are simple oneliners, but there are two sets that are
slightly larger and worth pointing out:
- A set of patches to OMAP to deal with hwmod for RTC on am33xx (beaglebone
SoC, among others). It's the only clock that ever has a valid offset of 0,
so a new flag needed introduction once this problem was discovered.
- A collection of CCI fixes for performance counters discovered once people
started using it on X-Gene CPUs.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"This is a slightly larger batch of fixes that we've been sitting on a
few -rcs. Most of them are simple oneliners, but there are two sets
that are slightly larger and worth pointing out:
- A set of patches to OMAP to deal with hwmod for RTC on am33xx
(beaglebone SoC, among others). It's the only clock that ever has
a valid offset of 0, so a new flag needed introduction once this
problem was discovered.
- A collection of CCI fixes for performance counters discovered once
people started using it on X-Gene CPUs"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
arm-cci: pmu: Fix typo in event name
Revert "ARM: tegra: fix erroneous address in dts"
ARM: dts: imx6qdl: Fix SPDIF regression
ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
ARM: dts: imx7d-sdb: fix ti,x-plate-ohms property name
ARM: dts: kirkwood: Fix PCIe label on OpenRD
ARM: kirkwood: ib62x0: fix size of u-boot environment partition
bus: arm-ccn: make event groups reliable
bus: arm-ccn: fix hrtimer registration
bus: arm-ccn: fix PMU interrupt flags
ARM: tegra: Correct polarity for Tegra114 PMIC interrupt
MAINTAINERS: add tree entry for ARM/UniPhier architecture
ARM: sun5i: Fix typo in trip point temperature
MAINTAINERS: Switch to kernel.org account for Krzysztof Kozlowski
ARM: imx6ul: populates platform device at .init_machine
bus: arm-ccn: Add missing event attribute exclusions for host/guest
bus: arm-ccn: Correct required arguments for XP PMU events
bus: arm-ccn: Fix XP watchpoint settings bitmask
bus: arm-ccn: Do not attempt to configure XPs for cycle counter
bus: arm-ccn: Fix PMU handling of MN
...
The fsl,panel property is deprecated and we should use the new
of_graph dt bindings to describe the relationship between the DCU
controller and the panel.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6ul soc code gained support for cpuidle, but that causes
a link failure if CONFIG_SOC_IMX6SX is disabled:
arch/arm/mach-imx/mach-imx6ul.o: In function `imx6ul_init_late':
mach-imx6ul.c:(.init.text+0xc): undefined reference to `imx6sx_cpuidle_init'
This adds the file containing the imx6sx_cpuidle_init function
to the kernel for 6ul-only configurations.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 547e8f5269 ("ARM: imx: add cpuidle support for i.mx6ul")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
add of_graph dt nodes to describe the panel, and removed
"fsl,panel" property
Signed-off-by: Meng Yi <meng.yi@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The STiH4{07,10} platform contains some interconnect clocks which are used
by various IPs. If this clock isn't handled correctly by ST's EHCI/OHCI
drivers, their hub won't be found, the following error be shown and the
result will be non-working USB:
[ 97.221963] hub 2-1:1.0: hub_ext_port_status failed (err = -110)
Cc: stable@vger.kernel.org
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
- lazy enablement of runtime instrumentation
- up to 255 CPUs for nested guests
- rework of machine check deliver
- cleanups/fixes
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Merge tag 'kvm-s390-next-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD
KVM: s390: features and fixes for 4.9
- lazy enablement of runtime instrumentation
- up to 255 CPUs for nested guests
- rework of machine check deliver
- cleanups/fixes
Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on NXP i.MX53 SoC.
https://inversepath.com/usbarmory
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family.
It has a number of new controllers compared to the A10s and A13 (SPDIF, I2S),
but some controllers missing too (Ethernet, less I2C, less UARTs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As we know handle external aborts pretty early, we can get rid of
its handling in the MMIO code (which was a bit odd to begin with...).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we spot a data abort bearing the ESR_EL2.EA bit set, we know that
this is an external abort, and that should be punished by the injection
of an abort.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Both data and prefetch aborts occuring in HYP lead to a well
deserved panic. Let's get rid of these silly handlers.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we have caught an Abort whilst exiting, we've tagged the
exit code with the pending information. In that case, let's
re-inject the error into the guest, after having adjusted
the PC if required.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Just like for arm64, we can handle asynchronous aborts being
delivered at HYP while being caused by the guest. We use
the exact same method to catch such an abort, and soldier on.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
An asynchronous abort can also be triggered whilst running at EL2.
But instead of making that a new error code, we need to communicate
it to the rest of KVM together with the exit reason.
So let's hijack a single bit that allows the exception code to be
tagged with a "pending Abort" information.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we've exited the guest because it has triggered an asynchronous
abort, a possible course of action is to let it know it screwed up
by giving it a Virtual Abort to chew on.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Now that we're able to context switch the HCR.VA bit, let's
introduce a helper that injects an Abort into a vcpu.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The HCR.VA bit is used to signal an Abort to a guest, and has
the peculiar feature of getting cleared when the guest has taken
the abort (this is the only bit that behaves as such in this register).
This means that if we signal such an abort, we must leave it in
the guest context until it disappears from HCR, and at which point
it must be cleared from the context.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Add the bit of glue and const-ification that is required to use
the code inherited from the arm64 port, and move over to it.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
It would make some sense to share the conditional execution code
between 32 and 64bit. In order to achieve this, let's move that
code to virt/kvm/arm/aarch32.c. While we're at it, drop a
superfluous BUG_ON() that wasn't that useful.
Following patches will migrate the 32bit port to that code base.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When rewriting the assembly code to C code, it was useful to have
exported aliases or static functions so that we could keep the existing
common C code unmodified and at the same time rewrite arm64 from
assembly to C code, and later do the arm part.
Now when both are done, we really don't need this level of indirection
anymore, and it's time to save a few lines and brain cells.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When modifying Stage-2 page tables, we perform cache maintenance to
account for non-coherent page table walks. However, this is unnecessary,
as page table walks are guaranteed to be coherent in the presence of the
virtualization extensions.
Per ARM DDI 0406C.c, section B1.7 ("The Virtualization Extensions"), the
virtualization extensions mandate the multiprocessing extensions.
Per ARM DDI 0406C.c, section B3.10.1 ("General TLB maintenance
requirements"), as described in the sub-section titled "TLB maintenance
operations and the memory order model", this maintenance is not required
in the presence of the multiprocessing extensions.
Hence, we need not perform this cache maintenance when modifying Stage-2
entries.
This patch removes the logic for performing the redundant maintenance.
To ensure visibility and ordering of updates, a dsb(ishst) that was
otherwise implicit in the maintenance is folded into kvm_set_pmd() and
kvm_set_pte().
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This allows to make the board boot even if clock handling
by all drivers is not properly done.
Reported-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
A single patch fixing a typo in the temperature trip points in the A13
DTSI.
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Merge tag 'sunxi-fixes-for-4.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.8
A single patch fixing a typo in the temperature trip points in the A13
DTSI.
* tag 'sunxi-fixes-for-4.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun5i: Fix typo in trip point temperature
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix misspelled "ti,x-plate-ohms" property name of touchscreen
controller for imx7d-sdb DTS.
- Add missing BM_CLPCR_BYPASS_PMIC_READY setting for i.MX6SX to get
suspend/resume work properly.
- Fix SPDIF regression on imx6qdl which caused by a clock update on
spdif device node.
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Merge tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.8, 2nd round:
- Fix misspelled "ti,x-plate-ohms" property name of touchscreen
controller for imx7d-sdb DTS.
- Add missing BM_CLPCR_BYPASS_PMIC_READY setting for i.MX6SX to get
suspend/resume work properly.
- Fix SPDIF regression on imx6qdl which caused by a clock update on
spdif device node.
* tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl: Fix SPDIF regression
ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
ARM: dts: imx7d-sdb: fix ti,x-plate-ohms property name
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit b5c86b7496.
This is no longer needed due to other changes going into 4.8 to rename
the unit addresses on a large number of device nodes. So it was picked up
for v4.8-rc1 in error.
Reported-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
vms and vcpus have statistics associated with them which can be viewed
within the debugfs. Currently it is assumed within the vcpu_stat_get() and
vm_stat_get() functions that all of these statistics are represented as
u32s, however the next patch adds some u64 vcpu statistics.
Change all vcpu statistics to u64 and modify vcpu_stat_get() accordingly.
Since vcpu statistics are per vcpu, they will only be updated by a single
vcpu at a time so this shouldn't present a problem on 32-bit machines
which can't atomically increment 64-bit numbers. However vm statistics
could potentially be updated by multiple vcpus from that vm at a time.
To avoid the overhead of atomics make all vm statistics ulong such that
they are 64-bit on 64-bit systems where they can be atomically incremented
and are 32-bit on 32-bit systems which may not be able to atomically
increment 64-bit numbers. Modify vm_stat_get() to expect ulongs.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Matlack <dmatlack@google.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
The fact that the internal synchrous hash implementation is called
"ghash" like the publicly visible one is causing the testmgr code
to misidentify it as an algorithm that requires testing at boottime.
So rename it to "__ghash" to prevent this.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Since commit 8996eafdcb ("crypto: ahash - ensure statesize is non-zero"),
all ahash drivers are required to implement import()/export(), and must have
a non-zero statesize. Fix this for the ARM Crypto Extensions GHASH
implementation.
Fixes: 8996eafdcb ("crypto: ahash - ensure statesize is non-zero")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The ARMv7 NEON module is explicitly built in ARM mode, which is not
supported by the Thumb2 kernel. So remove the explicit override, and
leave it up to the build environment to decide whether the core SHA1
routines are assembled as ARM or as Thumb2 code.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
follow the new binding.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add support for the tactile switches SW2/3 (on the debug board) as a
virtual keyboard like it was done with the Blanche board).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the QSPI device node.
Add device nodes for Spansion S25FL512S SPI flash and MTD partitions on it.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Removale of skeleton.dtsi allows us also to fix the following
warning from the dts compiler:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
by adding proper unit addresses to the memory nodes. Also add missing
device_type to the memory node while at it.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Removale of skeleton.dtsi allows us also to fix the following
warning from the dts compiler:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
by adding proper unit addresses to the memory nodes.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Remove skeleton.dtsi from the common ARM Cortex-M dtsi. This will allow
us to remove skeleton.dtsi on a per platform basis and get rid of the
unit address warning on the memory nodes without getting duplicate memory
nodes.
See 3ebee5a2e1 ("arm64: dts: kill skeleton.dtsi") for additional
reasons not to use the skeleton.dtsi.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
The L2C-220 (AKA L220) and L2C-310 (AKA PL310) cache controllers feature
a Performance Monitoring Unit (PMU), which can be useful for tuning
and/or debugging. This hardware is always present and the relevant
registers are accessible to non-secure accesses. Thus, no special
firmware interface is necessary.
This patch adds support for the PMU, plugging into the usual perf
infrastructure. The overflow interrupt is not always available (e.g. on
RealView PBX A9 it is not wired up at all), and the hardware counters
saturate, so the driver does not make use of this. Instead, the driver
periodically polls and reset counters as required to avoid losing
events due to saturation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Kim Phillips <kim.phillips@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to ARM AN321 (section 4.12):
"If the vector table is in writable memory such as SRAM, either relocated
by VTOR or a device dependent memory remapping mechanism, then
architecturally a memory barrier instruction is required after the vector
table entry is updated, and if the exception is to be activated
immediately"
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cortex-M7 is a new member of the V7M processor family that adds, among
other things, caches over the features available in Cortex-M4.
This patch adds support for recognising the processor at boot time, and
make use of recently introduced cache functions.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch copies the method used for V7A/R CPUs to specify differing
processor info for different cores.
This patch differentiates Cortex-M3 and Cortex-M4 and leaves a fallback case
for any other V7M processors.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch does the plumbing required to invoke the V7M cache code added
in earlier patches in this series, although there is no users for that
yet.
In order to honour the I/D cache disable config options, this patch changes
the mechanism by which the CCR is set on boot, to be more like V7A/R.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit implements the cache operation for V7M.
It is based on V7 counterpart and differs as follows:
- cache operations are memory mapped
- only Thumb instruction set is supported
- we don't handle user access faults
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 8e43a905 "ARM: 7325/1: fix v7 boot with lockdep enabled"
introduced notrace variant of save_and_disable_irqs to balance notrace
variant of restore_irqs; however V7M case has been missed. It was not
noticed because cache-v7.S the only place where notrace variant is used.
So fix it, since we are going to extend V7 cache routines to handle V7M
case too.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the addition of caches to the V7M Architecture a new Cache Type
Register (CTR) is defined at 0xE000ED7C. This register serves the same
purpose as the V7A/R version and accessed via the read_cpuid_cachetype.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
V7M implements cache operations similarly to V7A/R, however all operations
are performed via memory-mapped IO instead of co-processor operations.
This patch adds register definitions relevant to the V7M ARM architecture's
cache architecture.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently we use raw cp15 operations to access the cache setup data.
This patch abstracts the CSSELR and CCSIDR accessors out to a header so
that the implementation for them can be switched out as we do with other
cpu/cachetype operations.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We're trying hard to detect when the HYP idmap overlaps with the
HYP va, as it makes the teardown of a cpu dangerous. But there is
one case where an overlap is completely safe, which is when the
whole of the kernel is idmap'ed, which is likely to happen on 32bit
when RAM is at 0x8000000 and we're using a 2G/2G VA split.
In that case, we can proceed safely.
Reported-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This patch allows to use second parameter to the gpio
specifier, which is used to specify whether the gpio is
active high or low.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch allows to use second parameter to the gpio
specifier, which is used to specify whether the gpio is
active high or low.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The NanoPi NEO is a minimal H3 based SBC. It comes with 256/512M RAM, a
micro SD slot, 10/100Mbit ethernet and a single USB-A port.
Signed-off-by: James Pettigrew <james@innovum.com.au>
Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Most of the sun8i q8 boards have an SDIO wifi controller, on the
variants which use an USB wifi controller, this will result in a
couple of error msg-s in dmesg when proving the sdio bus and
an used mmc controller.
The best way to deal with wifi on this boards really is to simply
let the kernel auto-detect usb or sdio wifi controllers, so we
will just have to live with the few errors in dmesg.
This has been tested on a23 based q8 tablets with ESP8089, RTL8703AS and
RTL8189FTV wifi controllers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Define the generic R8A7792 part of the QSPI device node.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the QSPI clock in the R8A7792 device tree.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the SDHI0 (connected to the
micro-SD slot) device node along with the necessary voltage regulator.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the CAN0/1 device nodes...
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When removing the non-existing thermal clock I forgot to remove its
parent from the node's "clocks" property -- this led to a wrong PWM
clock's parent clock.
Fixes: 2a29f9d6fe ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the RZ/A1 based development board (RSK).
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Wheat debug board; this chip is compatible
with SMSC LAN9115 for which there's a (device tree aware) driver.
Describe the chip in the Wheat device tree unconditionally (the driver
should fail the probe if the debug board isn't connected); enable DHCP and
NFS root in the command line for the kernel boot...
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7792 SoC based Wheat board.
The Wheat board itself has no serial ports wired up, the USB serial chips
are situated on a separate debug board and one of them is connected to
SCFI0 -- include unconditional support for it, so that the serial console
can work.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.
Note currently the dts is pretty much empty (except for including the
pc-plus dts), I've a local patch which enables the emac actually making
this dts different from the pc-plus one, but that needs the h3 emac
driver to get merged first.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Update the sun8i-h3-orangepi-plus.dts model string to reflect that it
is valid for both the Orange Pi Plus and the Orange Pi Plus 2.
This is also meant to help users realize that it is not valid for
the new Orange Pi Plus 2E, which will get its own dts.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add power supply reference for L3G3200D and the 3-axis Electronic
Compass AK8963.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The i2c address of the three-axis digital gyroscope L3G4200D should be
0x69 according to hardware design.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit 833f2cbf70 ("ARM: dts: imx6: change the core clock of spdif")
changed many more clocks than only the SPDIF core clock as stated in
the commit message.
The MLB clock has been added and this causes SPDIF regression as
reported by Xavi Drudis Ferran and also in this forum post:
https://forum.digikey.com/thread/34240
The MX6Q Reference Manual does not mention that MLB is a clock related
to SPDIF, so change it back to a dummy clock to restore SPDIF
functionality.
Thanks to Ambika for providing the fix at:
https://community.nxp.com/thread/387131
Fixes: 833f2cbf70 ("ARM: dts: imx6: change the core clock of spdif")
Cc: <stable@vger.kernel.org> # 4.4.x
Reported-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
WaRP7 has a BCM43430 Bluetooth chip.
Add support for it.
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
IMX6UL GEA M6UL modules are system on module solutions manufactured
by Engicam with following characteristics:
Processor Freescale i.MX 6UltraLite MCIMX6G2, 528 MHz
RAM 128MB, 16-bit DDR3
NAND SLC 256MB
Power supply Single 5V
MAX LCD RES up to WXGA, 1366x768
and more info at
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable USB OTG port on RK3288 Popmetal board, So we can run
some usb gadget functions like Android adb on this board.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Here are a number of small fixes for staging and IIO drivers that
resolve reported problems.
Full details are in the shortlog. All of these have been in linux-next
with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'staging-4.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging/IIO driver fixes from Greg KH:
"Here are a number of small fixes for staging and IIO drivers that
resolve reported problems.
Full details are in the shortlog. All of these have been in
linux-next with no reported issues"
* tag 'staging-4.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (35 commits)
arm: dts: rockchip: add reset node for the exist saradc SoCs
arm64: dts: rockchip: add reset saradc node for rk3368 SoCs
iio: adc: rockchip_saradc: reset saradc controller before programming it
iio: accel: kxsd9: Fix raw read return
iio: adc: ti_am335x_adc: Increase timeout value waiting for ADC sample
iio: adc: ti_am335x_adc: Protect FIFO1 from concurrent access
include/linux: fix excess fence.h kernel-doc notation
staging: wilc1000: correctly check if associatedsta has not been found
staging: wilc1000: NULL dereference on error
staging: wilc1000: txq_event: Fix coding error
MAINTAINERS: Add file patterns for ion device tree bindings
MAINTAINERS: Update maintainer entry for wilc1000
iio: chemical: atlas-ph-sensor: fix typo in val assignment
iio: fix sched WARNING "do not call blocking ops when !TASK_RUNNING"
staging: comedi: ni_mio_common: fix AO inttrig backwards compatibility
staging: comedi: dt2811: fix a precedence bug
staging: comedi: adv_pci1760: Do not return EINVAL for CMDF_ROUND_DOWN.
staging: comedi: ni_mio_common: fix wrong insn_write handler
staging: comedi: comedi_test: fix timer race conditions
staging: comedi: daqboard2000: bug fix board type matching code
...
vreg_boost is Qualcomm platform specific and is also used in hammerhead
device.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the PM8058 LEDs as used in the platform.
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-leds@vger.kernel.org
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the i2c2 and rmi4 nodes to enable the Synaptics touchscreen found in
the Honami.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
to update mach-omap1 and mach-oamp2 to use IS_ENABLED macro.
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Merge tag 'omap-for-v4.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "omap soc updates for v4.9 merge window" from Tony Lindgren:
Two patches from Javier Martinez Canillas <javier@osg.samsung.com>
to update mach-omap1 and mach-oamp2 to use IS_ENABLED macro.
* tag 'omap-for-v4.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: use IS_ENABLED() instead of checking for built-in or module
ARM: OMAP1: use IS_ENABLED() instead of checking for built-in or module
booting for v4.8 to allow making mach-omap2 device tree only for
v4.9.
We've had Nokia N900 and omap3 LDP board-*.c files remaining
while other omap3 devices have been device tree only for quite
a while now. Also N900 and LDP have had device tree based booting
working for years now, but few drivers for N900 were still only
working in legacy only mode until recently. With the remaining
issues out of the way, we discussed on the mailing lists that
we're finally OK to remove the remaining board-*.c files.
For the timing of this pull request, I wanted to wait until
v4.8-rc1 is out to make sure the legacy booting still works fine
after the merge window before doing it.
And for v4.8, let's not touch any other platform data in case we
still need to revert for some reason. This makes the revert just a
question of adding back the legacy board-*.c files.
Then if no issues, we can remove the unused remaining platform
data later on for v4.9.
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Merge tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "drop last omap3 board files for v4.8" from Tony Lindgren:
Remove the last two legacy board-*.c files for omap3 for legacy
booting for v4.8 to allow making mach-omap2 device tree only for
v4.9.
We've had Nokia N900 and omap3 LDP board-*.c files remaining
while other omap3 devices have been device tree only for quite
a while now. Also N900 and LDP have had device tree based booting
working for years now, but few drivers for N900 were still only
working in legacy only mode until recently. With the remaining
issues out of the way, we discussed on the mailing lists that
we're finally OK to remove the remaining board-*.c files.
For the timing of this pull request, I wanted to wait until
v4.8-rc1 is out to make sure the legacy booting still works fine
after the merge window before doing it.
And for v4.8, let's not touch any other platform data in case we
still need to revert for some reason. This makes the revert just a
question of adding back the legacy board-*.c files.
Then if no issues, we can remove the unused remaining platform
data later on for v4.9.
* tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy board file for LDP
ARM: OMAP2+: Drop legacy board file for n900
1. Fix for DMA on S3C24xx. This was probably broken for long time, nobody runs
this code... till now.
2. After fixes from Matthew Leach and Ben Dooks, most of our mach code
and drivers is now endian-safe. Mark the platform as supporting big endian.
3. Cleanups.
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Merge tag 'samsung-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Merge "Samsung mach/soc update for v4.9" from Krzysztof Kozlowski:
1. Fix for DMA on S3C24xx. This was probably broken for long time, nobody runs
this code... till now.
2. After fixes from Matthew Leach and Ben Dooks, most of our mach code
and drivers is now endian-safe. Mark the platform as supporting big endian.
3. Cleanups.
* tag 'samsung-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Remove unused DMC and CMU offsets and their mappings
ARM: s3c64xx: Delete unnecessary assignment for the field "owner"
ARM: EXYNOS: Enable ARCH_SUPPORTS_BIG_ENDIAN explicitly
ARM: S3C24XX: Add missing DMA device for Mini2440 board
ARM: S3C24XX: Add dma_mask assignments for DMA devices
to use TI AEMIF driver in drivers/memory on DA850.
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Merge tag 'davinci-for-v4.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci soc support updates for v4.9" from Sekhar Nori:
DA850 SoC support update for making it possible
to use TI AEMIF driver in drivers/memory on DA850.
* tag 'davinci-for-v4.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: Add ti-aemif lookup for clock matching
We removed support for board files in clps711x in Linux-4.8, but
I accidentally left the unused files behind. Let's kill them
off for real this time.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
around the Kconfig options and leaves the mach-realview
directory nice and tidy, with all boards migrated over to
Device Tree.
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Merge tag 'realview-broomstick-sweep' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/cleanup
Merge "delete the RealView boardfiles" from Linus Walleij:
This deletes the realview boardfiles, consolidates a bit
around the Kconfig options and leaves the mach-realview
directory nice and tidy, with all boards migrated over to
Device Tree.
* tag 'realview-broomstick-sweep' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: realview: imply device tree boot
ARM: realview: no need to select SMP_ON_UP explicitly
ARM: realview: delete the RealView board files
generic IIO BMP280 driver instead of the BMP085.
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Merge tag 'omap-for-v4.9/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Merge "omap defconfig updates for v4.9 merge window" from Tony Lindgren:
A patch from Linus Walleij <linus.walleij@linaro.org> to switch to use
generic IIO BMP280 driver instead of the BMP085.
* tag 'omap-for-v4.9/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: switch to the IIO BMP085 driver
1. Device dynamic frequency and voltage scalling is now supported
on many Exynos boards, enable it.
2. Enable PM_DEBUG, cleanup old IPV6_PRIVACY.
3. Enable SECCOMP for Systemd on Arch.
4. cpufreq schedutil cannot be module anymore.
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Merge tag 'samsung-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/defconfig
Merge "Samsung defconfig update for v4.9" from Krzysztof Kozlowski:
1. Device dynamic frequency and voltage scalling is now supported
on many Exynos boards, enable it.
2. Enable PM_DEBUG, cleanup old IPV6_PRIVACY.
3. Enable SECCOMP for Systemd on Arch.
4. cpufreq schedutil cannot be module anymore.
* tag 'samsung-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Don't attempt to enable schedutil governor as module
ARM: exynos_defconfig: Don't attempt to enable schedutil governor as module
ARM: multi_v7_defconfig: Enable SECCOMP
ARM: exynos_defconfig: Enable SECCOMP
ARM: s3c2410_defconfig: Remove CONFIG_IPV6_PRIVACY
ARM: exynos_defconfig: Enable PM_DEBUG
ARM: exynos_defconfig: Enable bus frequency scaling with devfreq
savedefconfig and enabling various commonly used
drivers as modules.
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Merge tag 'davinci-for-v4.9/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
Merge "DaVinci defconfig updates for v4.9" from Sekhar Nori:
DaVinci defconfig updates include cleanup using
savedefconfig and enabling various commonly used
drivers as modules.
* tag 'davinci-for-v4.9/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable some UBI modules
ARM: davinci_all_defconfig: Enable AEMIF as a module
ARM: davinci_all_defconfig: enable SMSC ethernet PHY
ARM: davinci_all_defconfig: enable RTC driver as module
ARM: davinci_all_defconfig: enable DA850 audio as modules
ARM: davinci_all_defconfig: cleanup with savedefconfig
The driver is for a trackpad device so is not needed for booting and
makes more sense to have it as module to reduce the kernel image size.
It was probably enabled as built-in because module autoload was not
working when the I2C device was registered by OF but this got fixed
in commit b7d21058b4 ("Input: atmel_mxt_ts - add maxtouch to I2C
table for module autoload") so it's safe to enable as a module now.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Integrators defconfig have changed due to changes in
Kconfig for the CPU types, they use the physmap OF NOR
driver and syscon for LEDs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "mvebu fixes for 4.8 (part 1)" from Gregory CLEMENT:
Few device tree fix on kirkwood:
- enable PCIe on OpenRD
- use correct u-boot environment partition size on ib62x0
* tag 'mvebu-fixes-4.8-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: Fix PCIe label on OpenRD
ARM: kirkwood: ib62x0: fix size of u-boot environment partition
- Remove useless gpio-cells
- Update second parameter by using GPIO_ACTIVE_HIGH/LOW
instead of hardcoded value
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
- Remove useless gpio-cells
- Update second parameter by using GPIO_ACTIVE_HIGH/LOW
instead of hardcoded value
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This patch allows to use second parameter to the gpio
specifier, which is used to specify whether the gpio is
active high or low.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
B2260 board is the STMicroelectronics 96Board
based on STiH410 soc :
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- Sata
- HDMI
- 2 x USB2 type A
- micro USB2 type AB
- SD card slot
- High speed connector (SD/I2C/USB interfaces)
- Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Despite ST AHCI version = 1.3, reading HOST_PORTS_IMPL
returns 0. So force HOST_PORTS_IMPL to 1 by using
ports-implemented DT property.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
On 96board, we can't reuse rgmii1-mdio as the pin pio1 3
( mdint ) is dedicated for user led green 1. So create
rgmii1_mdio_1 for 96board on which only mdio and mdc pins
are useful.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Due to 96board which uses mmc0 node for SD card, the non-removable
property must be moved from STiH407-family to board file for B2120
and B2199 boards.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Add missing pin muxing for I2C2 alternate 2. This
i2c2 pin muxing is dedicated for 96board high speed
expansion connector.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
[Lee: Correct spacing between nodes]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
[Lee: Changed node name and added the unit address]
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
The current implementation only works if the da9xxx devices are added
before their drivers are registered. Only then it can apply the fixes to
both devices. Otherwise, the driver for the first device gets probed
before the fix for the second device can be applied. This is what
fails when using the IP core switcher or when having the i2c master
driver as a module.
So, we need to disable both da9xxx once we detected one of them. We now
use i2c_transfer with hardcoded i2c_messages and device addresses, so we
don't need the da9xxx client devices to be instantiated. Because the
fixup is used on specific boards only, the addresses are not going to
change.
Fixes: 663fbb5215 ("ARM: shmobile: R-Car Gen2: Add da9063/da9210 regulator quirk")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> (r8a7791/koelsch)
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
But these boards don't have a memory node defined, so removing the
skeleton.dtsi inclusion in exynos5440.dtsi will cause a change in
the compiled DTB. Add a dummy memory node so the compiled DTB does
not change if the skeleton.dtsi is removed from exynos5440.dtsi.
Eventually the correct starting addresses and sizes should be used
but I didn't find that information.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
FIMC-IS blocks must control 3 more clocks ("gicisp", "mcuctl_isp" and
"pwm_isp") to make the hardware fully operational.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Introduce the message manager node for the A15 queues on which Linux
runs. The Message Manager is primarily used for communication with
Power Management controller on K2G.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the DSP GPIO controller node on K2G SoC.
This is used to send interrupts to the only DSP processor
subsystem present on the SoC. The IP is identical to that
of the equivalent nodes on existing K2 SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the Keystone IRQ controller IP node on K2G SoC. This allows the
ARM CorePac core to receive interrupts from remote processor devices
(eg: DSP) on the SoC.
The IP is identical in functionality to that of the equivalent
nodes on existing K2 SoCs. The only difference is the ARM INTC
interrupt id/event number.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add the device state controller node as a syscon node to the
K2G SoC. This module provides similar device control functionality
as that on the existing K2 SoCs.
One example usage would be the boot address programming of the
DSP processor sub-system.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The USB OTG mode is not supported by Kestone 2 devices, as result, the
USB devices enumeration and detection will not work properly when
kernel is built with CONFIG_USB_DWC3_DUAL_ROLE=y (default for multi
platform build):
- it's required to load gadget drivers manually to make host mode
work and this confuses current Keystone 2 users
- device mode is not working, because port can't detect and switch to
peripheral/host mode dynamically.
Hence, specify usb mode explicitly in DT: usb0 = "host" for all KS2
devices and usb1 = "peripheral" for K2E.
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Simply enabling CONFIG_KEYSTONE_USB_PHY doesn't work anymore
as it depends on CONFIG_NOP_USB_XCEIV. We need to enable
that as well.
This fixes USB on Keystone boards from v4.8-rc1 onwards.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it shouldn't have
functional changes.
Since no am4372 based board had a memory node defined, a dummy node
is added so the compiled DTB memory node is the same than before.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann
Fabian Frederick
H. Nikolaus Schaller
Linus Torvalds
Jamie Lentin
Vitaly Kuznetsov
Peter Griffin
Tony Lindgren
Nishanth Menon
Mark Rutland
Lars Persson
Paolo Bonzini
Ard Biesheuvel
Rafael J. Wysocki
Dave Airlie
Daniel Thompson
Russell King
Stefan Agner
Mylène Josserand
Chen-Yu Tsai
Maxime Ripard
Linus Walleij
Robert Jarzmik
Markus Elfring
Petr Cvek
Ian Campbell
Suzuki K Poulose
Jean-Christophe Trotin
Vladimir Zapolskiy
Uwe Kleine-König
Meng Yi
Lee Jones
Andrej Rosano
Marc Zyngier
Christoffer Dall
Patrice Chotard
Olof Johansson
Suraj Jitindar Singh
Neil Armstrong
Jyri Sarha
Sergei Shtylyov
Joachim Eastwood
Torgue Alexandre
Jonathan Austin
Vladimir Murzin
James Pettigrew
Hans de Goede
Chris Brandt
Andy Yan
Greg Kroah-Hartman
Martin Kaiser
Fabio Estevam
Vanessa Maegima
Michael Trimarchi
Bhushan Shah
Rajendra Nayak
Bjorn Andersson
Javier Martinez Canillas
Wolfram Sang
Marek Szyprowski
Andrew F. Davis
Grygorii Strashko
Roger Quadros
Milo Kim