Commit Graph

97 Commits

Author SHA1 Message Date
Michael Hennerich 73e1ac1625 spi/bfin_spi: only request GPIO on first load
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested.  So make sure we only request the
pin on the first setup of a SPI device.  Otherwise, if you attempts to
reconfigure a SPI device on the fly (like change bit sizes), the setup
function incorrectly fails.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22 01:26:46 -06:00
Michael Hennerich 782a895693 spi/bfin_spi: handle error/status changes after data interrupts
The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis.  Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.

So in the Blackfin on-chip SPI driver, we need to clear out
these known errors in the data interrupt once we've successfully
finished processing all of the pending data.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22 01:26:46 -06:00
Mike Frysinger 9c0a788b43 spi/bfin_spi: namespace local structs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:44 -04:00
Michael Hennerich 6f7c17f4f9 spi/bfin_spi: init early
Some systems using this bus sometimes have very basic devices on them
such as regulators.  So we need to be loaded even earlier in case the
devices are used by things such as early board init code.  Therefore
register in subsys_initcall().

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:44 -04:00
Bob Liu 2e768659df spi/bfin_spi: check per-transfer bits_per_word
Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:43 -04:00
Barry Song 4190f6a51f spi/bfin_spi: warn when CS is driven by hardware (CPHA=0)
When the hardware is controlling the CS, there are some SPI options
we are unable to support.  So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:43 -04:00
Rob Maris e72dcde72c spi/bfin_spi: cs should be always low when a new transfer begins
Signed-off-by: Rob Maris <maris.rob@vdi.de>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:42 -04:00
Rob Maris e35954053c spi/bfin_spi: fix typo in comment
Signed-off-by: Rob Maris <maris.rob@vdi.de>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:41 -04:00
Mike Frysinger 7715aad4ef spi/bfin_spi: reject unsupported SPI modes
Who knows what people will try!

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:41 -04:00
Barry Song a75bd65b21 spi/bfin_spi: use dma_disable_irq_nosync() in irq handler
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:40 -04:00
Mike Frysinger 5e8592dca3 spi/bfin_spi: combine duplicate SPI_CTL read/write logic
While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:39 -04:00
Mike Frysinger 5b47bcd48b spi/bfin_spi: reset ctl_reg bits when setup is run again on a device
During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly.  When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.

Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:39 -04:00
Mike Frysinger 033f44bd0e spi/bfin_spi: push all size checks into the transfer function
This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:38 -04:00
Yi Li 7370ed6b91 spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handler
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:38 -04:00
Barry Song 9677b0de10 spi/bfin_spi: sync hardware state before reprogramming everything
Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled.  So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:37 -04:00
Barry Song b052fd0a44 spi/bfin_spi: save/restore state when suspending/resuming
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:37 -04:00
Barry Song d3cc71f71a spi/bfin_spi: redo GPIO CS handling
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS.  This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS".  But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.

To make both work, we introduce an offset define.  This represents the
max number of hardware CS values that the SPI peripheral supports.  If
the CS is below this limit, we know we can use the hardware CS.  If it's
above, we treat it as a GPIO CS.  This keeps the CS unique as seen by
the common code and prevents conflicts.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:36 -04:00
Mike Frysinger 90008a641d spi/bfin_spi: use the SPI namespaced bit names
This lets us push the short SPI MMR bit names out of the global namespace.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:35 -04:00
Mike Frysinger 2a045131db spi/bfin_spi: drop extra memory we don't need
The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't.  So drop this useless bit of memory.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:34 -04:00
Mike Frysinger b9f139a7a6 spi/bfin_spi: convert struct names to something more logical
The current structure names are a bit confusing as to what they represent,
so use better names.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:34 -04:00
Mike Frysinger 9c4542c7a3 spi/bfin_spi: convert read/write/duplex funcs to a dedicated ops structure
Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:33 -04:00
Mike Frysinger f4f50c3ff7 spi/bfin_spi: convert queue run state to true/false
No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:32 -04:00
Mike Frysinger ab09e0406f spi/bfin_spi: fix up some unused/misleading comments
Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:32 -04:00
Mike Frysinger 5cc0159a57 spi/bfin_spi: punt useless null read/write funcs
The chip ops should always be initialized, so having null fallback
functions are useless.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:31 -04:00
Mike Frysinger 201bbc6fd8 spi/bfin_spi: drop custom cs_change_per_word support
As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it.  So punt all of the dead code considering it
makes up ~10% of the code size.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:30 -04:00
Barry Song 8221610e99 spi/bfin_spi: fix CS handling
The CS helper functions were toggling both the Flag Enable and the Flag
Value bits, but the Flag Value bit is ignored if the corresponding Flag
Enable bit is cleared.  So under high speed transactions, the CS sometimes
would not toggle properly.

Since it makes no sense to toggle the Flag Enable bit dynamically when we
actually want to control the Flag Value, do this when setting up the device
and then only handle toggling of the CS value during runtime.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:30 -04:00
Yi Li f6a6d96685 spi/bfin_spi: utilize the SPI interrupt in PIO mode
The current behavior in PIO mode is to poll the SPI status registers which
can obviously lead to higher latencies when doing a lot of SPI traffic.
There is a SPI interrupt which can be used instead to signal individual
completion of transactions.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:29 -04:00
Wolfgang Muees bb8beecd98 spi/bfin_spi: force sane master-mode state at boot
We should make sure the SPI controller is in a sane state in case the
boot loader left it in a crappy state.  Such as DMA pending which causes
interrupts to fire on us.

When setting a sane initial state, do not default to slave mode.  If we
do, then the SPI peripheral may implicitly take over the SPISS pin which
other things might be using.

For example, the BF533-STAMP uses this pin as a GPIO to control switching
between ethernet and flash.  If the SPI peripheral controls the output
state instead, the ethernet is no longer accessible.

URL: http://blackfin.uclinux.org/gf/tracker/5630
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:29 -04:00
Sonic Zhang 60d0071b60 spi/bfin_spi: work around anomaly 05000119
Anomaly 05000119 states that the DMA_RUN bit with peripherals isn't
reliable.  However, the way the driver is currently written (DMA IRQ
callback), we don't need the polling in the first place, so drop it.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:28 -04:00
Daniel Mack ac01e97d64 spi/bfin_spi: fix resources leakage
Re-order setup() a bit so we don't leak memory/dma/gpio resources upon
errors.  Also make sure we don't call kfree() twice on the same object.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:28 -04:00
Tejun Heo 5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
hartleys 74947b8982 spi: spi_bfin5xx.c: use resource_size()
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-12-17 08:59:50 -07:00
David Brownell e7db06b5d5 spi: move more spi_setup() functionality into core
Move some common spi_setup() error checks into the SPI framework from the
spi_master controller drivers:

 - Add a new "mode_bits" field to spi_master

 - Use that in spi_setup to validate the spi->mode value being
   requested.  Setting this new field is now mandatory for any
   controller supporting more than vanilla SPI_MODE_0.

 - Update all spi_master drivers to:

     * Initialize that field
     * Remove current spi_setup() checks using that value.

This is a net minor code shrink.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-06-18 13:03:42 -07:00
David Brownell 7d0771970c spi: move common spi_setup() functionality into core
Start moving some spi_setup() functionality into the SPI core from the
various spi_master controller drivers:

 - Make that function stop being an inline;

 - Move two common idioms from drivers into that new function:
    * Default bits_per_word to 8 if that field isn't set
    * Issue a standardized dev_dbg() message

This is a net minor source code shrink, and supports enhancments found in
some follow-up patches.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-06-18 13:03:42 -07:00
Roel Kluin b4bd2ababd spi_bfin5xx: limit reaches -1
bfin_spi_flush() returns limit, which reaches -1 upon timeout.  but in
function bfin_spi_pump_transfers() it is compared with 0.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-06-18 13:03:41 -07:00
Jie Zhang 67834fa93d Blackfin: rename bfin_addr_dcachable to bfin_addr_dcacheable
The latter naming convention is much more common.

Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-13 07:20:06 -04:00
Mike Rapoport 75c8915c0c spi_bfin5xx: remove unused IS_DMA_ALIGNED macro
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Cc: Bryan Wu <bryan.wu@analog.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:07 -07:00
Wolfgang Muees 93b61bddc1 Blackfin SPI Driver: Make mmc_spi driver work on Blackfin
1. Rewrite of the non-dma data transfer functions to use only ONE mode
   of TIMOD (TIMOD=0x1).  With TIMOD=0, it was not possible to set the TX
   bit pattern.  So the TDBR = 0xFFFF inside the read calls won't work.

2. Clear SPI_RDBR before reading and before duplex transfer.
   Otherwise the garbage data in RDBR will get read.  Since mmc_spi uses a
   lot of duplex transfers, this is the main cause of mmc_spi failure.

3. Poll RXS for transfer completion.  Polling SPIF or TXS cannot
   guarantee transfer completion.  This may interrupt a transfer before it
   is finished.  Also this may leave garbage data in buffer and affect
   next transfer.

[Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct
bfin5xx_spi_chip" to specify the value to transmit if no TX value
is supplied.]
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Michael Hennerich 42c78b2bf5 Blackfin SPI Driver: Add GPIO controlled SPI Slave Select support
Add support for GPIO controlled SPI Chip Selects.  To make use of this
feature, set chip_select = 0 and add a proper cs_gpio to your
controller_data.

struct spi_board_info
        .chip_select = 0

struct bfin5xx_spi_chip
        .cs_gpio = GPIO_P###

There are various SPI devices that require SPI MODE_0, and need to have
the Chip Selects asserted during the entire transfer.  Consider using
SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Mike Frysinger e7d02e3c95 Blackfin SPI Driver: fix NULL pointer crash
Fix NULL pointer crash when cleaning up from invalid platform resources

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Mike Frysinger 138f97cd06 Blackfin SPI Driver: use bfin_spi_ prefix on all functions
Do this because when things crash, we get simple names like "setup" and
"start_queue" which is pretty difficult to trace back to the real thing:
the spi driver

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Yi Li b9b2a76a43 Blackfin SPI Driver: fix bug - correct usage of struct spi_transfer.cs_change
According to comments in linux/spi/spi.h:

 * All SPI transfers start with the relevant chipselect active.  Normally
 * it stays selected until after the last transfer in a message. Drivers
 * can affect the chipselect signal using cs_change.
 *
 * (i) If the transfer isn't the last one in the message, this flag is
 * used to make the chipselect briefly go inactive in the middle of the
 * message.  Toggling chipselect in this way may be needed to terminate
 * a chip command, letting a single spi_message perform all of group of
 * chip transactions together.
 *
 * (ii) When the transfer is the last one in the message, the chip may
 * stay selected until the next transfer.  On multi-device SPI busses
 * with nothing blocking messages going to other devices, this is just
 * a performance hint; starting a message to another device deselects
 * this one.  But in other cases, this can be used to ensure correctness.
 * Some devices need protocol transactions to be built from a series of
 * spi_message submissions, where the content of one message is determined
 * by the results of previous messages and where the whole transaction
 * ends when the chipselect goes intactive.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Yi Li 2cf3683472 Blackfin SPI Driver: fix bug - spi controller driver does not assert/deassert CS correctly
This bug can be observed when two SPI devices are sharing the spi bus: One
device is set as SPI CS 7, another one is using SPI CS 4.

In spi_bfin5xx.c: cs_active(), cs_deactive() are used to control SPI_FLG
register.  From the debug bellow:

cs_active: flag: 0x7f91, chip->flag: 0x7f80, cs: 7
cs_active: flag: 0xef91, chip->flag: 0xef10, cs: 4

When device A (cs_7) activate CS 7, SPI_FLG is set as 0x7f91 (however,
SPI_FLG should be set as 0x7f80, or 0x6f91 if in broadcast mode).

Due to some HW bug (very possibly), if SPI_FLG is set as 0x7f91, SPISSEL7
is asserted, however SPISSEL4 will be asserted too (I can see this using
the scope).  This is unreasonable according to HRM.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Mike Frysinger a963ea83b3 Blackfin SPI Driver: tweak magic spi dma sequence to get it working on BF54x
Without this change, SPI DMA is not reliably under stress tests.
Obiviously it's a hardware issue which is not addressed by any document.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Mike Frysinger aaaf939c57 Blackfin SPI Driver: add timeout while waiting for SPIF in dma irq handler
The "while" endless loop will cause the system hang if hardware error, so
we add timeout control to make the system alive.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00
Mike Frysinger 11d6f59951 Blackfin SPI Driver: get dma working for SPI flashes
When using a BF533-STAMP here with a W25X10 SPI flash.  It works fine when
enable_dma is disabled, but doesn't work at all when turning DMA on.  We
get just 0xff bytes back when trying to read the device.

Change the code around so that it programs the SPI first and then enables
DMA, it seems to work a lot better ...

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00
Mike Frysinger 4160bde2d8 Blackfin SPI Driver: SPI slave select code cleanup
- remove duplicated definition MAX_SPI_SSEL

- remove unnecessary array size

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00
Mike Frysinger b31e27a6dc Blackfin SPI Driver: use the properl BIT_CTL_xxx defines
use the properl BIT_CTL_...  defines rather than the internal driv er
CFG_SPI_...  defines

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00
Mike Frysinger 40a2945b97 Blackfin SPI Driver: do not check for SPI errors if DMA itself did not flag any
We only need to check SPI error when DMA failes, cause that is the DMA IRQ
handling routine.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00
Mike Frysinger d24bd1d0dc Blackfin SPI Driver: add a few more DMA debug messages
Because of DMA hardware issue, we were trying to use software workaround.
This patch add some useful debug messages to help us debugging the DMA
code.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:05 -07:00