Commit Graph

462 Commits

Author SHA1 Message Date
Alexander Shiyan ba60ae1dc0 pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-07-06 17:38:17 +02:00
Ivaylo Dimitrov a74a198249 pwm: omap-dmtimer: Allow for setting dmtimer clock source
OMAP GP timers can have different input clocks that allow different PWM
frequencies. However, there is no other way of setting the clock source but
through clocks or clock-names properties of the timer itself. This limits
PWM functionality to only the frequencies allowed by the particular clock
source. Allowing setting the clock source by PWM rather than by timer
allows different PWMs to have different ranges by not hard-wiring the clock
source to the timer.

Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-06-29 21:54:00 -07:00
Boris Brezillon cc51846ba8 pwm: atmel-hlcdc: Fix default PWM polarity
The PWM device exposed by the HLCDC IP is configured with an inverted
polarity by default. Registering the PWM chip with the normal polarity
was not a problem before commit 42e8992c58d4 ("pwm: Add core
infrastructure to allow atomic updates") because the ->set_polarity()
hook was called no matter the current polarity state, but this is no longer
the case.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-06-14 10:51:45 +02:00
Lee Jones 1a366fe915 pwm: sysfs: Add PWM capture support
Allow a user to read PWM capture results from sysfs. To start a capture
and read the result, simply read the file:

  $ cat $PWMCHIP/capture

The output format is "<period> <duty cycle>".

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-06-10 16:01:40 +02:00
Lee Jones 3a3d1a4e32 pwm: Add PWM capture support
Supply a PWM capture callback op in order to pass back information
obtained by running analysis on a PWM signal. This would normally (at
least during testing) be called from the sysfs routines with a view to
printing out PWM capture data which has been encoded into a string.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[thierry.reding@gmail.com: make capture data unsigned int for symmetry]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-06-10 16:01:35 +02:00
Ryo Kodama fe5aa34d6e pwm: sysfs: Get return value from pwm_apply_state()
This patch adds to check the return value from pwm_apply_state()
used in enable_store(). The error of enable_store() doesn't work
if the return value doesn't received.

Signed-off-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Fixes: 39100ceea7 ("pwm: Switch to the atomic API")
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-06-10 14:24:40 +02:00
Brian Norris ef2bf4997f pwm: Improve args checking in pwm_apply_state()
It seems like in the process of refactoring pwm_config() to utilize the
newly-introduced pwm_apply_state() API, some args/bounds checking was
dropped.

In particular, I noted that we are now allowing invalid period
selections, e.g.:

  # echo 1 > /sys/class/pwm/pwmchip0/export
  # cat /sys/class/pwm/pwmchip0/pwm1/period
  100
  # echo 101 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle
  [... driver may or may not reject the value, or trigger some logic bug ...]

It's better to see:

  # echo 1 > /sys/class/pwm/pwmchip0/export
  # cat /sys/class/pwm/pwmchip0/pwm1/period
  100
  # echo 101 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle
  -bash: echo: write error: Invalid argument

This patch reintroduces some bounds checks in both pwm_config() (for its
signed parameters; we don't want to convert negative values into large
unsigned values) and in pwm_apply_state() (which fix the above described
behavior, as well as other potential API misuses).

Fixes: 5ec803edcb ("pwm: Add core infrastructure to allow atomic updates")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-06-10 14:21:00 +02:00
Linus Torvalds ecc5fbd5ef pwm: Changes for v4.7-rc1
This set of changes introduces an atomic API to the PWM subsystem. This
 is influenced by the DRM atomic API that was introduced a while back,
 though it is obviously a lot simpler. The fundamental idea remains the
 same, though: drivers provide a single callback to implement the atomic
 configuration of a PWM channel.
 
 As a side-effect the PWM subsystem gains the ability for initial state
 retrieval, so that the logical state mirrors that of the hardware. Many
 use-cases don't care about this, but for others it is essential.
 
 These new features require changes in all users, which these patches
 take care of. The core is transitioned to use the atomic callback if
 available and provides a fallback mechanism for other drivers.
 
 Changes to transition users and drivers to the atomic API are postponed
 to v4.8.
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Merge tag 'pwm/for-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This set of changes introduces an atomic API to the PWM subsystem.
  This is influenced by the DRM atomic API that was introduced a while
  back, though it is obviously a lot simpler.  The fundamental idea
  remains the same, though: drivers provide a single callback to
  implement the atomic configuration of a PWM channel.

  As a side-effect the PWM subsystem gains the ability for initial state
  retrieval, so that the logical state mirrors that of the hardware.
  Many use-cases don't care about this, but for others it is essential.

  These new features require changes in all users, which these patches
  take care of.  The core is transitioned to use the atomic callback if
  available and provides a fallback mechanism for other drivers.

  Changes to transition users and drivers to the atomic API are
  postponed to v4.8"

* tag 'pwm/for-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (30 commits)
  pwm: Add information about polarity, duty cycle and period to debugfs
  pwm: Switch to the atomic API
  pwm: Update documentation
  pwm: Add core infrastructure to allow atomic updates
  pwm: Add hardware readout infrastructure
  pwm: Move the enabled/disabled info into pwm_state
  pwm: Introduce the pwm_state concept
  pwm: Keep PWM state in sync with hardware state
  ARM: Explicitly apply PWM config extracted from pwm_args
  drm: i915: Explicitly apply PWM config extracted from pwm_args
  input: misc: pwm-beeper: Explicitly apply PWM config extracted from pwm_args
  input: misc: max8997: Explicitly apply PWM config extracted from pwm_args
  backlight: lm3630a: explicitly apply PWM config extracted from pwm_args
  backlight: lp855x: Explicitly apply PWM config extracted from pwm_args
  backlight: lp8788: Explicitly apply PWM config extracted from pwm_args
  backlight: pwm_bl: Use pwm_get_args() where appropriate
  fbdev: ssd1307fb: Use pwm_get_args() where appropriate
  regulator: pwm: Use pwm_get_args() where appropriate
  leds: pwm: Use pwm_get_args() where appropriate
  input: misc: max77693: Use pwm_get_args() where appropriate
  ...
2016-05-25 10:40:15 -07:00
Thierry Reding 18c588786c Merge branch 'for-4.7/pwm-atomic' into for-next 2016-05-17 14:57:58 +02:00
Thierry Reding bf5dd9abcb Merge branch 'for-4.7/pwm-args' into for-next 2016-05-17 14:57:47 +02:00
Heiko Stübner 23e3523f5d pwm: Add information about polarity, duty cycle and period to debugfs
The PWM states make it possible to also output the polarity, duty cycle
and period information in the debugfs summary output. This simplifies
gathering information about PWMs without needing to walk through the
sysfs attributes of every PWM.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[thierry.reding@gmail.com: use more spaces in debugfs output]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:05 +02:00
Boris Brezillon 39100ceea7 pwm: Switch to the atomic API
Replace legacy pwm_get/set_xxx() and pwm_config/enable/disable() calls
by pwm_get/apply_state().

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:04 +02:00
Boris Brezillon 5ec803edcb pwm: Add core infrastructure to allow atomic updates
Add an ->apply() method to the pwm_ops struct to allow PWM drivers to
implement atomic updates. This method is preferred over the ->enable(),
->disable() and ->config() methods if available.

Add the pwm_apply_state() function to the PWM user API.

Note that the pwm_apply_state() does not guarantee the atomicity of the
update operation, it all depends on the availability and implementation
of the ->apply() method.

pwm_enable/disable/set_polarity/config() are now implemented as wrappers
around the pwm_apply_state() function.

pwm_adjust_config() is allowing smooth handover between the bootloader
and the kernel. This function tries to adapt the current PWM state to
the PWM arguments coming from a PWM lookup table or a DT definition
without changing the duty_cycle/period proportion.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[thierry.reding@gmail.com: fix a couple of typos]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:03 +02:00
Boris Brezillon 15fa8a43c1 pwm: Add hardware readout infrastructure
Add a ->get_state() function to the pwm_ops struct to let PWM drivers
initialize the PWM state attached to a PWM device.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:03 +02:00
Boris Brezillon 09a7e4a3d9 pwm: Move the enabled/disabled info into pwm_state
Prepare the transition to PWM atomic update by moving the enabled and
disabled state into the pwm_state struct. This way we can easily update
the whole PWM state by copying the new state in the ->state field.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:02 +02:00
Boris Brezillon 43a276b003 pwm: Introduce the pwm_state concept
The PWM state, represented by its period, duty_cycle and polarity is
currently directly stored in the PWM device. Declare a pwm_state
structure embedding those field so that we can later use this struct
to atomically update all the PWM parameters at once.

All pwm_get_xxx() helpers are now implemented as wrappers around
pwm_get_state().

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:48:02 +02:00
Boris Brezillon a8c3862551 pwm: Keep PWM state in sync with hardware state
Before the introduction of pwm_args, the core was resetting the PWM
period and polarity states to the reference values (those provided
through the DT, a PWM lookup table or hardcoded in the driver).

Now that all PWM users are correctly using pwm_args to configure their
PWM device, we can safely remove the pwm_apply_args() call in pwm_get()
and of_pwm_get().

We can also get rid of the pwm_set_period() call in pwm_apply_args(),
because PWM users are now directly using pargs->period instead of
pwm_get_period(). By doing that we avoid messing with the current PWM
period.

The only remaining bit in pwm_apply_args() is the initial polarity
setting, and it should go away when all PWM users have been patched to
use the atomic API (with this API the polarity will be set along with
other PWM arguments when configuring the PWM).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:47:30 +02:00
Boris Brezillon 4b58896f72 pwm: Use pwm_get/set_xxx() helpers where appropriate
Use pwm_get/set_xxx() helpers instead of directly accessing the pwm->xxx
field. Doing that will ease adaptation of the PWM framework to support
atomic update.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:44:59 +02:00
Boris BREZILLON 459a25afe9 pwm: Get rid of pwm->lock
PWM devices are not protected against concurrent accesses. The lock in
struct pwm_device might let PWM users think it is, but it's actually
only protecting the enabled state.

Removing this lock should be fine as long as all PWM users are aware
that accesses to the PWM device have to be serialized, which seems to be
the case for all of them except the sysfs interface. Patch the sysfs
code by adding a lock to the pwm_export struct and making sure it's
taken for all relevant accesses to the exported PWM device.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:44:59 +02:00
Boris BREZILLON 3587c26090 pwm: rcar: Make use of pwm_is_enabled()
Commit 5c31252c4a ("pwm: Add the pwm_is_enabled() helper") introduced
a new function to test whether a PWM device is enabled or not without
manipulating PWM internal fields.

Hiding this is necessary if we want to smoothly move to the atomic PWM
config approach without impacting PWM drivers. Fix this driver to use
pwm_is_enabled() instead of directly accessing the ->flags field.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:44:57 +02:00
Boris Brezillon fbd45a1298 pwm: Fix pwm_apply_args() call sites
pwm_apply_args() is supposed to initialize a PWM device according to the
arguments provided by the DT or the PWM lookup, but this function was
called inside pwm_device_request(), which in turn was called before the
core had a chance to initialize the pwm->args fields.

Fix that by calling pwm_apply_args directly in pwm_get() and of_pwm_get()
after initializing pwm->args field.

This commit also fixes an invalid pointer dereference introduced by
commit e39c0df1be ("pwm: Introduce the pwm_args concept").

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: e39c0df1be ("pwm: Introduce the pwm_args concept")
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-17 14:41:18 +02:00
Mark Brown 39d652e066 Merge remote-tracking branches 'regulator/topic/pwm', 'regulator/topic/qcom-spmi', 'regulator/topic/rk808' and 'regulator/topic/s2mps11' into regulator-next 2016-05-13 14:23:46 +01:00
Thierry Reding 2907f8abb7 pwm: Use kcalloc() instead of kzalloc()
kcalloc() should be preferred for allocations of arrays over kzalloc()
with multiplication.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-03 13:57:05 +02:00
Thierry Reding 83a98864ff pwm: Add missing newline
checkpatch requires that declarations be separated from code by a blank
line. Add one for readability and to silence the warning.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-03 13:57:03 +02:00
Boris Brezillon e39c0df1be pwm: Introduce the pwm_args concept
Currently the PWM core mixes the current PWM state with the per-platform
reference config (specified through the PWM lookup table, DT definition
or directly hardcoded in PWM drivers).

Create a struct pwm_args to store this reference configuration, so that
PWM users can differentiate between the current and reference
configurations.

Patch all places where pwm->args should be initialized. We keep the
pwm_set_polarity/period() calls until all PWM users are patched to use
pwm_args instead of pwm_get_period/polarity().

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[thierry.reding@gmail.com: reword kerneldoc comments]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-05-03 13:44:37 +02:00
Stefan Agner ad06fdeeef pwm: fsl-ftm: Use flat regmap cache
Use flat regmap cache to avoid lockdep warning at probe:

[    0.697285] WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:2755 lockdep_trace_alloc+0x15c/0x160()
[    0.697449] DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags))

The RB-tree regmap cache needs to allocate new space on first writes.
However, allocations in an atomic context (e.g. when a spinlock is held)
are not allowed. The function regmap_write calls map->lock, which
acquires a spinlock in the fast_io case. Since the pwm-fsl-ftm driver
uses MMIO, the regmap bus of type regmap_mmio is being used which has
fast_io set to true.

The MMIO space of the pwm-fsl-ftm driver is reasonable condense, hence
using the much faster flat regmap cache is anyway the better choice.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-04-14 16:54:00 +02:00
David Rivshin 922201d129 pwm: omap-dmtimer: Add debug message for effective period and duty cycle
After going through the math and constraints checking to compute load
and match values, it is helpful to know what the resultant period and
duty cycle are.

Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:48 +01:00
David Rivshin 7b0883f338 pwm: omap-dmtimer: Round load and match values rather than truncate
When converting period and duty_cycle from nanoseconds to fclk cycles,
the error introduced by the integer division can be appreciable, especially
in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so
that the error is kept to +/- 0.5 clock cycles.

Fixes: 6604c6556d ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:47 +01:00
David Rivshin cd37888142 pwm: omap-dmtimer: Add sanity checking for load and match values
Add sanity checking to ensure that we do not program load or match values
that are out of range if a user requests period or duty_cycle values which
are not achievable. The match value cannot be less than the load value (but
can be equal), and neither can be 0xffffffff. This means that there must be
at least one fclk cycle between load and match, and another between match
and overflow.

Fixes: 6604c6556d ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[thierry.reding@gmail.com: minor coding style cleanups]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:46 +01:00
David Rivshin f8caa79226 pwm: omap-dmtimer: Fix inaccurate period and duty cycle calculations
Fix the calculation of load_value and match_value. Currently they
are slightly too low, which produces a noticeably wrong PWM rate with
sufficiently short periods (i.e. when 1/period approaches clk_rate/2).

Example:
 clk_rate=32768Hz, period=122070ns, duty_cycle=61035ns (8192Hz/50% PWM)
 Correct values: load = 0xfffffffc, match = 0xfffffffd
 Current values: load = 0xfffffffa, match = 0xfffffffc
 effective PWM: period=183105ns, duty_cycle=91553ns (5461Hz/50% PWM)

Fixes: 6604c6556d ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:45 +01:00
Vladimir Zapolskiy c5857e3f94 pwm: brcmstb: Fix check of devm_ioremap_resource() return code
The change fixes potential oops while accessing iomem on invalid address
if devm_ioremap_resource() fails due to some reason.

The devm_ioremap_resource() function returns ERR_PTR() and never returns
NULL, which makes useless a following check for NULL.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Fixes: 3a9f595702 ("pwm: Add Broadcom BCM7038 PWM controller support")
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:45 +01:00
Simon Horman 03d99531ae pwm: rcar: Depend on ARCH_RENESAS instead of ARCH_SHMOBILE
This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a
more appropriate name than SHMOBILE for the majority of Renesas ARM
based SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:44 +01:00
Wolfram Sang 0e47b5981a pwm: lpc18xx-sct: Test clock rate to avoid division by 0
The clk API may return 0 on clk_get_rate(), so we should check the
result before using it as a divisor.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:29 +01:00
Wolfram Sang bea307c16a pwm: img: Test clock rate to avoid division by 0
The clk API may return 0 on clk_get_rate(), so we should check the
result before using it as a divisor.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-03-23 17:11:02 +01:00
Thierry Reding ff01c944cf pwm: Mark all devices as "might sleep"
Commit d1cd214277 ("pwm: Set enable state properly on failed call to
enable") introduced a mutex that is needed to protect internal state of
PWM devices. Since that mutex is acquired in pwm_set_polarity() and in
pwm_enable() and might potentially block, all PWM devices effectively
become "might sleep".

It's rather pointless to keep the .can_sleep field around, but given
that there are external users let's postpone the removal for the next
release cycle.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-01-21 15:04:59 +01:00
Dan Carpenter 074726402b pwm: omap-dmtimer: Potential NULL dereference on error
"omap" is NULL so we can't dereference it.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-01-04 08:58:33 +01:00
Vegard Nossum 36d5be4bc9 pwm: add HAS_IOMEM dependency to PWM_FSL_FTM
Ran into this on UML:

drivers/built-in.o: In function `fsl_pwm_probe':
linux/drivers/pwm/pwm-fsl-ftm.c:436: undefined reference to `devm_ioremap_resource'
collect2: error: ld returned 1 exit status

devm_ioremap_resource() is defined only when HAS_IOMEM is selected.

Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com>
Cc: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Alison Wang <b18965@freescale.com>
Cc: Jingchang Lu <b35083@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Yuan Yao <yao.yuan@freescale.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-01-04 08:55:03 +01:00
Neil Armstrong 6604c6556d pwm: Add PWM driver for OMAP using dual-mode timers
Adds support for using a OMAP dual-mode timer with PWM capability
as a Linux PWM device. The driver controls the timer by using the
dmtimer API.

Add a platform_data structure for each pwm-omap-dmtimer nodes containing
the dmtimers functions in order to get driver not rely on platform
specific functions.

Cc: Grant Erickson <marathon96@gmail.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Joachim Eastwood <manabian@gmail.com>
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[thierry.reding@gmail.com: coding style bikeshed, fix timer leak]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:25:37 +01:00
Ryo Kodama 72c16a9f98 pwm: rcar: Improve accuracy of frequency division setting
From: Ryo Kodama <ryo.kodama.vz@renesas.com>

When period_ns is set to the same value of RCAR_PWM_MAX_CYCLE in
rcar_pwm_get_clock_division(), this function should allow such value
for improving accuracy of frequency division setting.

Signed-off-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:02:14 +01:00
Vladimir Zapolskiy d6dbdf0dde pwm: lpc32xx: return ERANGE, if requested period is not supported
Instead of silent acceptance of unsupported requested configuration
for PWM period and setting the boundary supported value, return
-ERANGE to a caller.

Duty period value equal to 0 or period is still accepted to allow
configuration by PWM sysfs interface, when it is set to 0 by default.

For reference this is a list of restrictions on period_ns == 1/freq:

  | PWM parent clock | parent clock divisor | max freq | min freq |
  +------------------+----------------------+----------+----------+
  |   HCLK == 13 MHz |      1 (min)         | 50.7 KHz | 198.3 Hz |
  |   HCLK == 13 MHz |     15 (max)         | 3.38 KHz | 13.22 Hz |
  |  RTC == 32.7 KHz |      1 (min)         |   128 Hz |   0.5 Hz |
  |  RTC == 32.7 KHz |     15 (max)         | 8.533 Hz | 0.033 Hz |

Note that PWM sysfs interface does not support setting of period more
than NSEC_PER_SEC / MAX_INT32 ~ 2 seconds, however this PWM controller
supports a period up to 30 seconds.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:01:06 +01:00
Vladimir Zapolskiy 5a9fc9c666 pwm: lpc32xx: fix and simplify duty cycle and period calculations
The change fixes a problem, if duty_ns is too small in comparison
to period_ns (as a valid corner case duty_ns is 0 ns), then due to
PWM_DUTY() macro applied on a value the result is overflowed over 8
bits, and instead of the highest bitfield duty cycle value 0xff the
invalid duty cycle bitfield value 0x00 is written.

For reference the LPC32xx spec defines PWMx_DUTY bitfield description
is this way and it seems to be correct:

 [Low]/[High] = [PWM_DUTY]/[256-PWM_DUTY], where 0 < PWM_DUTY <= 255.

In addition according to my oscilloscope measurements LPC32xx PWM is
"tristate" in sense that it produces a wave with floating min/max
voltage levels for different duty cycle values, for corner cases:

  PWM_DUTY == 0x01 => signal is in range from -1.05v to 0v
  ....
  PWM_DUTY == 0x80 => signal is in range from -0.75v to +0.75v
  ....
  PWM_DUTY == 0xff => signal is in range from 0v to +1.05v

  PWM_DUTY == 0x00 => signal is around 0v, PWM is off

Due to this peculiarity on very long period ranges (less than 1KHz)
and odd pre-divider values PWM generated wave does not remind a
clock shape signal, but rather a heartbit shape signal with positive
and negative peaks, so I would recommend to use high-speed HCLK clock
as a PWM parent clock and avoid using RTC clock as a parent.

The change corrects PWM output in corner cases and prevents any
possible overflows in calculation of values for PWM_DUTY and
PWM_RELOADV bitfields, thus helper macro definitions may be removed.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:00:49 +01:00
Vladimir Zapolskiy 82aff048dd pwm: lpc32xx: make device usable with common clock framework
As a preparatory change for switching LPC32xx mach support to common
clock framework fix clk_enable/clk_disable calls without matching
clk_prepare/clk_unprepare.

The driver can not be used on a platform with common clock framework
until clk_prepare/clk_unprepare calls are added, otherwise clk_enable
calls will fail and a WARN is generated:

    # echo 1 > /sys/bus/platform/drivers/lpc32xx-pwm/4005c000.pwm/pwm/pwmchip0/pwm0/enable
    ------------[ cut here ]------------
    WARNING: CPU: 0 PID: 701 at drivers/clk/clk.c:727 clk_core_enable+0x2c/0xa4()
    Modules linked in: sc16is7xx
    CPU: 0 PID: 701 Comm: sh Tainted: G        W       4.3.0-rc2+ #171
    Hardware name: LPC32XX SoC (Flattened Device Tree)
    Backtrace:
    [<>] (dump_backtrace) from [<>] (show_stack+0x18/0x1c)
    [<>] (show_stack) from [<>] (dump_stack+0x20/0x28)
    [<>] (dump_stack) from [<>] (warn_slowpath_common+0x90/0xb8)
    [<>] (warn_slowpath_common) from [<>] (warn_slowpath_null+0x24/0x2c)
    [<>] (warn_slowpath_null) from [<>] (clk_core_enable+0x2c/0xa4)
    [<>] (clk_core_enable) from [<>] (clk_enable+0x24/0x38)
    [<>] (clk_enable) from [<>] (lpc32xx_pwm_enable+0x1c/0x40)
    [<>] (lpc32xx_pwm_enable) from [<>] (pwm_enable+0x48/0x5c)
    [<>] (pwm_enable) from [<>] (pwm_enable_store+0x5c/0x78)
    [<>] (pwm_enable_store) from [<>] (dev_attr_store+0x20/0x2c)
    [<>] (dev_attr_store) from [<>] (sysfs_kf_write+0x44/0x50)
    [<>] (sysfs_kf_write) from [<>] (kernfs_fop_write+0x134/0x194)
    [<>] (kernfs_fop_write) from [<>] (__vfs_write+0x34/0xdc)
    [<>] (__vfs_write) from [<>] (vfs_write+0xb8/0x140)
    [<>] (vfs_write) from [<>] (SyS_write+0x50/0x90)
    [<>] (SyS_write) from [<>] (ret_fast_syscall+0x0/0x38)

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:00:33 +01:00
Vladimir Zapolskiy ebe1fca350 pwm: lpc32xx: correct number of PWM channels from 2 to 1
LPC32xx SoC has two independent PWM controllers, they have different
clock parents, clock gates and even slightly different controls, and
each of these two PWM controllers has one output channel. Due to
almost similar controls arranged in a row it is incorrectly set that
there is one PWM controller with two channels, fix this problem, which
at the moment prevents separate configuration of different clock
parents and gates for both PWM controllers.

The change makes previous PWM device node description incompatible
with this update.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 17:00:01 +01:00
Stefan Agner 816aec2325 pwm: fsl-ftm: Fix clock enable/disable when using PM
A FTM PWM instance enables/disables three clocks: The bus clock, the
counter clock and the PWM clock. The bus clock gets enabled on
pwm_request, whereas the counter and PWM clocks will be enabled upon
pwm_enable.

The driver has three closesly related issues when enabling/disabling
clocks during suspend/resume:
- The three clocks are not treated differently in regards to the
  individual PWM state enabled/requested. This can lead to clocks
  getting disabled which have not been enabled in the first place
  (a PWM channel which only has been requested going through
  suspend/resume).

- When entering suspend, the current behavior relies on the
  FTM_OUTMASK register: If a PWM output is unmasked, the driver
  assumes the clocks are enabled. However, some PWM instances
  have only 2 channels connected (e.g. Vybrid's FTM1). In that case,
  the FTM_OUTMASK reads 0x3 if all channels are disabled, even if
  the code wrote 0xff to it before. For those PWM instances, the
  current approach to detect enabled PWM signals does not work.

- A third issue applies to the bus clock only, which can get enabled
  multiple times (once for each PWM channel of a PWM chip). This is
  fine, however when entering suspend mode, the clock only gets
  disabled once.

This change introduces a different approach by relying on the enable
and prepared counters of the clock framework and using the frameworks
PWM signal states to address all three issues.

Clocks get disabled during suspend and back enabled on resume
regarding to the PWM channels individual state (requested/enabled).

Since we do not count the clock enables in the driver, this change no
longer clears the Status and Control registers Clock Source Selection
(FTM_SC[CLKS]). However, since we disable the selected clock anyway,
and we explicitly select the clock source on reenabling a PWM channel
this approach should not make a difference in practice.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:54:32 +01:00
Mika Westerberg 37670676a1 pwm: lpss: Rework the sequence of programming PWM_SW_UPDATE
Setting of PWM_SW_UPDATE is bit different in Intel Broxton compared to the
previous generation SoCs. Previously it was OK to set the bit many times
(from userspace via sysfs for example) before the PWM is actually enabled.

Starting from Intel Broxton it seems that we must set PWM_SW_UPDATE only
once before the PWM is enabled. Otherwise it is possible that the PWM does
not start properly.

Change the sequence of how PWM_SW_UPDATE is programmed so that we only set
it in pwm_lpss_config() when the PWM is already enabled. The initial
setting of PWM_SW_UPDATE will be done when PWM gets enabled. This should
make the driver work with the previous generation Intel SoCs and Broxton.

Add also small delay after the bit is set to let the hardware propagate it
properly.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:52:09 +01:00
Andy Shevchenko 6f90a00c66 pwm: lpss: Select core part automatically
We have two users of core part right now. Let them to select core part
automatically.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:50:31 +01:00
qipeng.zha 883e4d070f pwm: lpss: Update PWM setting for Broxton
For Broxton PWM controller, base unit is defined as 8-bit integer
and 14-bit fraction, so need to update base unit setting to output
wave with right frequency.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:45:38 +01:00
Stefan Wahren 6ef7d1c46f pwm: bcm2835: Fix email address specification
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:45:32 +01:00
Stefan Wahren fd13c14426 pwm: bcm2835: Prevent division by zero
It's possible that the PWM clock becomes an orphan. So better check the
result of clk_get_rate() in order to prevent a division by zero.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:45:10 +01:00
Stefan Wahren ebe88b6ae4 pwm: bcm2835: Calculate scaler in ->config()
Currently pwm-bcm2835 assumes a fixed clock rate and stores the
resulting scaler in the driver structure. But with the upcoming
PWM clock support for clk-bcm2835 the rate could change, so
calculate the scaler in the ->config() callback.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:44:36 +01:00
Mika Westerberg c7b91b33cf pwm: lpss: Remove ->free() callback
The LPSS PWM driver calls pwm_lpss_disable() when the PWM device is
released (for example unexported from sysfs). This in turn calls
pm_runtime_put() which makes runtime PM count to be unbalanced if the
device has not been enabled at this point.

This is easy to reproduce:

  # cd /sys/class/pwm/pwmchip0
  # echo 0 > export
  # echo 0 > unexport

The count is unbalanced and prevents the PWM device from being powered on
next time.

Fix this by removing ->free() callback. There are no resources to be
released anyway.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-12-16 16:31:27 +01:00
Linus Torvalds c8fff3ed32 pwm: Changes for v4.4-rc1
This round contains a couple of new drivers for the Marvell Berlin
 family of SoCs, various SoCs from Renesas and Broadcom as well as the
 backlight PWM present on MediaTek SoCs.
 
 Further existing drivers are extended to support a wider range of
 hardware.
 
 The remaining patches are minor fixes and cleanups across the board.
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Merge tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This round contains a couple of new drivers for the Marvell Berlin
  family of SoCs, various SoCs from Renesas and Broadcom as well as the
  backlight PWM present on MediaTek SoCs.

  Further existing drivers are extended to support a wider range of
  hardware.

  The remaining patches are minor fixes and cleanups across the board.

  Note that one of the patches included in this pull request is against
  arch/unicore32.  I've included it here because I couldn't get a
  response from Guan Xuetao and I consider the change low-risk.
  Equivalent patches have been merged and tested in Samsung and PXA
  trees.  The goal is to finally get rid of legacy code paths that have
  repeatedly been causing headaches"

* tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (24 commits)
  pwm: sunxi: Fix whitespace issue
  pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's
  pwm: sysfs: Remove unnecessary temporary variable
  unicore32: nb0916: Use PWM lookup table
  pwm: pwm-rcar: Revise the device tree binding document about compatible
  pwm: Return -ENODEV if no PWM lookup match is found
  pwm: sun4i: Add support for PWM controller on sun5i SoCs
  pwm: Set enable state properly on failed call to enable
  pwm: lpss: Add support for runtime PM
  pwm: lpss: Add more Intel Broxton IDs
  pwm: lpss: Support all four PWMs on Intel Broxton
  pwm: lpss: Add support for multiple PWMs
  pwm-pca9685: enable ACPI device found on Galileo Gen2
  pwm: Add MediaTek display PWM driver support
  dt-bindings: pwm: Add MediaTek display PWM bindings
  pwm: tipwmss: Enable on TI DRA7x and AM437x
  pwm: atmel-hlcdc: add sama5d2 SoC support.
  pwm: Add Broadcom BCM7038 PWM controller support
  Documentation: dt: add Broadcom BCM7038 PWM controller binding
  pwm: Add support for R-Car PWM Timer
  ...
2015-11-11 09:16:10 -08:00
Olliver Schinagl 5dcd7b42f1 pwm: sunxi: Fix whitespace issue
This patch changes no code, it just fixes the whitespacing. Operators
should be separated from operands by a single space.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:47 +01:00
Olliver Schinagl 65cdc6914a pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's
For the npwm property the PWM sysfs interface already made use of the
DEVICE_ATTR_RO macro. This patch expands this to the other sysfs
properties so that the code base is concise and makes use of this
helpful macro.

This has the advantage of slightly reducing the code size, improving
readability and no longer using magic values for permissions.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:46 +01:00
Olliver Schinagl 0344d0d69b pwm: sysfs: Remove unnecessary temporary variable
Use the result of pwm_is_enabled() directly instead of storing it in a
temporary variable.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:45 +01:00
Thierry Reding 655a03554c pwm: Return -ENODEV if no PWM lookup match is found
When looking up a PWM using the lookup table, assume that all entries
will have been added already, so failure to find a match means that no
corresponding entry has been registered.

This fixes an issue where -EPROBE_DEFER would be returned if the PWM
lookup table is empty. After this fix, -EPROBE_DEFER is reserved for
situations where no provider has yet registered for a matching entry.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:42 +01:00
Hans de Goede f6649f7ad8 pwm: sun4i: Add support for PWM controller on sun5i SoCs
The PWM controller on sun5i SoCs is identical to the one found on sun7i
SoCs. On the A13 package only one of the 2 pins is routed to the outside,
so only advertise one PWM channel there.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:41 +01:00
Jonathan Richardson d1cd214277 pwm: Set enable state properly on failed call to enable
The pwm_enable() function didn't clear the enabled bit if a call to the
driver's ->enable() callback returned an error. The result was that the
state of the PWM core was wrong. Clearing the bit when enable returns
an error ensures the state is properly set.

Tested-by: Jonathan Richardson <jonathar@broadcom.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: add missing kerneldoc for the lock]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10 13:06:16 +01:00
Qipeng Zha f080be27d7 pwm: lpss: Add support for runtime PM
To be able to save some power when PWM is not in use, add support for
runtime PM for this driver. This also allows the platform to transition to
low power S0ix states when the system is idle.

Signed-off-by: Huiquan Zhong <huiquan.zhong@intel.com>
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06 14:34:13 +01:00
Mika Westerberg 03f00e5311 pwm: lpss: Add more Intel Broxton IDs
Add more Intel Broxton ACPI and PCI IDs to the driver supported devices
list.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06 14:26:29 +01:00
Mika Westerberg 87219cb47e pwm: lpss: Support all four PWMs on Intel Broxton
Intel Broxton has similar PWM than Intel Braswell but instead of one it has
four PWMs included in one PCI/ACPI device. This patch adds support for all
the four PWMs and changes the PCI part of the driver to use
'pwm_lpss_bxt_info' instead.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06 14:26:28 +01:00
Mika Westerberg 4e11f5acb2 pwm: lpss: Add support for multiple PWMs
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI)
device. Each PWM has 1k of register space allocated from the parent device.
Add support for this.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06 14:26:27 +01:00
Andy Shevchenko 912b843904 pwm-pca9685: enable ACPI device found on Galileo Gen2
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via
ACPI ID INT3492.

Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06 14:14:19 +01:00
YH Huang 7e3b7dc76c pwm: Add MediaTek display PWM driver support
Add display PWM driver support to modify backlight for MT8173 and
MT6595. The PWM has one channel to control the brightness of the
display. When the (high_width / period) is closer to 1, the screen
is brighter; otherwise, it is darker.

Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 16:07:30 +02:00
Vignesh R 25ebc9ec16 pwm: tipwmss: Enable on TI DRA7x and AM437x
TIPWMSS is present on TI's DRA7x and AM437x SoCs. Enable its usage.

Instead of adding each SoC individually, use the more generic symbol
ARCH_OMAP2PLUS instead.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 16:07:29 +02:00
Nicolas Ferre 2b8b0ef354 pwm: atmel-hlcdc: add sama5d2 SoC support.
Add sama5d2 hlcdc backlight PWM support. This chip doesn't have to deal with an
errata, so it's a simple addition of the mfd compatible string.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 16:07:28 +02:00
Florian Fainelli 3a9f595702 pwm: Add Broadcom BCM7038 PWM controller support
Add support for the BCM7038-style PWM controller found in all BCM7xxx STB SoCs.
This controller has a hardcoded 2 channels per controller, and cascades a
variable frequency generator on top of a fixed frequency generator which offers
a range of a 148ns period all the way to ~622ms periods.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 16:07:27 +02:00
Boris Brezillon 7d8d05d114 misc: atmel_tclib: get and use slow clock
Commit dca1a4b5ff ("clk: at91: keep slow clk enabled to prevent system
hang") added a workaround for the slow clock as it is not properly handled
by its users.

Get and use the slow clock as it is necessary for the timer counters.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 12:33:14 +02:00
Yoshihiro Shimoda ed6c1476bf pwm: Add support for R-Car PWM Timer
This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
R-Car H2 has 7 channels. So, we can use the channels if we describe
device tree nodes.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 09:40:46 +02:00
Antoine Ténart 59d5c8b153 pwm: Add support for the Berlin PWM controller
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06 09:40:44 +02:00
Luis de Bethencourt a83a6a8225 pwm: atmel-hlcdc: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module alias
information is not created so module autoloading won't work.

This patch adds the missing MODULE_DEVICE_TABLE() for OF to export that
information so modules have the correct aliases built-in and autoloading
works correctly.

A longer explanation by Javier Canillas can be found here:
https://lkml.org/lkml/2015/7/30/519

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-21 10:04:40 +02:00
Linus Torvalds 82278fc079 pwm: Changes for v4.3-rc1
This set of changes introduces the beginnings of a new API that's based
 around the concept of states that can be atomically applied. Drivers go
 to various lengths to implement something similar, which indicates that
 the core should really be providing the necessary framework.
 
 On top of that, there is a bit of cleanup as well as improved kerneldoc
 and integration into the device-drivers DocBook.
 
 Regarding drivers there is a new one for the NXP LPC18xx family of SoCs
 and a couple of fixes for existing drivers (pca9685, Broadcom Kona and
 Atmel HLCDC).
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Merge tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This set of changes introduces the beginnings of a new API that's
  based around the concept of states that can be atomically applied.
  Drivers go to various lengths to implement something similar, which
  indicates that the core should really be providing the necessary
  framework.

  On top of that, there is a bit of cleanup as well as improved
  kerneldoc and integration into the device-drivers DocBook.

  Regarding drivers there is a new one for the NXP LPC18xx family of
  SoCs and a couple of fixes for existing drivers (pca9685, Broadcom
  Kona and Atmel HLCDC)"

* tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata
  pwm: Add NXP LPC18xx PWM/SCT DT binding documentation
  pwm: NXP LPC18xx PWM/SCT driver
  pwm-pca9685: Support changing the output frequency
  pwm-pca9685: Fix several driver bugs
  pwm: kona: Modify settings application sequence
  pwm: pca9685: Drop owner assignment
  pwm: Add to device-drivers documentation
  pwm: Clean up kerneldoc
  pwm: Remove useless whitespace
  pwm: sysfs: Remove unnecessary padding
  pwm: sysfs: Properly convert from enum to string
  pwm: Make use of pwm_get_xxx() helpers where appropriate
  pwm: Add pwm_get_polarity() helper function
  pwm: Constify PWM device where possible
  pwm: Add the pwm_is_enabled() helper
2015-09-09 10:55:32 -07:00
Josh Wu 7a59382018 ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata
The errata for HLCDC PWM of at91sam9n12 are the same as for at91sam9x5.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-09 15:16:01 +02:00
Ariel D'Alessandro 841e6f90bb pwm: NXP LPC18xx PWM/SCT driver
This commit adds support for NXP LPC18xx PWM/SCT.

NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator. Other SoCs in that family may share the same hardware.

The PWM supports a total of 16 channels, but only 15 can be simultaneously
requested. There's only one period, global to all the channels, thus PWM
driver will refuse setting different values to it, unless there's only one
channel requested.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
[thierry.reding@gmail.com: remove excessive padding of fields]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-09 15:00:33 +02:00
Clemens Gruber 01ec847200 pwm-pca9685: Support changing the output frequency
Previously, period_ns and duty_ns were only used to determine the
ratio of ON and OFF time, the default frequency of 200 Hz was never
changed.
The PCA9685 however is capable of changing the PWM output frequency,
which is expected when changing the period.

This patch configures the prescaler accordingly, using the formula
and notes provided in the PCA9685 datasheet.
Bounds checking for the minimum and maximum frequencies, last updated
in revision v.4 of said datasheet, is also added.

The prescaler is only touched if the period changed, because we have to
put the chip into sleep mode to unlock the prescale register.
If it is changed, the PWM output frequency changes for all outputs,
because there is one prescaler per chip. This is documented in the
PCA9685 datasheet and in the comments.

If the duty cycle is not changed at the same time as the period, then
we restart the PWM output using the duty cycle to period ratio from
before the period change.
When using LEDs for example, previously set brightness levels stay the
same when the frequency changes.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 16:35:46 +02:00
Clemens Gruber 4a627b52e4 pwm-pca9685: Fix several driver bugs
Problems:
- When duty_ns == period_ns, the full OFF bit was not cleared and the
  PWM output of the PCA9685 stayed off.
- When duty_ns == period_ns and the catch-all channel was used, the
  ALL_LED_OFF_L register was not cleared.
- The full ON bit was not cleared when setting the OFF time, therefore
  the exact OFF time was ignored when setting a duty_ns < period_ns

Solution: Clear both OFF registers when setting full ON and clear the
full ON bit when changing the OFF registers.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 16:35:13 +02:00
Jonathan Richardson fe0aea7978 pwm: kona: Modify settings application sequence
Update the driver so that settings are applied in accordance with the
most recent version of the hardware spec.  The revised sequence clears
the trigger bit, waits 400ns, writes settings, sets the trigger bit,
and waits another 400ns.  This corrects an issue where occasionally a
requested change was not properly reflected in the PWM output.

Reviewed-by: Arun Ramamurthy <arunrama@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Tested-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 16:19:41 +02:00
Krzysztof Kozlowski 09c14459f2 pwm: pca9685: Drop owner assignment
i2c_driver does not need to set an owner because i2c_register_driver()
will set it.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 15:56:01 +02:00
Thierry Reding 0488380276 pwm: Clean up kerneldoc
Clean up kerneldoc in preparation for including the PWM documentation in
DocBook.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 15:40:20 +02:00
Thierry Reding 6bc7064a69 pwm: Remove useless whitespace
Remove useless tabs used for padding in structure definitions as well as
some blank lines.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17 15:40:19 +02:00
Thierry Reding 412820dd53 pwm: sysfs: Remove unnecessary padding
Padding initializers so that assignment operators align is bound to lead
to inconsistencies or churn. Single spaces around the assignment is just
fine.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-27 12:03:38 +02:00
Thierry Reding 5a063d87e9 pwm: sysfs: Properly convert from enum to string
The current code will check for polarity in a boolean way. While it is
correct that polarity is either normal or inversed, make it more obvious
that it's an enumeration by using a switch statement and explicit
matches on the enumeration values.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-27 12:03:37 +02:00
Shobhit Kumar a3f37a104b pwm: crc: Add Crystalcove (CRC) PWM driver
The Crystalcove PMIC provides three PWM signals and this driver exports
one of them on the BYT platform which is used to control backlight for
DSI panel. This is platform device implementation of the drivers/mfd
cell device for CRC PMIC.

CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Varka Bhadram <varkabhadram@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-07-21 09:22:23 +02:00
Boris Brezillon 15da7b5001 pwm: Make use of pwm_get_xxx() helpers where appropriate
Use the pwm_get_xxx() helpers instead of directly accessing the fields
in struct pwm_device. This will allow us to smoothly move to the atomic
update approach.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-20 09:53:22 +02:00
Boris Brezillon 5c31252c4a pwm: Add the pwm_is_enabled() helper
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper
function to hide the logic behind enabled test. This will allow us to
smoothly move from the current approach to an atomic PWM update
approach.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-20 09:46:06 +02:00
Linus Torvalds c70c5fb2b9 pwm: Changes for v4.2-rc1
This has a couple of fixes for Atmel, Samsung and Broadcom drivers. Some
 preparatory patches for more upcoming Intel work is included as well.
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Merge tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This has a couple of fixes for Atmel, Samsung and Broadcom drivers.

  Some preparatory patches for more upcoming Intel work is included as
  well"

* tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: lpss: pci: Add support for Broxton platform
  pwm: bcm-kona: Don't set polarity in probe
  pwm: Add pwmchip_add_with_polarity() API
  pwm: atmel: Fix incorrect CDTY value after disabling
  pwm: atmel: Fix incorrect CDTY value after enabling
  pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modalias
  pwm: Add support to remove registered consumer lookup tables
2015-06-23 13:32:38 -07:00
Qipeng Zha 361c1066c9 pwm: lpss: pci: Add support for Broxton platform
Add PCI device IDs for Broxton platform.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12 12:46:50 +02:00
Arun Ramamurthy e23db65f3d pwm: bcm-kona: Don't set polarity in probe
Omit setting the polarity to normal during probe and instead use the new
pwmchip_add_with_polarity() function to register a PWM chip with inverse
polarity by default for all channels to reflect the hardware default.

Signed-off-by: Arun Ramamurthy <arunrama@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: use pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12 11:42:33 +02:00
Tim Kryger b6a00fae97 pwm: Add pwmchip_add_with_polarity() API
Add a new function to register a PWM chip with channels that have their
initial polarity as specified by an additional parameter. This benefits
drivers of controllers that by default operate with inversed polarity
by removing the need to modify the polarity during initialization.

Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: export pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12 11:36:30 +02:00
Alexandre Belloni 472ac3dcac pwm: atmel: Fix incorrect CDTY value after disabling
pwm-leds calls .config() and .disable() in a row. This exhibits that it
may happen that the channel gets disabled before CDTY has been updated
with CUPD. The issue gets quite worse with long periods. So, ensure that
at least one period has past before disabling the channel by polling
ISR.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12 11:16:12 +02:00
Alexandre Belloni 4c027f7ba8 pwm: atmel: Fix incorrect CDTY value after enabling
CUPD is not flushed before enabling the channel so it will update
CDTY/CPRD just after one period. So we always set CUPD, even when the
channel is not enabled.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12 11:12:20 +02:00
Javier Martinez Canillas cccb94543c pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modalias
If the pwm-samsung driver is built as a module, modalias information is
not filled so the module is not autoloaded. Use the MODULE_DEVICE_TABLE()
macro to export the OF device ID so the module contains that information.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-05-21 15:56:53 +02:00
Naidu Tellapati 1e70897d0e pwm: img: Impose upper and lower timebase steps value
The PWM hardware on Pistachio platform has a maximum timebase steps
value to 255. To fix it, let's introduce a compatible-specific
data structure to contain the SoC-specific details and use it to
specify a maximum timebase.

Also, let's limit the minimum timebase to 16 steps, to allow a sane
range of duty cycle steps.

Fixes: 277bb6a29e ("pwm: Imagination Technologies PWM DAC driver")
Signed-off-by: Naidu Tellapati <naidu.tellapati@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-05-19 16:07:40 +02:00
Shobhit Kumar efb0de55b6 pwm: Add support to remove registered consumer lookup tables
In case some drivers are unloading, they can remove lookup tables which
they had registered during their load time to avoid redundant entries if
loaded again.

CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-05-06 14:19:35 +02:00
Shobhit Kumar c264f1110d pwm: Remove __init initializer for pwm_add_table()
For platforms that don't support DT, some early MFD modules can register
lookup tables. Remove the __init annotation so that this works. This is
similar to gpio_add_lookup_table() which allows late additions.

CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-04-23 14:50:52 +02:00
Sjoerd Simons 4a1c683c98 pwm: samsung: Fix output race on disabling
When disabling the Samsung PWM the output state remains at the level it
was at the end of a PWM cycle. In other words, calling pwm_disable()
when at 100% duty cycle will keep the output active, while at all other
settings the output will go/stay inactive. On top of that the Samsung
PWM settings are double-buffered, which means the new settings only get
applied at the start of a new PWM cycle.

This results in a race if the PWM is at 100% duty cycle and a driver
calls:

  pwm_config(pwm, 0, period);
  pwm_disable(pwm);

In this case the PWMs output will unexpectedly stay active, unless a new
PWM cycle happened to start between the register writes in pwm_config()
and pwm_disable(). As far as I can tell this is a regression introduced
by 3bdf878, before that a call to pwm_config() would call
pwm_samsung_enable() which, while heavy-handed, made sure the expected
settings were live.

To resolve this, while not re-introducing the issues 3bdf878 (flickering
as the PWM got reset while in a PWM cycle) fixed, only force an update
of the settings when at 100% duty cycle, which shouldn't have any
noticeable effect on the output but is enough to ensure the behaviour is
as expected on disable.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-03-27 13:06:47 +01:00
Gaetan Hug 24ccea1ce6 pwm: mxs: Fix period divider computation
The driver computes which clock divider it sould be using from the
requested period. This computation assumes that the link between the
register value and the actual divider value is raising 2 to the power of
the registry value.

    div = 1 << regvalue

This is true only for the first 5 values out of 8. Next values are 64,
256 and, 1024 - instead of 32, 64, 128.
This affects only the users requesting a period > 0.04369s.

Replace the computation with a look-up table.

Signed-off-by: Gaetan Hug <ghug@induct.be>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-03-11 13:11:16 +01:00
Nicolas Ferre 054d3e1f9a pwm: atmel-hlcdc: Add errata handling for sama5d4
sama5d4 SoC also has an errata on the HLCDC PWM. It is the same as the
sama5d3 that is forbidding the use of div1 prescaler.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-03-11 11:59:54 +01:00
Krzysztof Kozlowski c456fbb2b2 pwm: pca9685: Constify struct regmap_config
The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-03-11 10:25:13 +01:00
Thierry Reding b65af27ad8 pwm: tegra: Use NSEC_PER_SEC
Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-02-18 08:40:29 +01:00
Markus Elfring 8d6cc07385 pwm: Remove unnecessary check before of_node_put()
The of_node_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-02-03 12:56:54 +01:00
Naidu Tellapati 277bb6a29e pwm: Imagination Technologies PWM DAC driver
The Pistachio SOC from Imagination Technologies includes a Pulse Width
Modulation DAC which produces 1 to 4 digital bit-outputs which represent
digital waveforms. These PWM outputs are primarily in charge of controlling
backlight LED devices.

Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Naidu Tellapati <Naidu.Tellapati@imgtec.com>
Signed-off-by: Sai Masarapu <Sai.Masarapu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
[thierry.reding: fixup license header as discussed on list]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-01-30 12:16:04 +01:00
Ajit Pal Singh cd264b6a65 pwm: sti: Maintain a bitmap of configured devices
This patch introduces a bitmap which is used to keep track of the
pwm channels which have been configured in a pwm chip.

The method used earlier to find the number of configured channels,
was to count the pwmdevices with PWMF_REQUESTED field set
and period value configured. This was not correct and failed
when of_pwm_get()/pwm_get() and then pwm_config() was used.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-01-30 12:16:03 +01:00
Alexandre Belloni 09853ce7bc pwm: Add Allwinner SoC support
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-01-30 12:16:01 +01:00
Boris BREZILLON df6922adec pwm: atmel-hlcdc: Prevent division by zero
The slow and system clock should never return a rate of zero, but this
might happen if the clocks property defined in the DT is referencing the
wrong clocks.

Prevent any division by zero from happening by testing the clk_freq
value before calling do_div().

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-01-30 12:16:00 +01:00
Thierry Reding d2048c4915 pwm: atmel-hlcdc: Depend on HAVE_CLK
The include/linux/clk.h header defines dummy implementations for the
various clk_*() functions if HAVE_CLK is not selected to improve build
coverage in randconfig builds.

The dummy implementation of clk_get_rate() returns 0, which causes the
Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end
up calling:

	do_div(clk_period_ns, 0)

On x86, do_div(n, base) will end up evaluating to this:

	n >>= ilog2(base)

with base = 0, the implementation of ilog2() will call ____ilog2_NaN(),
which is purposely undefined and results in a linker failure:

	ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined!

The implementation of do_div() checks that base is a power of 2 before
calling ilog2(). The compiler doesn't optimize this away, presumably
because is_power_of_2() is an inline function and the compiler doesn't
or can't inspect it closely enough. ilog2() being a macro it still ends
up generating the ____ilog2_NaN() because of the constant 0.

The root of the problem is that the driver really should be checking
before possibly dividing by zero. That should eventually be fixed, but
for now just assume that the clock runs at a sensible frequency when
available.

Reported-by: Jim Davis <jim.epost@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-01-30 12:15:58 +01:00
Linus Torvalds 0b4954c469 pwm: Changes for v3.19-rc1
There are two new drivers, one for the BCM2835 (Raspberry Pi) and one
 used in conjunction with the LCD controller on various Atmel SoCs. The
 Samsung PWM driver can now be built for 64-bit ARM (Exynos7).
 
 A couple of fixes have been applied to the FTM PWM driver and system
 sleep support was added.
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Merge tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "There are two new drivers, one for the BCM2835 (Raspberry Pi) and one
  used in conjunction with the LCD controller on various Atmel SoCs.
  The Samsung PWM driver can now be built for 64-bit ARM (Exynos7).

  A couple of fixes have been applied to the FTM PWM driver and system
  sleep support was added"

* tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling
  pwm: ftm: Add Power Management support for FTM PWM
  pwm: ftm: Add regmap rbtree type cache support
  pwm: ftm: Correctly track usage count
  pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7
  pwm: add DT bindings documentation for atmel-hlcdc-pwm driver
  pwm: add support for atmel-hlcdc-pwm device
  pwm: Add BCM2835 PWM driver
2014-12-17 10:10:51 -08:00
Boris BREZILLON 39e046f2c1 pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling
at91sam9x5 has an errata forbidding the use of slow clk as a clk source and
sama5d3 SoCs has another errata forbidding the use of div1 prescaler.

Take both of these erratas into account.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-12-04 11:32:36 +01:00
Xiubo Li 97d0b42e39 pwm: ftm: Add Power Management support for FTM PWM
Add PM support for FTM PWM driver using callback function suspend
and resume in .driver.pm of platform_driver.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-12-01 10:48:54 +01:00
Xiubo Li 49599cf6bb pwm: ftm: Add regmap rbtree type cache support
This patch is to prepare for adding PM support for FTM PWM driver using
callback function suspend and resume in .driver.pm of platform_driver.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-12-01 10:44:48 +01:00
Xiubo Li 8e6e765102 pwm: ftm: Correctly track usage count
No matter how many times the FTM PWM is enabled, the use_count will
always be one.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-12-01 10:43:45 +01:00
Abhilash Kesavan 06e4cb6b1d pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7
To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make
the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-11-17 12:24:17 +01:00
Boris Brezillon 2b4984bef4 pwm: add support for atmel-hlcdc-pwm device
The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.

This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-11-17 12:20:17 +01:00
Bart Tanghe e5a06dc5ac pwm: Add BCM2835 PWM driver
Add PWM driver for Broadcom BCM2835 processor (Raspberry Pi)

Signed-off-by: Bart Tanghe <bart.tanghe@thomasmore.be>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-11-17 12:20:13 +01:00
Greg Kroah-Hartman a8a93c6f99 Merge branch 'platform/remove_owner' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into driver-core-next
Remove all .owner fields from platform drivers
2014-11-03 19:53:56 -08:00
Linus Torvalds 5b9c897252 pwm: Changes for v3.18-rc1
There are no new drivers here, only a couple of fixes all over the place.
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Merge tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm changes from Thierry Reding:
 "There are no new drivers here, only a couple of fixes all over the
  place"

* tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: Let PWM_CLPS711X depend on HAS_IOMEM
  pwm: atmel: Fix calculation of prescale value
  pwm: Fix uninitialized warnings in pwm_get()
  pwm: rockchip: Allow polarity invert on rk3288
  pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2
  pwm: imx: Cleanup indentation for register definitions
  pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition
  pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.
  pwm: lpss: make it buildable only on X86
  pwm: lpss: use c99 initializers in structures
  pwm: lpss: Fix build failure on PowerPC
  pwm: lpss: pci: Move to use pcim_enable_device()
  pwm: lpss: Properly split driver to parts
  pwm: lpss: Add ACPI and PCI IDs for Intel Braswell
  pwm: fsl-ftm: Select REGMAP_MMIO
  pwm: fsl-ftm: Document 'big-endian' property
  pwm: fsl-ftm: Convert to direct regmap API usage
  pwm: fsl-ftm: Clean up the code
2014-10-21 08:17:43 -07:00
Wolfram Sang f05fae14a1 pwm: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:21:28 +02:00
Chen Gang dec02f98ae pwm: Let PWM_CLPS711X depend on HAS_IOMEM
PWM_CLPS711X needs HAS_IOMEM, so depend on it, the related error (with
allmodconfig under um):

    MODPOST 1205 modules
  ERROR: "devm_ioremap_resource" [drivers/pwm/pwm-clps711x.ko] undefined!
  ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined!

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-10-20 09:39:44 +02:00
Nikolaus Voss e2e0897010 pwm: atmel: Fix calculation of prescale value
The prescale value used for calculating the period was incremented
afterwards, thus the resulting prescale value is by one too high.
This resulted in a PWM frequency only half as high as requested.

This patch moves the 64 bit division out of the prescale loop to
correct the above issue and make the calculation more efficient.

Signed-off-by: Nikolaus Voss <n.voss@weinmann-emt.de>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-09-25 08:52:39 +02:00
Arnd Bergmann c40c4028f0 Second batch of AT91 cleanup for 3.18:
- Timer Counter (TC) fixup and cleanup:
   - fix segmentation fault when kexec-ing a kernel by masking
     TC interrupts at shutdown and probe time
   - use modern driver model: devm_*, probe function, sanitize IRQ request
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Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup

Pull "Second batch of AT91 cleanup for 3.18" from Nicolas Ferre:
- Timer Counter (TC) fixup and cleanup:
  - fix segmentation fault when kexec-ing a kernel by masking
    TC interrupts at shutdown and probe time
  - use modern driver model: devm_*, probe function, sanitize IRQ request

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
  clocksource: tcb_clksrc: sanitize IRQ request
  ARM: at91/tclib: mask interruptions at shutdown and probe
  ARM: at91/tclib: move initialization from alloc to probe
  ARM: at91/tclib: prefer using of devm_* functions
2014-09-09 17:03:17 +02:00
Gaël PORTAY 4930d247af ARM: at91/tclib: move initialization from alloc to probe
Move resource retrieval from atmel_tc_alloc to tc_probe to avoid lately
reporting resource related issues when a TC block user request a TC block.

Moreover, resources retrieval are usually done in the probe function,
thus moving them add some consistency with other drivers.

Initialization is done once, ie not every time a tc block is requested.
If it fails, the device is not appended to the list of tc blocks.

Furhermore, the device id is retrieved at probe as well, avoiding parsing
DT every time the user requests of tc block.

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-09-08 10:54:03 +02:00
Geert Uytterhoeven 70145f8713 pwm: Fix uninitialized warnings in pwm_get()
With some versions of gcc (e.g. 4.1.2):

drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this function
drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this function

While these are false positives, we can get rid of them by refactoring
the code to store a pointer to the best match, as suggested before by
Thierry Reding. This does require moving the mutex_unlock() down.

Fixes: d717ea73e3 ("pwm: Fix period and polarity in pwm_get() for non-perfect matches")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-29 10:18:19 +02:00
Doug Anderson 7264354c0c pwm: rockchip: Allow polarity invert on rk3288
The rk3288 has the ability to invert the polarity of the PWM.  Let's
enable that ability.  Note that this increases pwm_cells to 3 for
rk3288.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-26 10:44:08 +02:00
Liu Ying 137fd45ffe pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2
The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27,
i.MX51 and i.MX6SL.  There is a 4-word (16 bit) sample FIFO in this IP.
Each FIFO slot determines the duty period of a PWM waveform in one full
cycle.  The IP spec mentions that we should not write a fourth sample
because the FIFO will become full and triggers a FIFO write error (FWE)
which will prevent the PWM from starting once it is enabled.  In order
to avoid any sample FIFO overflow issue, this patch clears all sample
FIFO by doing software reset in the configuration hook when the
controller is disabled or waits for a full PWM cycle to get a
relinquished FIFO slot when the controller is enabled and the FIFO is
fully loaded.

The FIFO overflow issue can be reproduced by the following commands on
the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which
is driven by the pin HSIC_STROBE and the maximal brightness is 255.

	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 255 > /sys/class/leds/user/brightness

Here, FWE happens (PWMSR register reads 0x58) and the LED can not be
lighten.

Another way to reproduce the FIFO overflow issue is to run this script:

	while true;
		do echo 255 > /sys/class/leds/user/brightness;
	done

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 15:46:42 +02:00
Liu Ying 40f260c2ce pwm: imx: Cleanup indentation for register definitions
This patch contains no logic change to cleanup indentation for register
definitions only.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 15:46:36 +02:00
Liu Ying bd59bdc898 pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition
This patch adds missing parentheses around the argument of the macro
MX3_PWMCR_PRESCALER(x) to avoid any potential macro expansion issue.

Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 15:46:28 +02:00
Xiubo Li 533acc0e8d pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.
Since we cannot make sure the 'chip->npwm' will always be none zero here,
and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).

So this patch fix this with just doing the zero check before calling kzalloc().

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 14:38:12 +02:00
Andy Shevchenko ad16202de8 pwm: lpss: make it buildable only on X86
There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 11:46:37 +02:00
Julia Lawall b2b7adeb21 pwm: lpss: use c99 initializers in structures
Use c99 initializers for structures.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@

struct i1 {
 fs
 T fld;
 ...};

@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@

struct i1 i2 = { is,
+ .fld = e
- e
 ,...};
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
[thierry.reding: rebased and applied same fix for Braswell]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-25 11:45:34 +02:00
Thierry Reding e0c86a3b63 pwm: lpss: Fix build failure on PowerPC
An x86 build seems to pull in the linux/io.h include indirectly. On
PowerPC that doesn't happen and the build breaks due to the readl() and
writel() functions not being declared. Fix this by explicitly including
linux/io.h.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-23 00:25:52 +02:00
Andy Shevchenko 90927fe9a0 pwm: lpss: pci: Move to use pcim_enable_device()
Let's use managed functions for this driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-23 00:25:51 +02:00
Andy Shevchenko c558e39e14 pwm: lpss: Properly split driver to parts
The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.

The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.

While here, move to use macros module_pci_driver() and
module_platform_driver().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-23 00:25:47 +02:00
Alan Cox 373c57829a pwm: lpss: Add ACPI and PCI IDs for Intel Braswell
This is pretty much the same as Baytrail PWM. Only difference is that the
input clock runs on different frequency.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-22 11:52:30 +02:00
Fabio Estevam 00018a8ae5 pwm: fsl-ftm: Select REGMAP_MMIO
Commit 42fa98a9c3 ("pwm: fsl-ftm: Convert to direct regmap API usage")
introduced the following error when REGMAP_MMIO=n:

drivers/built-in.o: In function `fsl_pwm_probe':
>> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk'

Select select REGMAP_MMIO in order to fix this error.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-22 10:17:01 +02:00
Xiubo Li 42fa98a9c3 pwm: fsl-ftm: Convert to direct regmap API usage
The regmap core supports different endian modes for devices. This patch
convert to direct regmap API usage, preparing to support big endianness
for LS1 SoC.

Using the regmap framework it will be easy to support devices that only
differ in endianness with the same device driver.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-20 10:10:12 +02:00
Xiubo Li cd6d92d2aa pwm: fsl-ftm: Clean up the code
This patch intends to prepare for converting to direct regmap API usage.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-20 10:09:54 +02:00
Geert Uytterhoeven d717ea73e3 pwm: Fix period and polarity in pwm_get() for non-perfect matches
If pwm_get() finds a look-up entry with a perfect match (both dev_id and
con_id match), the loop is aborted, and "p" still points to the correct
struct pwm_lookup.

If only an entry with a matching dev_id or con_id is found, the loop
terminates after traversing the whole list, and "p" now points to
arbitrary memory, not part of the pwm_lookup list.
Then pwm_set_period() and pwm_set_polarity() will set random values for
period resp. polarity.

To fix this, save period and polarity when finding a new best match,
just like is done for chip (for the provider) and index.

This fixes the LCD backlight on r8a7740/armadillo-legacy, which was fed
period 0 and polarity -1068821144 instead of 33333 resp. 1.

Fixes: 3796ce1d4d ("pwm: add period and polarity to struct pwm_lookup")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-18 10:58:43 +02:00
Linus Torvalds 34b20e6df6 pwm: Changes for v3.17-rc1
The set of changes for this merge window contains two new drivers: one
 for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs. The
 remainder of the changes are the usual small cleanups such as removing
 redundant OOM messages, signalling that a PWM chip's operations can
 sleep and removing an unneeded dependency.
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Merge tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm changes from Thierry Reding:
 "The set of changes for this merge window contains two new drivers: one
  for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs.

  The remainder of the changes are the usual small cleanups such as
  removing redundant OOM messages, signalling that a PWM chip's
  operations can sleep and removing an unneeded dependency"

* tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: rockchip: Added to support for RK3288 SoC
  pwm: rockchip: document RK3288 SoC compatible
  pwm: sti: Remove PWM period table
  pwm: sti: Sync between enable/disable calls
  pwm: sti: Ensure same period values for all channels
  pwm: sti: Fix PWM prescaler handling
  pwm: sti: Supply Device Tree binding documentation for ST's PWM IP
  pwm: sti: Add new driver for ST's PWM IP
  pwm: imx: set can_sleep flag for imx_pwm
  pwm: lpss: remove dependency on clk framework
  pwm: pwm-tipwmss: remove unnecessary OOM messages
  pwm: rockchip: document device tree bindings
  pwm: add Rockchip SoC PWM support
2014-08-08 18:06:29 -07:00
Caesar Wang f630629908 pwm: rockchip: Added to support for RK3288 SoC
This patch added to support the PWM controller found on
RK3288 SoC.

Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08 13:12:47 +02:00
Ajit Pal Singh 3aacd3e187 pwm: sti: Remove PWM period table
Removes the PWM period table. Instead the prescaler is computed
from the period value passed in the config() function.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08 13:12:46 +02:00
Ajit Pal Singh 6ad6b838e1 pwm: sti: Sync between enable/disable calls
ST PWM IP has a common enable/disable control for all the PWM
channels on a PWM cell. Disables PWM output on the PWM HW only
when disable is called for the last channel.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08 13:12:45 +02:00
Ajit Pal Singh 5165166e8a pwm: sti: Ensure same period values for all channels
ST PWM IP shares the same clock prescaler across all the PWM
channels. Hence configuration requests which change the period
will affect all the channels. Do not allow period changes which
will stomp period settings of the already configured channels.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08 13:12:45 +02:00
Ajit Pal Singh bf9cc80b6c pwm: sti: Fix PWM prescaler handling
This patch fixes the pwm driver to write the complete 8 bits of
the prescaler value to the PWM Control register.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-08 13:12:40 +02:00
Lee Jones 378fe115d1 pwm: sti: Add new driver for ST's PWM IP
This driver supports all current STi platforms' PWM IPs.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[thierry.reding: rename module to pwm-sti, fix build breakage]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-07 16:18:27 +02:00
Shawn Guo 31c4fa3442 pwm: imx: set can_sleep flag for imx_pwm
The .config() hook imx_pwm_config() calls clk APIs like clk_prepare()
and clk_get_rate(), which might sleep, so we need to set can_sleep flag
on pwm_chip.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-07 13:22:44 +02:00
Heikki Krogerus 65accd8738 pwm: lpss: remove dependency on clk framework
Unlike other Intel LPSS devices, the PWM does not have the
clock dividers or the gate. All we get from the clock is the
rate. Since PCI case uses the driver data to get the rate,
we can drop the clk and use the same data also in case of
ACPI. The frequency is the same.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-07 13:18:03 +02:00
Jingoo Han ed1a819a3f pwm: pwm-tipwmss: remove unnecessary OOM messages
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message. The following
checkpatch warning is also removed.

  WARNING: Possible unnecessary 'out of memory' message

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-08-07 13:14:33 +02:00
Beniamino Galvani 101353c82a pwm: add Rockchip SoC PWM support
This commit adds a driver for the PWM controller found on Rockchip
RK29, RK30 and RK31 SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2014-07-11 15:54:51 +02:00
Alexandre Belloni bb4bbbaae2 PWM: atmel: allow building for AVR32
The Atmel PWM IP can be found on avr32 chips. This allows selecting and building
the driver on avr32.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09 15:13:31 +02:00
Linus Torvalds 7f33e7241d pwm: Changes for v3.16-rc1
The majority of these changes are cleanups and fixes across all drivers.
 Redundant error messages are removed and more PWM controllers set the
 .can_sleep flag to signal that they can't be used in atomic context.
 
 Support is added for the Broadcom Kona family of SoCs and the Intel LPSS
 driver can now probe PCI devices in addition to ACPI devices. Upon shut-
 down, the pwm-backlight driver will now power off the backlight. It also
 uses the new descriptor-based GPIO API for more concise GPIO handling.
 
 A large chunk of these changes also converts platforms to use the lookup
 mechanism rather than relying on the global number space to reference
 PWM devices. This is largely in preparation for more unification and
 cleanups in future patches. Eventually it will allow the legacy PWM API
 to be removed.
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Merge tag 'pwm/for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm changes from Thierry Reding:
 "The majority of these changes are cleanups and fixes across all
  drivers.  Redundant error messages are removed and more PWM
  controllers set the .can_sleep flag to signal that they can't be used
  in atomic context.

  Support is added for the Broadcom Kona family of SoCs and the Intel
  LPSS driver can now probe PCI devices in addition to ACPI devices.
  Upon shutdown, the pwm-backlight driver will now power off the
  backlight.  It also uses the new descriptor-based GPIO API for more
  concise GPIO handling.

  A large chunk of these changes also converts platforms to use the
  lookup mechanism rather than relying on the global number space to
  reference PWM devices.  This is largely in preparation for more
  unification and cleanups in future patches.  Eventually it will allow
  the legacy PWM API to be removed"

* tag 'pwm/for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (38 commits)
  pwm: fsl-ftm: set pwm_chip can_sleep flag
  pwm: ab8500: Fix wrong value shift for disable/enable PWM
  pwm: samsung: do not set manual update bit in pwm_samsung_config
  pwm: lp3943: Set pwm_chip can_sleep flag
  pwm: atmel: set pwm_chip can_sleep flag
  pwm: mxs: set pwm_chip can_sleep flag
  pwm: tiehrpwm: inline accessor functions
  pwm: tiehrpwm: don't build PM related functions when not needed
  pwm-backlight: retrieve configured PWM period
  leds: leds-pwm: retrieve configured PWM period
  ARM: pxa: hx4700: use PWM_LOOKUP to initialize struct pwm_lookup
  ARM: shmobile: armadillo: use PWM_LOOKUP to initialize struct pwm_lookup
  ARM: OMAP3: Beagle: use PWM_LOOKUP to initialize struct pwm_lookup
  pwm: modify PWM_LOOKUP to initialize all struct pwm_lookup members
  ARM: pxa: hx4700: initialize all the struct pwm_lookup members
  ARM: OMAP3: Beagle: initialize all the struct pwm_lookup members
  pwm: renesas-tpu: remove unused struct tpu_pwm_platform_data
  ARM: shmobile: armadillo: initialize all struct pwm_lookup members
  pwm: add period and polarity to struct pwm_lookup
  pwm: twl: Really disable twl6030 PWMs
  ...
2014-06-11 14:06:55 -07:00