Commit Graph

1571 Commits

Author SHA1 Message Date
Linus Torvalds ce01e871a1 This is the bulk of pin control changes for the v3.20 cycle:
- Framework changes and enhancements:
   - Passing -DDEBUG recursively to subdir drivers so we get
     debug messages properly turned on.
   - Infer map type from DT property in the groups parsing code
     in the generic pinconfig code.
   - Support for custom parameter passing in generic pin config.
     This is used when you are using the generic pin config, but
     want to add a few custom properties that no other driver
     will use.
 
 - New drivers:
   - Driver for the Xilinx Zynq
   - Driver for the AmLogic Meson SoCs
 
 - New features in drivers:
   - Sleep support (suspend/resume) for the Cherryview driver
   - mvebeu a38x can now mux a UART on pins MPP19 and MPP20
   - Migrated the qualcomm driver to generic pin config handling
     of extended config options in the core code.
   - Support BUS1 and AUDIO in the Exynos pin controller.
   - Add some missing functions in the sun6i driver.
   - Add support for the A31S variant in the sun6i driver.
   - EMEv2 support in the Renesas PFC driver.
   - Ass support for Qualcomm MSM8916 in the qcom driver.
 
 - Deleted features
   - Drop support for the SiRF Marco that was never released to
     the market.
   - Drop SH7372 support as the support for this platform is
     removed from the kernel.
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Merge tag 'pinctrl-v3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pincontrol updates from Linus Walleij:
 :This is the bulk of pin control changes for the v3.20 cycle:

  Framework changes and enhancements:
   - Passing -DDEBUG recursively to subdir drivers so we get debug
     messages properly turned on.
   - Infer map type from DT property in the groups parsing code in the
     generic pinconfig code.
   - Support for custom parameter passing in generic pin config.  This
     is used when you are using the generic pin config, but want to add
     a few custom properties that no other driver will use.

  New drivers:
   - Driver for the Xilinx Zynq
   - Driver for the AmLogic Meson SoCs

  New features in drivers:
   - Sleep support (suspend/resume) for the Cherryview driver
   - mvebeu a38x can now mux a UART on pins MPP19 and MPP20
   - Migrated the qualcomm driver to generic pin config handling of
     extended config options in the core code.
   - Support BUS1 and AUDIO in the Exynos pin controller.
   - Add some missing functions in the sun6i driver.
   - Add support for the A31S variant in the sun6i driver.
   - EMEv2 support in the Renesas PFC driver.
   - Add support for Qualcomm MSM8916 in the qcom driver.

  Deleted features
   - Drop support for the SiRF Marco that was never released to the
     market.
   - Drop SH7372 support as the support for this platform is removed
     from the kernel"

* tag 'pinctrl-v3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (40 commits)
  sh-pfc: emev2 - Fix mangled author name
  pinctrl: cherryview: Configure HiZ pins to be input when requested as GPIOs
  pinctrl: imx25: fix numbering for pins
  pinctrl: pinctrl-imx: don't use invalid value of conf_reg
  pinctrl: qcom: delete pin_config_get/set pinconf operations
  pinctrl: qcom: Add msm8916 pinctrl driver
  DT: pinctrl: Document Qualcomm MSM8916 pinctrl binding
  pinctrl: qcom: increase variable size for register offsets
  pinctrl: hide PCONFDUMP in #ifdef
  pinctrl: rockchip: Only mask interrupts; never disable
  pinctrl: zynq: Fix usb0 pins
  pinctrl: sh-pfc: sh7372: Remove DT binding documentation
  pinctrl: sh-pfc: sh7372: Remove PFC support
  sh-pfc: Add emev2 pinmux support
  sh-pfc: add macro to define pinmux without function
  pinctrl: add driver for Amlogic Meson SoCs
  staging: drivers: pinctrl: Fixed checkpatch.pl warnings
  pinctrl: exynos: Add AUDIO pin controller for exynos7
  sh-pfc: r8a7790: add MLB+ pin group
  sh-pfc: r8a7791: add MLB+ pin group
  ...
2015-02-11 11:23:13 -08:00
Geert Uytterhoeven f724e05baa sh-pfc: emev2 - Fix mangled author name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 1e7d5d849c ("sh-pfc: Add emev2 pinmux support")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-05 14:51:34 +01:00
Mika Westerberg 2479c7300e pinctrl: cherryview: Configure HiZ pins to be input when requested as GPIOs
If the pin is in HiZ mode when it is requested as GPIO its value cannot be
read (it always returns 0). In order to cope with the Linux GPIO subsystem
where we do not have such state at all, turn the pin to be input instead.

Reported-by: Jerome Blin <jerome.blin@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-04 09:59:26 +01:00
Uwe Kleine-König 34027ca2bb pinctrl: imx25: fix numbering for pins
The pin id for a given tuple listed in a fsl,pins property is calculated
by dividing the first entry (which is also a register offset) by 4.
As the first available register is at offset 0x8 and configures the pad
MX25_PAD_A10 the right id for this pin is 2. All other pins are off by
one, too.

This patch drops the definition MX25_PAD_RESERVE1 (together with its
only use) and decrements all following values by 1.

Fixes: b4a87c9b96 ("pinctrl: pinctrl-imx: add imx25 pinctrl driver")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-03 14:02:55 +01:00
Uwe Kleine-König 4ff0f034e9 pinctrl: pinctrl-imx: don't use invalid value of conf_reg
The right check for conf_reg to be invalid it testing against -1 not 0
as is done in the rest of the driver.

This fixes an oops that can be triggered by:

	cat /sys/kernel/debug/pinctrl/43fac000.iomuxc/*

Fixes: ae75ff8145 ("pinctrl: pinctrl-imx: add imx pinctrl core driver")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-03 13:57:52 +01:00
Stanimir Varbanov fc0d8fda50 pinctrl: qcom: delete pin_config_get/set pinconf operations
The .pin_config_get/set operation are not supported in qcom pinctrl
driver. As the pinconf core is smart enough it doesn't complain
about that.

Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 14:36:33 +01:00
Joonwoo Park 5373a2c5ab pinctrl: qcom: Add msm8916 pinctrl driver
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8916.

Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 14:35:09 +01:00
Joonwoo Park 981de1cb42 pinctrl: qcom: increase variable size for register offsets
On newer TLMM hardware blocks the registers are spread and
we need an offsets upper than 16 bits to address them. Increase
the register offset variables to 32 bits size.

Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 14:32:44 +01:00
Arnd Bergmann 4f06266a62 pinctrl: hide PCONFDUMP in #ifdef
The zynq and qcom-spmi pinctrl drivers both use pin_config_item arrays
to provide extra interfaces in debugfs. This structure and the
PCONFDUMP macro are not defined if CONFIG_DEBUG_FS is turned off,
so we get build errors like:

pinctrl/qcom/pinctrl-spmi-gpio.c:139:37: error: array type has incomplete element type
 static const struct pin_config_item pmic_conf_items[ARRAY_SIZE(pmic_gpio_bindings)] = {
                                     ^
pinctrl/qcom/pinctrl-spmi-gpio.c:140:2: error: implicit declaration of function 'PCONFDUMP' [-Werror=implicit-function-declaration]
  PCONFDUMP(PMIC_GPIO_CONF_PULL_UP,  "pull up strength", NULL, true),
  ^
pinctrl/qcom/pinctrl-spmi-gpio.c:139:37: warning: 'pmic_conf_items' defined but not used [-Wunused-variable]
 static const struct pin_config_item pmic_conf_items[ARRAY_SIZE(pmic_gpio_bindings)] = {

Lacking any better idea to solve this nicely, this patch uses #ifdef
to hide the structures, just like the pinctrl core does.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 14:30:59 +01:00
Doug Anderson 5ae0c7ad06 pinctrl: rockchip: Only mask interrupts; never disable
The Rockchip GPIO interrupt controller totally throws away all status
about an interrupt when you "disable" the interrupt.  That has
unfortunate consequences in the following situation:

1. An edge-triggered interrupt is enabled and should wake the system.
2. System suspend happens: interrupt is disabled and marked for wake.
3. rockchip_irq_suspend() reenables the interrupt so we can wake.
4. Interrupt happens when asleep.
5. rockchip_irq_resume() redisables the interrupt.
6. Disabling the interrupt throws away all status about it.
7. Normal system resume happens and we enable the interrupt again,
   since we threw away status about the interrupt we don't know it
   fired while suspended.  Even worse: if we need both edges of the
   interrupt the logic to swap edges never runs.

Note: even if we somehow can post the status about wakeup interrupts
in rockchip_irq_resume() we would still have a window of losing any
edges that came in while interrupts were disabled.

If we use mask only then we don't need to worry.  The GPIO Interrupt
controller keeps track of pending interrupts that are enabled and just
masked.

There was no real strong reason to support the enable/disable
functionality (other than that it seemed right), so let's go back to
just supporting mask/unmask but actually map it to the real
mask/unmask.  This ends up with slightly different (and more correct)
behavior than before (f2dd028 pinctrl: rockchip: Fix
enable/disable/mask/unmask).

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 10:38:36 +01:00
Linus Walleij b6afdbe8e8 Linux 3.19-rc6
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Merge tag 'v3.19-rc6' into devel

Linux 3.19-rc6
2015-01-30 10:38:15 +01:00
Andreas Färber 8090f7917b pinctrl: zynq: Fix usb0 pins
Fix usb0 pin 19 -> 29 (matching ethernet1 pins and manual).
Pin 19 is used for ethernet0 on the Parallella board.

Fixes: add958cee9 ("pinctrl: Add driver for Zynq")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30 10:31:49 +01:00
Magnus Damm 62476634d7 pinctrl: sh-pfc: sh7372: Remove PFC support
Remove sh7372 PFC support as part of the sh7372 and Mackerel
legacy code removal.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-29 10:40:38 +01:00
Niklas Söderlund 1e7d5d849c sh-pfc: Add emev2 pinmux support
Add PFC support for the EMMA Mobile EV2 SoC including pin groups for
on-chip devices.

Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-27 08:50:22 +01:00
Niklas Söderlund 4c9e473541 sh-pfc: add macro to define pinmux without function
Used to define pinmux configurations where the pinmux function have no
representation in the configuration registers but instead solely depends
on a group selection.

Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-27 08:47:53 +01:00
Jean-Christophe PLAGNIOL-VILLARD a0b957f306 pinctrl: at91: allow to have disabled gpio bank
Today we expect that all the bank are enabled, and count the number of banks
used by the pinctrl based on it instead of using the last bank id enabled.

So switch to it, set the chained IRQ at runtime based on enabled banks
and wait only the number of enabled gpio controllers at probe time.

Cc: <stable@vger.kernel.org> # 3.18
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-26 09:13:36 +01:00
Beniamino Galvani 6ac7309511 pinctrl: add driver for Amlogic Meson SoCs
This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-26 09:13:00 +01:00
Anjana Sasindran 40b9e4fa75 staging: drivers: pinctrl: Fixed checkpatch.pl warnings
This patch fixes two checkpatch.pl warnings

WARNING: Error trailing white space
WARNING: MIssing blank line after declaration

Signed-off-by: Anjana Sasindran <anjanasasindran123@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-21 11:02:26 +01:00
Stephen Boyd bcd53f858d pinctrl: qcom: Don't iterate past end of function array
Timur reports that this code crashes if nfunctions is 0. Fix the
loop iteration to only consider valid elements of the functions
array.

Reported-by: Timur Tabi <timur@codeaurora.org>
Cc: Pramod Gurav <pramod.gurav@smartplayin.com>
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Cc: Ivan T. Ivanov <iivanov@mm-sol.com>
Cc: Andy Gross <agross@codeaurora.org>
Fixes: 327455817a "pinctrl: qcom: Add support for reset for apq8064"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-19 11:17:45 +01:00
Padmavathi Venna ac5a186ebe pinctrl: exynos: Add AUDIO pin controller for exynos7
Audio IPs on Exynos7 require gpios available in AUDIO
pin controller block. So adding the AUDIO pinctrl support.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-19 11:04:47 +01:00
Sergei Shtylyov e29a4c3a1c sh-pfc: r8a7790: add MLB+ pin group
Add MLB+ 3-pin mode pin group to R8A7790 PFC driver.

Based on original patch by Andrey Gusakov <andrey.gusakov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-15 17:36:22 +01:00
Sergei Shtylyov 8271ee96d1 sh-pfc: r8a7791: add MLB+ pin group
Add MLB+ 3-pin mode pin group to R8A7791 PFC driver.

Based on original patch by Andrey Gusakov <andrey.gusakov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-15 17:10:56 +01:00
Sergei Shtylyov 87f27fe1a7 sh-pfc: r8a7791: fix typo in MLB_CLK
The R8A7791 manual sometimes calls the signal MLB_CLK and sometimes MLB_CK; the
latter can only be encountered in the PFC section and  is probably  just a typo
(this  signal is always called MLB_CLK in the R8A7790  manual). Fix occurences
of MLB_CK throughout the R8A7791 PFC driver.

Based on original patch by Andrey Gusakov <andrey.gusakov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-15 17:07:28 +01:00
Barry Song a17272a46c pinctrl: sirf: drop marco support
marco chip has been dropped, clear its support.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:54 +01:00
Krzysztof Kozlowski 63b5aed37b pinctrl: bcm281xx: Constify struct regmap_config
The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const. Make also
of_device_id array const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:53 +01:00
Krzysztof Kozlowski 23259f19d0 pinctrl: dove: Constify struct regmap_config and of_device_id
The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const. Make also
of_device_id array const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:53 +01:00
Hans de Goede 47cf4b326c pinctrl: sun6i: Add A31s pinctrl support
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.

The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.

Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the
prcm pins are identical between the A31 and the A31s.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:52 +01:00
Hans de Goede c5abe62b76 pinctrl: sun6i: Add some missing functions
While working on pinctrl for the A31s, I noticed that function 4 of
PA15 - PA18 was missing, add these.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:52 +01:00
Vivek Gautam d171cd02f2 pinctrl: exynos: Add BUS1 pin controller for exynos7
USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:51 +01:00
Linus Walleij f684e4ac9f pinctrl: pinconf-generic: loose DT dependence
New pin controllers such as ACPI-based may also have custom properties
to parse, and should be able to use generic pin config. Let's make the
code compile on !OF systems and rename members a bit to underscore it
is custom parameters and not necessarily DT parameters.

This fixes a build regression for x86_64 on the zeroday kernel builds.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Reviewed-and-tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:21:38 +01:00
Johan Hovold 41f632fe17 pinctrl: lantiq: remove bogus of_gpio_chip_add
Remove bogus call to of_gpiochip_add (and of_gpio_chip remove in error
path) which is also called when adding the gpio chip.

This prevents adding the same pinctrl range twice.

Fixes: 3f8c50c9b1 ("OF: pinctrl: MIPS: lantiq: implement lantiq/xway
pinctrl support")

Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:20:46 +01:00
Jim Lin db93facfb0 pinctrl: Fix two deadlocks
This patch is to fix two deadlock cases.
Deadlock 1:
CPU #1
 pinctrl_register-> pinctrl_get ->
 create_pinctrl
 (Holding lock pinctrl_maps_mutex)
 -> get_pinctrl_dev_from_devname
 (Trying to acquire lock pinctrldev_list_mutex)
CPU #0
 pinctrl_unregister
 (Holding lock pinctrldev_list_mutex)
 -> pinctrl_put ->> pinctrl_free ->
 pinctrl_dt_free_maps -> pinctrl_unregister_map
 (Trying to acquire lock pinctrl_maps_mutex)

Simply to say
CPU#1 is holding lock A and trying to acquire lock B,
CPU#0 is holding lock B and trying to acquire lock A.

Deadlock 2:
CPU #3
 pinctrl_register-> pinctrl_get ->
 create_pinctrl
 (Holding lock pinctrl_maps_mutex)
 -> get_pinctrl_dev_from_devname
 (Trying to acquire lock pinctrldev_list_mutex)
CPU #2
 pinctrl_unregister
 (Holding lock pctldev->mutex)
 -> pinctrl_put ->> pinctrl_free ->
 pinctrl_dt_free_maps -> pinctrl_unregister_map
 (Trying to acquire lock pinctrl_maps_mutex)
CPU #0
 tegra_gpio_request
 (Holding lock pinctrldev_list_mutex)
 -> pinctrl_get_device_gpio_range
 (Trying to acquire lock pctldev->mutex)

Simply to say
CPU#3 is holding lock A and trying to acquire lock D,
CPU#2 is holding lock B and trying to acquire lock A,
CPU#0 is holding lock D and trying to acquire lock B.

Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:20:33 +01:00
Doug Anderson 53b1bfc76d pinctrl: rockchip: Avoid losing interrupts when supporting both edges
I was seeing cases where I was losing interrupts when inserting and
removing SD cards.  Sometimes the card would get "stuck" in the
inserted state.

I believe that the problem was related to the code to handle the case
where we needed both rising and falling edges.  This code would
disable the interrupt as the polarity was switched.  If an interrupt
came at the wrong time it could be lost.

We'll match what the gpio-dwapb.c driver does upstream and change the
interrupt polarity without disabling things.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:20:32 +01:00
Soren Brinkmann 7382b62315 pinctrl: qcom-spmi-gpio: Migrate to pinconf-generic
Instead of the driver caring about implementation details like device
tree, just provide information about driver specific pinconf parameters
to pinconf-generic which takes care of parsing the DT.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-14 14:10:09 +01:00
Soren Brinkmann add958cee9 pinctrl: Add driver for Zynq
This adds a pin-control driver for Zynq.

Changes since v2:
- driver-specific DT properties are passed to the core in two arrays,
  one for the actual DT parsing one for the debugfs representation.
  Issue a compiler warning when the number of entries is not the same
  for both arrays.

Changes since v1:
 - fix EMIO_SD1_CD pin name
 - add USB to pinmux options

changes since RFCv2:
 - let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is
   present in DT but no driver available.
 - add #defines to get rid of magical constants
 - add commas at end of initializers
 - separate changes in mach-zynq in separate patch
 - add driver specific io-standard DT property
 - refactored pinconf set function to not require arguments for
   argument-less properties
 - squash other patches in
   - support for IO-standard property
   - support for low-power mode property
   - migration to pinconf_generic_dt_node_to_map_all()
 - use newly created infrastructure to add pass driver-specific DT
   params to pinconf-generic

changes since RFC:
 - use syscon/regmap to access registers in SLCR space
 - rebase to 3.18: rename enable -> set_mux
 - add kernel-doc
 - support pinconf
   - supported attributes
     - pin-bias: pull up, tristate, disable
     - slew-rate: 0 == slow, 1 == fast; generic pinconf does not display
       argument

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-11 22:35:19 +01:00
Soren Brinkmann dd4d01f7ba pinctrl: pinconf-generic: Allow driver to specify DT params
Additionally to the generic DT parameters, allow drivers to provide
driver-specific DT parameters to be used with the generic parser
infrastructure.

To achieve this 'struct pinctrl_desc' is extended to pass custom pinconf
option to the core. In order to pass this kind of information, the
related data structures - 'struct pinconf_generic_dt_params',
'pin_config_item' - are moved from pinconf internals to the
pinconf-generic header.

Additionally pinconfg-generic is refactored to not only iterate over the
generic pinconf parameters but also take the parameters into account
that are provided through the driver's 'struct pinctrl_desc'.
In particular 'pinconf_generic_parse_dt_config()' and
'pinconf_generic_dump' helpers are split into two parts each. In order
to have a more generic helper that can be used to process the generic
parameters as well as the driver-specific ones.

v2:
 - fix typo
 - add missing documentation for @conf_items member in struct
 - rebase to pinctrl/devel: conflict in abx500
 - rename _pinconf_generic_dump() to pinconf_generic_dump_one()
 - removed '_' from _parse_dt_cfg()
 - removed BUG_ONs, error condition is handled in if statements
 - removed pinconf_generic_dump_group() & pinconf_generic_dump_pin
   helpers
   - fixed up corresponding call sites
   - renamed pinconf_generic_dump() to pinconf_generic_dump_pins()
   - added kernel-doc to pinconf_generic_dump_pins()
 - add kernel-doc
 - more verbose commit message

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-11 22:32:19 +01:00
Soren Brinkmann 31c89c9596 pinctrl: pinconf-generic: Infer map type from DT property
With the new 'groups' property, the DT parser can infer the map type
from the fact whether 'pins' or 'groups' is used to specify the pin
group to work on.

To maintain backwards compatibitliy with current usage of the DT
binding, this is only done when PIN_MAP_TYPE_INVALID is passed to the
parsing function as type.

Also, a new helper 'pinconf_generic_dt_node_to_map_all()' is introduced,
which can be used by drivers as generic callback for dt_node_to_map() to
leverage the new feature.

Changes since v2:
 - rename dt_pin_specifier to subnode_target_type
 - add additional comment in header file explaining passing an invalid
   map type
 - mention map_all() helper in commit message
Changes since RFC v2:
 - none

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-11 22:30:04 +01:00
Linus Walleij e2821bee40 pinctrl: pass -DDEBUG in subdirs
When drivers are compiled in subdirectories the -DDEBUG flag need
to be passed in the individual Makefiles.

Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Suggested-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-10 22:52:01 +01:00
Maxime Ripard a95308d88c pinctrl: mvebu: a38x: Add UART1 muxing options
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1
function.

Add this case to the pinctrl driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-10 22:47:23 +01:00
Wolfram Sang 1ee68af8a5 pinctrl: intel: drop owner assignment from platform_drivers
This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-10 22:47:23 +01:00
Mika Westerberg 9eb457b547 pinctrl: cherryview: Save and restore pin configs over system sleep
Before resuming from system sleep BIOS restores its view of pin
configuration. If we have configured some pins differently from that, for
instance some driver requested a pin as a GPIO but it was not in GPIO mode
originally, our view of the pin configuration will not match the hardware
state anymore.

This patch saves the pin configuration and interrupt mask registers on
suspend and restores them on exit. This should make sure that the
previously configured state is still in effect.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-10 22:47:22 +01:00
Patrice CHOTARD fce7fcc785 pinctrl: st: Add irq_disable hook to st_gpio_irqchip
Currently disable_irq() doesn't work for pinctrl-st driver, due to
missing irq_disable hook in the driver.
disable_irq() is required only for level-triggered interrupts, which
is not the case normally.

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-07 10:44:39 +01:00
Francesco VIRLINZI 96d16c3088 pinctrl: st: avoid multiple mutex lock
Using the sysfs inteface to inspect the pins configuration
the system can walk around a path which acquires the same
mutex twice.

On STiH407 platform, for example :
cat /sys/kernel/debug/pinctrl/920f080.pin-controller-front0/pinconf-pins
hangs the kernel and never returns.

With this patch the mutex is temporary freed.

Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-07 10:43:41 +01:00
Doug Anderson f2dd028c26 pinctrl: rockchip: Fix enable/disable/mask/unmask
The Rockchip pinctrl driver was only implementing the "mask" and
"unmask" operations though the hardware actually has two distinct
things: enable/disable and mask/unmask.  It was implementing the
"mask" operations as a hardware enable/disable and always leaving all
interrupts unmasked.

I believe that the old system had some downsides, specifically:
- (Untested) if an interrupt went off while interrupts were "masked"
  it would be lost.  Now it will be kept track of.
- If someone wanted to change an interrupt back into a GPIO (is such a
  thing sensible?) by calling irq_disable() it wouldn't actually take
  effect.  That's because Linux does some extra optimizations when
  there's no true "disable" function: it does a lazy mask.

Let's actually implement enable/disable/mask/unmask properly.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-12-30 13:17:27 +01:00
Doug Anderson 68bda47c57 pinctrl: rockchip: Handle wakeup pins
The rockchip pinctrl driver was using irq_gc_set_wake() as its
implementation of irq_set_wake() but was totally ignoring everything
that irq_gc_set_wake() did (which is to upkeep gc->wake_active).

Let's fix that by setting gc->wake_active as GPIO_INTEN at suspend
time and restoring GPIO_INTEN at resume time.

NOTE a few quirks when thinking about this patch:
- Rockchip pinctrl hardware supports both "disable/enable" and
  "mask/unmask".  Right now we only use "disable/enable" and present
  those to Linux as "mask/unmask".  This should be OK because
  enable/disable is optional and Linux will implement it in terms of
  mask/unmask.  At the moment we always tell hardware all interrupts
  are unmasked (the boot default).
- At suspend time Linux tries to call "disable" on all interrupts and
  also enables wakeup on all wakeup interrupts.  One would think that
  since "disable" is implemented as "mask" when "disable" isn't
  provided and that since we were ignoring gc->wake_active that
  nothing would have woken us up.  That's not the case since Linux
  "optimizes" things and just leaves interrutps unmasked, assuming it
  could mask them later when they go off.  That meant that at suspend
  time all interrupts were actually being left enabled.

With this patch random non-wakeup interrupts no longer wake the system
up.  Wakeup interrupts still wake the system up.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-12-30 13:17:27 +01:00
Linus Torvalds e6b5be2be4 Driver core patches for 3.19-rc1
Here's the set of driver core patches for 3.19-rc1.
 
 They are dominated by the removal of the .owner field in platform
 drivers.  They touch a lot of files, but they are "simple" changes, just
 removing a line in a structure.
 
 Other than that, a few minor driver core and debugfs changes.  There are
 some ath9k patches coming in through this tree that have been acked by
 the wireless maintainers as they relied on the debugfs changes.
 
 Everything has been in linux-next for a while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core update from Greg KH:
 "Here's the set of driver core patches for 3.19-rc1.

  They are dominated by the removal of the .owner field in platform
  drivers.  They touch a lot of files, but they are "simple" changes,
  just removing a line in a structure.

  Other than that, a few minor driver core and debugfs changes.  There
  are some ath9k patches coming in through this tree that have been
  acked by the wireless maintainers as they relied on the debugfs
  changes.

  Everything has been in linux-next for a while"

* tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits)
  Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries"
  fs: debugfs: add forward declaration for struct device type
  firmware class: Deletion of an unnecessary check before the function call "vunmap"
  firmware loader: fix hung task warning dump
  devcoredump: provide a one-way disable function
  device: Add dev_<level>_once variants
  ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries
  ath: use seq_file api for ath9k debugfs files
  debugfs: add helper function to create device related seq_file
  drivers/base: cacheinfo: remove noisy error boot message
  Revert "core: platform: add warning if driver has no owner"
  drivers: base: support cpu cache information interface to userspace via sysfs
  drivers: base: add cpu_device_create to support per-cpu devices
  topology: replace custom attribute macros with standard DEVICE_ATTR*
  cpumask: factor out show_cpumap into separate helper function
  driver core: Fix unbalanced device reference in drivers_probe
  driver core: fix race with userland in device_add()
  sysfs/kernfs: make read requests on pre-alloc files use the buffer.
  sysfs/kernfs: allow attributes to request write buffer be pre-allocated.
  fs: sysfs: return EGBIG on write if offset is larger than file size
  ...
2014-12-14 16:10:09 -08:00
Linus Torvalds e7cf773d43 USB patches for 3.19-rc1
Here's the big set of USB and PHY patches for 3.19-rc1.
 
 The normal churn in the USB gadget area is in here, as well as xhci and
 other individual USB driver updates.  The PHY tree is also in here, as
 there were dependancies on the USB tree.
 
 All of these have been in linux-next.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB updates from Greg KH:
 "Here's the big set of USB and PHY patches for 3.19-rc1.

  The normal churn in the USB gadget area is in here, as well as xhci
  and other individual USB driver updates.  The PHY tree is also in
  here, as there were dependancies on the USB tree.

  All of these have been in linux-next"

* tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (351 commits)
  arm: omap3: twl: remove usb phy init data
  usbip: fix error handling in stub_probe()
  usb: gadget: udc: missing curly braces
  USB: mos7720: delete some unneeded code
  wusb: replace memset by memzero_explicit
  usbip: remove unneeded structure
  usb: xhci: fix comment for PORT_DEV_REMOVE
  xhci: don't use the same variable for stopped and halted rings current TD
  xhci: clear extra bits from slot context when setting max exit latency
  xhci: cleanup finish_td function
  USB: adutux: NULL dereferences on disconnect
  usb: chipidea: fix platform_no_drv_owner.cocci warnings
  usb: chipidea: Fixed a few typos in comments
  Documentation: bindings: add doc for the USB2 ChipIdea USB driver
  usb: chipidea: add a usb2 driver for ci13xxx
  usb: chipidea: fix phy handling
  usb: chipidea: remove duplicate dev_set_drvdata for host_start
  usb: chipidea: parameter 'mode' isn't needed for hw_device_reset
  usb: chipidea: add controller reset API
  usb: chipidea: remove flag CI_HDRC_REQUIRE_TRANSCEIVER
  ...
2014-12-14 14:57:16 -08:00
Linus Torvalds 980f3c344f This is the bulk of GPIO changes for the v3.19 series:
- A new API that allows setting more than one GPIO at the
   time. This is implemented for the new descriptor-based
   API only and makes it possible to e.g. toggle a clock and
   data line at the same time, if the hardware can do this
   with a single register write. Both consumers and drivers
   need new calls, and the core will fall back to driving
   individual lines where needed. Implemented for the MPC8xxx
   driver initially.
 - Patched the mdio-mux-gpio and the serial mctrl driver
   that drives modems to use the new multiple-setting API
   to set several signals simultaneously.
 - Get rid of the global GPIO descriptor array, and instead
   allocate descriptors dynamically for each GPIO on a certain
   GPIO chip. This moves us closer to getting rid of the
   limitation of using the global, static GPIO numberspace.
 - New driver and device tree bindings for 74xx ICs.
 - New driver and device tree bindings for the VF610 Vybrid.
 - Support the RCAR r8a7793 and r8a7794.
 - Guidelines for GPIO device tree bindings trying to get
   things a bit more strict with the advent of combined
   device properties.
 - Suspend/resume support for the MVEBU driver.
 - A slew of minor fixes and improvements.
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Merge tag 'gpio-v3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull take two of the GPIO updates:
 "Same stuff as last time, now with a fixup patch for the previous
  compile error plus I ran a few extra rounds of compile-testing.

  This is the bulk of GPIO changes for the v3.19 series:

   - A new API that allows setting more than one GPIO at the time.  This
     is implemented for the new descriptor-based API only and makes it
     possible to e.g. toggle a clock and data line at the same time, if
     the hardware can do this with a single register write.  Both
     consumers and drivers need new calls, and the core will fall back
     to driving individual lines where needed.  Implemented for the
     MPC8xxx driver initially

   - Patched the mdio-mux-gpio and the serial mctrl driver that drives
     modems to use the new multiple-setting API to set several signals
     simultaneously

   - Get rid of the global GPIO descriptor array, and instead allocate
     descriptors dynamically for each GPIO on a certain GPIO chip.  This
     moves us closer to getting rid of the limitation of using the
     global, static GPIO numberspace

   - New driver and device tree bindings for 74xx ICs

   - New driver and device tree bindings for the VF610 Vybrid

   - Support the RCAR r8a7793 and r8a7794

   - Guidelines for GPIO device tree bindings trying to get things a bit
     more strict with the advent of combined device properties

   - Suspend/resume support for the MVEBU driver

   - A slew of minor fixes and improvements"

* tag 'gpio-v3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (33 commits)
  gpio: mcp23s08: fix up compilation error
  gpio: pl061: document gpio-ranges property for bindings file
  gpio: pl061: hook request if gpio-ranges avaiable
  gpio: mcp23s08: Add option to configure IRQ output polarity as active high
  gpio: fix deferred probe detection for legacy API
  serial: mctrl_gpio: use gpiod_set_array function
  mdio-mux-gpio: Use GPIO descriptor interface and new gpiod_set_array function
  gpio: remove const modifier from gpiod_get_direction()
  gpio: remove gpio_descs global array
  gpio: mxs: implement get_direction callback
  gpio: em: Use dynamic allocation of GPIOs
  gpio: Check if base is positive before calling gpio_is_valid()
  gpio: mcp23s08: Add simple IRQ support for SPI devices
  gpio: mcp23s08: request a shared interrupt
  gpio: mcp23s08: Do not free unrequested interrupt
  gpio: rcar: Add r8a7793 and r8a7794 support
  gpio-mpc8xxx: add mpc8xxx_gpio_set_multiple function
  gpiolib: allow simultaneous setting of multiple GPIO outputs
  gpio: mvebu: add suspend/resume support
  gpio: gpio-davinci: remove duplicate check on resource
  ..
2014-12-14 14:05:05 -08:00
Linus Torvalds a7cb7bb664 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial tree update from Jiri Kosina:
 "Usual stuff: documentation updates, printk() fixes, etc"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (24 commits)
  intel_ips: fix a type in error message
  cpufreq: cpufreq-dt: Move newline to end of error message
  ps3rom: fix error return code
  treewide: fix typo in printk and Kconfig
  ARM: dts: bcm63138: change "interupts" to "interrupts"
  Replace mentions of "list_struct" to "list_head"
  kernel: trace: fix printk message
  scsi: mpt2sas: fix ioctl in comment
  zbud, zswap: change module author email
  clocksource: Fix 'clcoksource' typo in comment
  arm: fix wording of "Crotex" in CONFIG_ARCH_EXYNOS3 help
  gpio: msm-v1: make boolean argument more obvious
  usb: Fix typo in usb-serial-simple.c
  PCI: Fix comment typo 'COMFIG_PM_OPS'
  powerpc: Fix comment typo 'CONIFG_8xx'
  powerpc: Fix comment typos 'CONFiG_ALTIVEC'
  clk: st: Spelling s/stucture/structure/
  isci: Spelling s/stucture/structure/
  usb: gadget: zero: Spelling s/infrastucture/infrastructure/
  treewide: Fix company name in module descriptions
  ...
2014-12-12 10:08:06 -08:00
Linus Torvalds c1b30e4d94 Pin control changes for the v3.19 series:
- Force conversion of the ux500 pin control device trees
   and parsers to use the generic pin control bindings.
 - New driver and device tree bindings for the Qualcomm
   PMIC MPP pin controller and GPIO.
 - Some ACPI infrastructure for pin controllers.
 - New driver for the Intel CherryView/Braswell pin controller,
   the first Intel pin controller to fully take advantage of
   the pin control subsystem.
 - Support the Freescale i.MX VF610 variant.
 - Support the sunxi A80 variant.
 - Support the Samsung Exynos 4415 and Exynos 7 variants.
 - Split out Intel pin controllers to their own subdirectory.
 - A large slew of rockchip pin control updates, including
   suspend/resume support.
 - A large slew of Samsung Exynos pin controller updates.
 - Various minor updates and fixes.
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Merge tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "Here is a stash of pin control changes I have collected for the v3.19
  series.  Mainly new hardware support, with Intels new embedded SoC as
  the especially interesting thing standing out, fully using the
  subsystem.

   - Force conversion of the ux500 pin control device trees and parsers
     to use the generic pin control bindings.
   - New driver and device tree bindings for the Qualcomm PMIC MPP pin
     controller and GPIO.
   - Some ACPI infrastructure for pin controllers.
   - New driver for the Intel CherryView/Braswell pin controller, the
     first Intel pin controller to fully take advantage of the pin
     control subsystem.
   - Support the Freescale i.MX VF610 variant.
   - Support the sunxi A80 variant.
   - Support the Samsung Exynos 4415 and Exynos 7 variants.
   - Split out Intel pin controllers to their own subdirectory.
   - A large slew of rockchip pin control updates, including
     suspend/resume support.
   - A large slew of Samsung Exynos pin controller updates.
   - Various minor updates and fixes"

* tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (49 commits)
  pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show
  pinctrl: meson: add device tree bindings documentation
  gpio: tz1090: Fix error handling of irq_of_parse_and_map
  pinctrl: tz1090-pinctrl.txt: Fix typo in binding
  pinctrl: pinconf-generic: Declare dt_params/conf_items const
  pinctrl: exynos: Add support for Exynos4415
  pinctrl: exynos: Add initial driver data for Exynos7
  pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
  pinctrl: exynos: Consolidate irq domain callbacks
  pinctrl: exynos: Generalize the eint16_31 demux code
  pinctrl: samsung: Separate per-bank init and runtime data
  pinctrl: samsung: Constify samsung_pin_ctrl struct
  pinctrl: samsung: Constify samsung_pin_bank_type struct
  pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct
  pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR()
  pinctrl: Add Intel Cherryview/Braswell pin controller support
  gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod()
  pinctrl: Fix path error in documentation
  pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume
  pinctrl: rockchip: add suspend/resume functions
  ...
2014-12-11 10:43:14 -08:00