Commit Graph

207 Commits

Author SHA1 Message Date
Thomas Gleixner
e4ec7989b4 MIPS: Convert the irq functions to the new names
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:07 +02:00
Thomas Gleixner
9efbc3fba2 MIPS: alchemy: Use proper irq accessors
This really starts to be a sysiphean task.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:07 +02:00
Thomas Gleixner
d24c1a26ca MIPS: Alchemy: Convert to new irq chip functions
Fix the deadlock in set_type() while at it:

The code called set_irq_chip_and_handler_name() resp. set_irq_chip()
from the set_type() callback. That only works on UP and lock debugging
disabled. Otherwise it would dead lock on desc->lock.

__irq_set_chip_handler_name_locked() avoids that.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2173/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25 18:45:14 +01:00
Florian Fainelli
9ced975711 MIPS: Alchemy: Fix reset for MTX-1 and XXS1500
Since commit 32fd6901 (MIPS: Alchemy: get rid of common/reset.c)
Alchemy-based boards use their own reset function. For MTX-1 and XXS1500,
the reset function pokes at the BCSR.SYSTEM_RESET register, but this does
not work. According to Bruno Randolf, this was not tested when written.

Previously, the generic au1000_restart() routine called the board specific
reset function, which for MTX-1 and XXS1500 did not work, but finally made
a jump to the reset vector, which really triggers a system restart. Fix
reboot for both targets by jumping to the reset vector.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2093/
Acked-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:28 +01:00
Florian Fainelli
bf3a1eb859 MIPS: MTX-1: Make au1000_eth probe all PHY addresses
When au1000_eth probes the MII bus for PHY address, if we do not set
au1000_eth platform data's phy_search_highest_address, the MII probing
logic will exit early and will assume a valid PHY is found at address 0.
For MTX-1, the PHY is at address 31, and without this patch, the link
detection/speed/duplex would not work correctly.

CC: stable@kernel.org
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2111/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:27 +01:00
John Stultz
75c4fd8c78 mips: convert to clocksource_register_hz/khz
This converts the mips clocksources to use clocksource_register_hz/khz

CC: Ralf Baechle <ralf@linux-mips.org>
CC: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <johnstul@us.ibm.com>
2011-02-21 13:33:50 -08:00
Jiri Kosina
4b7bd36470 Merge branch 'master' into for-next
Conflicts:
	MAINTAINERS
	arch/arm/mach-omap2/pm24xx.c
	drivers/scsi/bfa/bfa_fcpim.c

Needed to update to apply fixes for which the old branch was too
outdated.
2010-12-22 18:57:02 +01:00
Manuel Lauss
cf745a39dc MIPS: Alchemy: fix build with SERIAL_8250=n
In commit 7d172bfe ("Alchemy: Add UART PM methods") I introduced
platform PM methods which call a function of the 8250 driver;
this patch works around link failures when the kernel is built
without 8250 support.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1737/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16 18:11:01 +00:00
Yoichi Yuasa
690ca2ce0c MIPS: Alchemy: Add return value check for strict_strtoul()
arch/mips/alchemy/devboards/prom.c: In function 'prom_init':
arch/mips/alchemy/devboards/prom.c:60: error: ignoring return value of
'strict_strtoul', declared with attribute warn_unused_result

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16 18:10:55 +00:00
Lionel Debroux
2f55ac072f suspend: constify platform_suspend_ops
While at it, fix two checkpatch errors.
Several non-const struct instances constified by this patch were added after
the introduction of platform_suspend_ops in checkpatch.pl's list of "should
be const" structs (79404849e9).

Patch against mainline.
Inspired by hunks of the grsecurity patch, updated for newer kernels.

Signed-off-by: Lionel Debroux <lionel_debroux@yahoo.fr>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-16 14:14:02 +01:00
Uwe Kleine-König
b595076a18 tree-wide: fix comment/printk typos
"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-01 15:38:34 -04:00
Linus Torvalds
33081adf8b Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (365 commits)
  ALSA: hda - Disable sticky PCM stream assignment for AD codecs
  ALSA: usb - Creative USB X-Fi volume knob support
  ALSA: ca0106: Use card specific dac id for mute controls.
  ALSA: ca0106: Allow different sound cards to use different SPI channel mappings.
  ALSA: ca0106: Create a nice spot for mapping channels to dacs.
  ALSA: ca0106: Move enabling of front dac out of hardcoded setup sequence.
  ALSA: ca0106: Pull out dac powering routine into separate function.
  ALSA: ca0106 - add Sound Blaster 5.1vx info.
  ASoC: tlv320dac33: Use usleep_range for delays
  ALSA: usb-audio: add Novation Launchpad support
  ALSA: hda - Add workarounds for CT-IBG controllers
  ALSA: hda - Fix wrong TLV mute bit for STAC/IDT codecs
  ASoC: tpa6130a2: Error handling for broken chip
  ASoC: max98088: Staticise m98088_eq_band
  ASoC: soc-core: Fix codec->name memory leak
  ALSA: hda - Apply ideapad quirk to Acer laptops with Cxt5066
  ALSA: hda - Add some workarounds for Creative IBG
  ALSA: hda - Fix wrong SPDIF NID assignment for CA0110
  ALSA: hda - Fix codec rename rules for ALC662-compatible codecs
  ALSA: hda - Add alc_init_jacks() call to other codecs
  ...
2010-10-25 08:32:05 -07:00
Takashi Iwai
aa5c14d5c0 Merge branch 'topic/asoc' into for-linus
Conflicts:
	arch/powerpc/platforms/85xx/p1022_ds.c
2010-10-25 10:00:30 +02:00
Linus Torvalds
73ecf3a6e3 Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (49 commits)
  serial8250: ratelimit "too much work" error
  serial: bfin_sport_uart: speed up sport RX sample rate to be 3% faster
  serial: abstraction for 8250 legacy ports
  serial/imx: check that the buffer is non-empty before sending it out
  serial: mfd: add more baud rates support
  jsm: Remove the uart port on errors
  Alchemy: Add UART PM methods.
  8250: allow platforms to override PM hook.
  altera_uart: Don't use plain integer as NULL pointer
  altera_uart: Fix missing prototype for registering an early console
  altera_uart: Fixup type usage of port flags
  altera_uart: Make it possible to use Altera UART and 8250 ports together
  altera_uart: Add support for different address strides
  altera_uart: Add support for getting mapbase and IRQ from resources
  altera_uart: Add support for polling mode (IRQ-less)
  serial: Factor out uart_poll_timeout() from 8250 driver
  serial: mark the 8250 driver as maintained
  serial: 8250: Don't delay after transmitter is ready.
  tty: MAINTAINERS: add drivers/serial/jsm/ as maintained driver
  vcs: invoke the vt update callback when /dev/vcs* is written to
  ...
2010-10-22 19:59:04 -07:00
Manuel Lauss
7d172bfefb Alchemy: Add UART PM methods.
Custom UART PM hook for Alchemy chips:  do standard UART pm and
additionally en/disable uart block clocks as needed.
This allows to get rid of a debug port PM hack in the Alchemy pm code.

Tested on Db1200.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-10-22 10:20:09 -07:00
David Howells
ca4d3e6746 MIPS: Add missing #inclusions of <linux/irq.h>
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should
really include it.  Note that this can replace #inclusions of <asm/irq.h>.

This is required for the patch to sort out irqflags handling function naming to
compile on MIPS.

The problem is that these files require access to things like setup_irq() -
which isn't available by #including <linux/interrupt.h>

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-07 14:08:54 +01:00
Manuel Lauss
2b877a3ff4 MIPS: Alchemy: Resolve prom section mismatches
The function prom_init_cmdline() references the variable __initdata
arcs_cmdline.

The function prom_get_ethernet_addr() references the variable __initdata
arcs_cmdline.

Annotate prom_init_cmdline() as __init, unexport and annotate
prom_get_ethernet_addr() since it's no longer called from within
driver code.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1547/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-04 18:33:59 +01:00
Manuel Lauss
ffc4fdbbe1 ASoC: fix au1x platform
This patch fixes up the au1x audio platform after the multi-component
merge:
- compile fixes and updates to get DB1200 platform audio working again,
- removal of global variables in AC97/I2S/DMA(PCM) modules.

The AC97 part is limited to one instance only for now due to issues
with getting at driver data in the soc_ac97_ops.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2010-08-31 13:06:31 +01:00
Ralf Baechle
d7674c4f58 MIPS: Ritually kill stupid printk.
This belongs into userland.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:27 +01:00
Wolfgang Grandegger
cb8f55b920 MIPS: Alchemy: Add basic support for the GPR board
From: Wolfgang Grandegger <wg@denx.de>

Add basic support for the General Purpose Router (GPR) board from
Trapeze ITS.

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:09 +01:00
Manuel Lauss
f66736532a MIPS: au1000_eth: Get ethernet address from platform_data
au1000_eth uses firmware calls to get a valid MAC address, and changes
it depending on platform device id.  This patch moves this logic out of
the driver into the platform device registration part, where boards with
supported chips can use whatever firmware interface they need; the default
implementation maintains compatibility with existing, YAMON-based firmware.

Tested-by: Wolfgang Grandegger <wg@denx.de>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1481/
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:09 +01:00
Manuel Lauss
12bf3f24e0 SERIAL: 8250: Remove SERIAL_8250_AU1X00
Remove the SERIAL_8250_AU1X00 config symbol.  Instead, use the MIPS_ALCHEMY
one which is always defined when building an Au1x00-based platform.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Linux-serial <linux-serial@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This one depends on a previous patch (which removes SOC_AU1X00 and changes
MACH_ALCHEMY) to apply cleanly (and then actually work), so I'd love for
this to go in via the mips tree.
2010-08-05 13:26:07 +01:00
Manuel Lauss
42a4f17dc3 MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY
Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done
by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:06 +01:00
Bruno Randolf
b3b3c176d9 MIPS: MTX-1: cleanup and comments
Add some comments about mtx1_pci_idsel() and remove a dead block of old code.

Signed-off-by: Bruno Randolf <br1@einfach.org>
To: linux-mips@linux-mips.org
To: manuel.lauss@googlemail.com
Cc: florian@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/1449/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:05 +01:00
Christoph Egger
9b98031e67 MIPS: Alchemy: Remove dead CONFIG_SOC_AU1000_FREQUENCY
CONFIG_SOC_AU1000_FREQUENCY doesn't exist in Kconfig, therefore
removing all references for it from the source code.

Signed-off-by: Christoph Egger <siccegge@cs.fau.de>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Cc: vamos@i4.informatik.uni-erlangen.de
Patchwork: https://patchwork.linux-mips.org/patch/1367/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:00 +01:00
Manuel Lauss
baf3eb233d MIPS: Move Alchemy Makefile parts to their own Platform file.
[Ralf: Remove a forgotten -Werror in Pb1200 Makefile.]

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
Patchwork: https://patchwork.linux-mips.org/patch/1319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:46 +01:00
FUJITA Tomonori
25c8f83864 MIPS: Alchemy: fix deprecated compile warnings
Replace deprecated DMA_32BIT_MASK with DMA_BIT_MASK.  This is needed because
the new style platform makefiles will enable -Werror.

cc1: warnings being treated as errors
arch/mips/alchemy/devboards/db1200/platform.c:219: error: 'DMA_nnBIT_MASK' is deprecated
arch/mips/alchemy/devboards/db1200/platform.c:226: error: 'DMA_nnBIT_MASK' is deprecated
arch/mips/alchemy/devboards/db1200/platform.c:388: error: 'DMA_nnBIT_MASK' is deprecated
arch/mips/alchemy/devboards/db1200/platform.c:393: error: 'DMA_nnBIT_MASK' is deprecated

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
To: linux-mips@linux-mips.org
Acked-by: Manuel Lauss <manuel.lauss@googlemail.com>
Patchwork: https://patchwork.linux-mips.org/patch/1427/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:46 +01:00
Manuel Lauss
4767d7ddbb MIPS: Alchemy: move boards over to obj-y
Preparatory step for moving Alchemy over to new  MIPS Platform
build system support.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:46 +01:00
Ralf Baechle
36f217d9df MIPS: MTX1: Fix build.
CC      arch/mips/alchemy/mtx-1/board_setup.o
{standard input}: Assembler messages:
{standard input}:263: Error: opcode not supported on this processor: mips1 (mips1) `sync'
{standard input}:274: Error: opcode not supported on this processor: mips1 (mips1) `sync'
{standard input}:296: Error: opcode not supported on this processor: mips1 (mips1) `sync'
[...]

Any .set mipsX statement other than .set mips0 at the end of inline
assembler is a big fat bug.

Introduced by 9482eabeca315c0276ffb50026b7482481b7097b (linux-mips.org) rsp.
32fd6901a6 (kernel.org).

While at it, fix the same issue in

  arch/mips/alchemy/devboards/pb1000/board_setup.c
  arch/mips/alchemy/xxs1500/board_setup.c

as well.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:40 +01:00
Wolfgang Grandegger
0d5977d652 MIPS: Alchemy: Define eth platform devices in the correct order
Currently, the eth devices are probed in the inverse order, first
au1xxx_eth1_device and then au1xxx_eth0_device. On the GPR board,
this makes trouble:

  # ifconfig|grep HWaddr
  eth0      Link encap:Ethernet  HWaddr 00:50:C2:0C:30:01
  eth1      Link encap:Ethernet  HWaddr 66:22:01:80:38:10

A bogous ethernet hwaddr is assigned to the first device and
au1xxx_eth0_device is mapped to eth1, which even does not work
properly. With this patch, the problems are gone:

  # ifconfig|grep HWaddr
  eth0      Link encap:Ethernet  HWaddr 66:22:11:32:38:10
  eth1      Link encap:Ethernet  HWaddr 66:22:11:32:38:11

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1473/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-26 19:08:19 +01:00
Bruno Randolf
98a0f86a54 MIPS: MTX-1: Fix PCI on the MeshCube and related boards
This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1:
Use linux gpio api." (bb706b28bb) which broke
PCI bus operation. The problem is caused by alchemy_gpio2_enable() which
resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected
to GPIO2 and they obviously do not to like the reset. Since GPIO2 is
correctly initialized by the boot monitor (YAMON) it is not necessary to
call this function, so just remove it.

Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid
problems in case gpiolib gets initialized after PCI. And since alchemy
gpio_set_value() calls au_sync() we don't have to au_sync() again later.

Signed-off-by: Bruno Randolf <br1@einfach.org>
To: linux-mips@linux-mips.org
To: manuel.lauss@googlemail.com
Patchwork: https://patchwork.linux-mips.org/patch/1448/
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-26 19:08:17 +01:00
Manuel Lauss
2e93d1ec08 MIPS: Alchemy: sleepcode without compile-time cputype dependencies
Split the low-level sleepcode into per-cpu functions instead of
relying on compile-time-defined cpu type.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1281/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:30 +01:00
Manuel Lauss
96d660c482 MIPS: Alchemy: add sysdev for DBDMA PM.
Add a sysdev for DBDMA PM.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1119/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
0f0d85bcc3 MIPS: Alchemy: add sysdev for IRQ PM.
Use a sysdev to implement PM methods for the Au1000 interrupt controllers.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1114/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
7b5fcd694d MIPS: Alchemy: Fix up residual devboard poweroff/reboot code.
Clean out stray unused board_reset() calls in pb1x boards, the PB1000 is
different from the rest and gets private methods.

(Cleanup after 32fd6901a6)

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1085/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
0000a53901 MIPS: DB1200: PCMCIA card detection must not be auto-enabled.
Same issues as SD card detection:  One of both is always triggering and the
handlers take care to shut it up and enable the other.  To avoid messages
about "unbalanced interrupt enable/disable" they must not be automatically
enabled when initally requested.

This was not an issue with the db1200_defconfig due to fortunate timings;
on a build without network chip support the warnings appear.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1133/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:43 +01:00
Manuel Lauss
d8000beef2 MIPS: Alchemy: DB1200: Remove custom wait implementation
While playing with the out-of-tree MAE driver module, the system would
panic after a while in the db1200 custom wait code after wakeup due to
a clobbered k0 register being used as target address of a store op.

Remove the custom wait implementation and revert back to the Alchemy-
recommended implementation already set as default.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1092/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:22 +01:00
Manuel Lauss
acc4d245a7 MIPS: Alchemy: Fix Au1100 ethernet build failure
Don't define platform info for second mac on au1100 (which only has a
single mac).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1004/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:45 +01:00
Manuel Lauss
570cb456ef MIPS: Alchemy: Repair db1500/bosporus builds
A few hunks somehow ended up outside their #ifdef/endif blocks,
leading to -Werror-induces build failures.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:45 +01:00
Manuel Lauss
11b897cf84 MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area.  Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().

A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.

This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.

Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:43 +01:00
Manuel Lauss
e275ed5ee9 MIPS: Alchemy: devboard PM needs to save CPLD registers.
Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:41 +01:00
Ralf Baechle
da4afffc1d MIPS: Alchemy: Simplify DMA channel allocation code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
2010-02-27 12:53:37 +01:00
Ralf Baechle
1a73f0478a MIPS: Alchemy: Remove time_lock.
The sole user is au1xxx_calc_clock() which is only used in early bootup
where the is no paralellism thus no race condition to protect against.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
2010-02-27 12:53:36 +01:00
Frans Pop
52d7ecd033 MIPS: Remove trailing space in messages
Signed-off-by: Frans Pop <elendil@planet.nl>
To: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:25 +01:00
Yoichi Yuasa
10229f3761 MIPS: Alchemy: Use strlcat() for the command line arguments
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:21 +01:00
Yoichi Yuasa
ae7cbef5e5 MIPS: Alchemy: Remove prom_getcmdline()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/927/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:21 +01:00
Yoichi Yuasa
c63d0cb5fe MIPS: Alchemy: Remove forced command line setting
It is not always used, even if it is available.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:20 +01:00
Manuel Lauss
32fd6901a6 MIPS: Alchemy: get rid of common/reset.c
Implement reset / poweroff in the board code instead.  The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:04 +01:00
Manuel Lauss
ef6c1fd662 MIPS: Alchemy: irq: use runtime CPU type detection
Use runtime CPU detection instead of relying on preprocessor symbols.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:03 +01:00
Manuel Lauss
5d400f5c59 MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus
Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Manuel Lauss
70f82f2c59 MIPS: Alchemy: use runtime cpu detection in GPIO code.
Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Florian Fainelli
66f75ccb85 MIPS: Alchemy: Add au1000-eth platform device
This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: David Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
05ae323180 MIPS/SOUND: Alchemy: DB1200 AC97+I2S audio support.
Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper
reference asoc machine for Alchemy-based systems.  AC97/I2S can be selected
at boot time by setting switch S6.7.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: alsa-devel@alsa-project.org
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
63323ec54a MIPS: Alchemy: Extended DB1200 board support.
Create own directory for DB1200 code and update it with new features.

- SPI support:
  - tmp121 temperature sensor
  - SPI flash on DB1200
- I2C support
  - NE1619 sensor
  - AT24 eeprom
- I2C/SPI can be selected at boot time via switch S6.8
- Carddetect IRQs for SD cards.
- gen_nand based NAND support.
- hexleds count sleep/wake transitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:00 +01:00
Manuel Lauss
206aa6cdad MIPS: Alchemy: physmap-flash for all devboards
Replace the devboard NOR MTD mapping driver with physmap-flash support.
Also honor the "swapboot" switch settings wrt. to the layout of the
NOR partitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:59 +01:00
Manuel Lauss
63ea336b79 MIPS: Alchemy: UARTs are of type 16550A
UART autodetection breaks on the Au1300 but the IP blocks are identical,
at least according to the datasheets.  Help the 8250 driver by passing
on uart type information via platform data.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Florian Fainelli
c55736af44 MIPS: Alchemy: Turn on -Werror for devboards and xss1500
Warnings being suppressed, we can now turn on -Werror for boards which did
not have it already (devboards and xss1500).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Florian Fainelli
32fc0adeb8 MIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup code
This patch fixes warnings due to potentially unused
variables in board setup code or mixed variables
declaration and code (forbidden by ISO C90).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Manuel Lauss
b6e6d120c8 MIPS: Alchemy: get rid of superfluous UART definitions
Remove unused uart bit definitions and base macros.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
8402a1588a MIPS: Alchemy: prom_putchar is board dependent
This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions:  The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.

So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
963accbc82 MIPS: Alchemy: change dbdma to accept physical memory addresses
DMA can only be done from physical addresses; move the "virt_to_phys"
source/destination buffer address translation from the dbdma queueing
functions (since the hardware can only DMA to/from physical addresses)
to their respective users.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
ea071cc705 MIPS: Alchemy: remove dbdma compat macros
Remove dbdma compat macros, move remaining users over to default
queueing functions and -flags.

(Queueing function signature has changed in order to give
 a build failure instead of silent functional changes due
 to the no longer implicitly specified DDMA_FLAGS_IE flag)

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:54 +01:00
Manuel Lauss
f1fc6645a4 MIPS: Alchemy: reduce size of irq dispatcher
By replacing an extra do_IRQ with a goto, the assembly shrinks
from 260 to 212 bytes (gcc-4.3.4).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:53 +01:00
Manuel Lauss
788144656b MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy
variants.  IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.

This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!

Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:53 +01:00
Manuel Lauss
0a0b1295ef MIPS: Alchemy: higher priority for system timer.
Raise RTCMATCH2 interrupt priority in case it is used as the system
timer tick.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
5047201b56 MIPS: Alchemy: Remove USB_DEV_REQ_INT prioritization hack
The Alchemy hardware provides a method to prioritize interrupts
on a controller by assigning them to a differenct core request line.
Assign usb device request interrupt to IC0 Request 0 (which has
highest priority in the core and the dispatcher) and others to
Request 1.  The explicit check for usb device request occurrence
should be obsolete now.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
0273b4efcc MIPS: Alchemy: XXS1500 PCMCIA driver rewrite
Rewritten XXS1500 PCMCIA socket driver, standalone (doesn't depend on
au1000_generic.c) and added carddetect IRQ support.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
27dd65ac9a MIPS: Alchemy: devboards: wire up new PCMCIA driver.
Register the PCMCIA driver on all boards supported by it,
get rid of now-unused pcmcia macros in the board headers
(and subsequently empty pb1100/pb1500 ones).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
66213b3ccf MIPS: PCMCIA: new socket driver for Au1000 demoboards.
New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000),
which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c.
Notable improvements:
        - supports Db1000, DB/PB1100/1500/1550/1200.
        - support for carddetect and statuschange IRQs.
        - pcmcia socket mem/io/attr areas and irqs passed through
          platform resource information.
        - doesn't freeze system during card insertion/ejection like
          the one it replaces.
        - boardtype is automatically detected using BCSR ID register.

Run-tested on the DB1200.

Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
7e50b2b741 MIPS: Alchemy: remove board_init_irq() function.
remove board_init_irq():  On all in-kernel boards it is sufficient to
initialize board interrupts in an arch_initcall by using the default
linux irq functions.

Some small irqmap.c files have been folded into board_setup files.

Run-tested on DB1200; compile-tested on all other affected boards.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
95a437966d MIPS: Alchemy: devboards: factor out PB1200 IRQ cascade code.
Move the PB1200 IRQ cascade code out to the BCSR support code:
upcoming DB1300 support can use it too.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
9bdcf336d0 MIPS: Alchemy: devboard register abstraction
All Alchemy development boards have external CPLDs with a few registers
in them.  They all share an identical register layout with only a few
minor differences (except the PB1000) in bit functions and base
addresses.

This patch
- adds a primitive facility to initialize and use these external
  registers,
- replaces all occurrences of bcsr->xxx accesses with calls to the new
  functions (the pb1200 cascade irq handling code is special).
- collects BCSR register information scattered throughout the board
  headers in a central place.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
22f4bb68b3 MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
DBDMA descriptors need to be located at 32-byte aligned addresses;
however kmalloc in conjunction with the SLAB allocator and
CONFIG_DEBUG_SLUB enabled doesn't deliver any.  The dbdma code works
around that by allocating a larger area and realigning the start
address within it.

When freeing a channel however this adjustment is not taken into
account which results in an oops:

Kernel bug detected[#1]:
[...]
Call Trace:
[<80186010>] cache_free_debugcheck+0x284/0x318
[<801869d8>] kfree+0xe8/0x2a0
[<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c
[<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c
[<80388fa8>] au1xpsc_pcm_close+0x28/0x38
[<80383cb8>] soc_codec_close+0x14c/0x1cc
[<8036dbb4>] snd_pcm_release_substream+0x60/0xac
[<8036dc40>] snd_pcm_release+0x40/0xa0
[<8018c7a8>] __fput+0x11c/0x228
[<80188f60>] filp_close+0x7c/0x98
[<80189018>] sys_close+0x9c/0xe4
[<801022a0>] stack_done+0x20/0x3c

Fix this by recording the address delivered by kmalloc() and using
it as parameter to kfree().

This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB
enabled;  non-debug SLAB, SLUB do return nicely aligned addresses,
debug-enabled SLUB currently panics early in the boot process.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01 20:30:25 +01:00
Julia Lawall
42ecda1ae8 MIPS: Alchemy: Correct code taking the size of a pointer
sizeof(dp) is just the size of the pointer.  Change it to the size of the
referenced structure.

A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression *x;
expression f;
type T;
@@

*f(...,(T)x,...)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Patchwork: http://patchwork.linux-mips.org/patch/789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:31 +01:00
Manuel Lauss
44f2c586a3 MIPS: Alchemy: Fix hang with high-frequency edge interrupts
The handle_edge_irq() flowhandler disables edge int sources which occur
too fast (i.e. another edge comes in before the irq handler function
had a chance to finish).  Currently, the mask_ack() callback does not
ack the edges in hardware, leading to an endless loop in the flowhandler
where it tries to shut up the irq source.

When I rewrote the alchemy IRQ code  I wrongly assumed the mask_ack()
callback was only used by the level flowhandler, hence it omitted the
(at the time pointless) edge acks.  Turned out I was wrong; so here
is a complete mask_ack implementation for Alchemy IC, which fixes
the above mentioned problem.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Ralf Baechle
39d2211d20 MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Roel Kluin
c2e3214907 MIPS: Decrease size of au1xxx_dbdma_pm_regs[][]
There are 16 individual channels (NUM_DBDMA_CHANS) to save/restore plus the
global ddma block config (the +1).  The last register in a channel can be
skipped since it's read-only (at offset 0x18).

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-30 21:47:01 +02:00
Rusty Russell
51c870a2d8 cpumask: remove dangerous CPU_MASK_ALL_PTR, &CPU_MASK_ALL.: mips
(Thanks to Al Viro for reminding me of this, via Ingo)

CPU_MASK_ALL is the (deprecated) "all bits set" cpumask, defined as so:

	#define CPU_MASK_ALL (cpumask_t) { { ... } }

Taking the address of such a temporary is questionable at best,
unfortunately 321a8e9d (cpumask: add CPU_MASK_ALL_PTR macro) added
CPU_MASK_ALL_PTR:

	#define CPU_MASK_ALL_PTR (&CPU_MASK_ALL)

Which formalizes this practice.  One day gcc could bite us over this
usage (though we seem to have gotten away with it so far).

So replace everywhere which used &CPU_MASK_ALL or CPU_MASK_ALL_PTR
with the modern "cpu_all_mask" (a real struct cpumask *), and remove
CPU_MASK_ALL_PTR altogether.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Ingo Molnar <mingo@elte.hu>
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: Mike Travis <travis@sgi.com>
2009-09-24 09:34:36 +09:30
Manuel Lauss
a7bcb1ae60 MIPS: Alchemy: override loops_per_jiffy detection
loops_per_jiffy depends on coreclk speed;  preset it instead of
letting the kernel waste precious microseconds trying to approximate it.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
Manuel Lauss
2882b0c63a MIPS: Alchemy: get rid of allow_au1k_wait
Eliminate the 'allow_au1k_wait' variable.  MIPS kernel installs the
Alchemy-specific wait code before timer initialization;  if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.

As a sideeffect, the 'wait instruction available' output in
/proc/cpuinfo now correctly indicates whether 'wait' is usable.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:50 +02:00
Florian Fainelli
a1b021d399 MIPS: MTX-1: Request button GPIO before setting its direction
This patch fixes the following warning at boot time:
WARNING: at drivers/gpio/gpiolib.c:83 0x8021d5e0()
autorequest GPIO-207
Modules linked in:
Call Trace:[<8011e0ec>] 0x8011e0ec
[<80110a28>] 0x80110a28
[<80110a28>] 0x80110a28
[..snip..]

The current code does not request the GPIO and attempts
to set its direction, which is a violation of the GPIO API.
This patch also unhardcode the GPIO we request and use
the one we defined in the button driver.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:46 +01:00
Manuel Lauss
ce65cc8fe2 MIPS: Alchemy: devboards: Convert to gpio calls.
Replace a few open-coded GPIO register accesses with gpio calls.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:29 +01:00
Manuel Lauss
b6c9f10517 MIPS: Alchemy: xxs1500: use linux gpio api.
Replace a few GPIO register accesses in the board init code with calls to
the gpio api.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:29 +01:00
Manuel Lauss
bb706b28bb MIPS: Alchemy: MTX-1: Use linux gpio api.
Replace a few GPIO register accesses in the board init code with calls
to the gpio api.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:28 +01:00
Manuel Lauss
51e02b02e6 MIPS: Alchemy: Rewrite GPIO support.
The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases.  To address this, the following changes are made:

* create generic functions which deal with manipulating the on-chip
  GPIO1/2 blocks.  Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.

  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
  compatibility by directly inlining the GPIO1/2 functions.  GPIO access
  is limited to on-chip ones and they can be accessed as documented in
  the datasheets (GPIO0-31 and 200-215).

  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
  one for GPIO2, are registered.  GPIOs can still be accessed by using
  the numberspace established in the databooks.

  However this is not yet flexible enough for my uses:  My Alchemy
  systems have a documented "external" gpio interface (fixed, different
  numberspace) and can support a variety of baseboards, some of which
  are equipped with I2C gpio expanders.  I want to be able to provide
  the default 16 GPIOs of the CPU board numbered as 0..15 and also
  support gpio expanders, if present, starting as gpio16.

  To achieve this, a new Kconfig symbol for Alchemy is introduced,
  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
  that they don't want the Alchemy numberspace exposed to the outside
  world, but instead want to provide their own.  Boards are now respon-
  sible for providing the linux gpio interface glue code (either in a
  custom gpio.h header (in board include directory) or with gpio_chips).

  To make the board-specific inlined gpio functions work, the MIPS
  Makefile must be changed so that the mach-au1x00/gpio.h header is
  included _after_ the board headers, by moving the inclusion of
  the mach-au1x00/ to the end of the header list.

  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:28 +01:00
Manuel Lauss
ad058e95f9 MIPS: Alchemy: Timer build fix
Fix breakage introduced by 8e19608e8b.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-05-14 13:50:27 +01:00
Yang Hongyang
284901a90a dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)

Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:11 -07:00
Manuel Lauss
91e8a30e90 MIPS: Alchemy: PB1200: use SMC91X platform data.
Add platform data for the smc91x on the PB1200/DB1200, and remove the
now unused AU1X00 entry in smc91x.h.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
2009-03-30 14:49:46 +02:00
Ralf Baechle
c87e09096d MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
__do_IRQ() is deprecated and will go away.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30 14:49:44 +02:00
Florian Fainelli
47c969ee54 MIPS: Au1000: convert to using gpiolib
This patch converts the GPIO board code to use gpiolib.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-03-30 14:49:42 +02:00
Roel Kluin
4b0d3f5c28 MIPS: Alchemy: In plat_time_init() t reaches -1, tested: 0
With a postfix decrement t reaches -1 rather than 0, so the fall-back will
not occur.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: mano@roarinelk.homelinux.net
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-02-27 17:56:34 +00:00
Manuel Lauss
2d2eca4d11 MIPS: Alchemy: time.c build fix
In Linus' current -git the cpumask member is now a pointer.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:01 +00:00
Manuel Lauss
61f9c58da5 MIPS: Alchemy: new userspace suspend interface for development boards.
Replace the current sysctl-based suspend interface with a new sysfs-
based one which also uses the Linux-2.6 suspend model.

To configure wakeup sources, a subtree for the demoboards is created
under /sys/power/db1x:

sys/
`-- power
    `-- db1x
        |-- gpio0
        |-- gpio1
        |-- gpio2
        |-- gpio3
        |-- gpio4
        |-- gpio5
        |-- gpio6
        |-- gpio7
        |-- timer
        |-- timer_timeout
        |-- wakemsk
        `-- wakesrc

The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2
bits of the SYS_WAKEMSK (wakeup source enable) register.  Writing '1'
enables a wakesource, 0 disables it.

The 'timer_timeout' node holds the timeout in seconds after which the
TOYMATCH2 event should wake the system.

The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex),
the 'wakemsk' node can be used to get/set the wakeup mask directly.

For example, to have the timer wake the system after 10 seconds of sleep,
the following must be done in userspace:

echo 10 > /sys/power/db1x/timer_timeout
echo 1 > /sys/power/db1x/timer
echo mem > /sys/power/sleep

This patch also removes the homebrew CPU frequency switching code.  I don't
understand how it could have ever worked reliably; it does not communicate
the clock changes to peripheral devices other than uarts.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 arch/mips/alchemy/devboards/pm.c
2009-01-11 09:57:27 +00:00
Manuel Lauss
ac15dad061 MIPS: Alchemy: dbdma suspend/resume support.
Implement suspend/resume for DBDMA controller and its channels.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
564365b0fc MIPS: Alchemy: Fix up PM code on Au1550/Au1200
Au1550/Au1200 have a different memory controller which requires additi-
onal code to properly put memory to sleep (code taken from AMD/RMI's
Linux-2.6.11 source package).

Also fix up the remaining pm-related paths to compile on Au1200/Au1550
platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
2699cdfb76 MIPS: Alchemy: move calc_clock function.
Now that nothing in time.c depends on calc_clock, it can
be moved to clocks.c where it belongs.
While at it, give it a better non-generic name and call it
as soon as possible in plat_mem_init.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
0c694de12b MIPS: Alchemy: RTC counter clocksource / clockevent support.
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent
device.  As a nice side effect, this also enables use of the 'wait'
instruction for runtime idle power savings.

If the counters aren't enabled/working properly, fall back on the
cp0 counter clock code.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
Manuel Lauss
074cf65670 MIPS: Alchemy: remove cpu_table.
Remove the cpu_table:
- move detection of whether c0_config[OD] is read-only and should be set
  to fix various chip errata to au1000 headers.
- move detection of write-only sys_cpupll to au1000 headers.
- remove the BCLK switching code:  Activation of this features should be
  left to the boards using the chips since it also affects external devices
  tied to BCLK, and only the board designers know whether it is safe to
  enable.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/cputable.c
2009-01-11 09:57:26 +00:00
Manuel Lauss
1820ec1d2b MIPS: Alchemy: remove get/set_au1x00_lcd_clock().
There are no in-tree users, so remove them.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:26 +00:00
Manuel Lauss
197b0d31eb MIPS: Alchemy: pb1200: update CPLD cascade irq handler.
Tested on Db1200.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:26 +00:00
Manuel Lauss
785e3268e2 MIPS: Alchemy: update core interrupt code.
This patch attempts to modernize core Alchemy interrupt handling code.

- add irq_chips for irq controllers instead of irq type,
- add a set_type() hook to change irq trigger type during runtime,
- add a set_wake() hook to control GPIO0..7 based wakeup,
- use linux' IRQF_TRIGGER_ constants instead of homebrew ones,
- enable GENERIC_HARDIRQS_NO__DO_IRQ.
- simplify plat_irq_dispatch
- merge au1xxx_irqmap into irq.c file, the only place where its
  contents are referenced.
- board_init_irq() is now mandatory for every board; use it to register
  the remaining (gpio-based) interrupt sources; update all boards
  accordingly.

Run-tested on Db1200 and other Au1200 based platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
2009-01-11 09:57:26 +00:00
Manuel Lauss
7179380ee9 MIPS: Alchemy: move commandline mangling out of common code
Not every alchemy-based board might want these options forced on it,
and most of this stuff seems to be intended for devboard code anyway.
Remove commandline mangling code out of common chip code and instead
add relevant sections to all in-tree boards to not change existing
behaviour.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:25 +00:00
Manuel Lauss
23ba25d566 MIPS: Alchemy: devboards: consolidate files
Share some code and merge small files:
- Extract the prom init code from all devboard files (they only differ in
  memory configuration).
- Merge the irq configuration into board setup code.
- Merge smaller files into board setup code.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/devboards/db1x00/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1000/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1000/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1100/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1100/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1200/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1500/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1500/irqmap.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1550/init.c
 delete mode 100644 arch/mips/alchemy/devboards/pb1550/irqmap.c
 create mode 100644 arch/mips/alchemy/devboards/prom.c
2009-01-11 09:57:25 +00:00
Manuel Lauss
58e75e86cf MIPS: Alchemy: Move development board code to common subdirectory
This should ease sharing of common devboard code.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:25 +00:00
Julia Lawall
2bd2dd059c MIPS: Alchemy: Change strict_strtol to strict_strtoul
Since memsize is unsigned, it would seem better to use strict_strtoul that
strict_strtol.

A simplified version of the semantic patch that makes this change is as
follows: (http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@s2@
long e;
position p;
@@

strict_strtol@p(...,&e)

@@
position p != s2.p;
type T;
T e;
@@

- strict_strtol@p
+ strict_strtoul
  (...,&e)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:19 +00:00
Manuel Lauss
f591eb1e68 MIPS: Alchemy: Wire up SD controller on DB/PB1200 boards.
Add au1xmmc platform data for PB1200/DB1200 boards and wire up the 2 SD
controllers for them.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-27 16:18:27 +00:00
Ralf Baechle
e8c7c48234 MIPS: Alchemy: rename directory
It's more than the au1000 these days.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-11 16:18:50 +01:00