Commit Graph

50 Commits

Author SHA1 Message Date
Rusty Russell 98a79d6a50 cpumask: centralize cpu_online_map and cpu_possible_map
Impact: cleanup

Each SMP arch defines these themselves.  Move them to a central
location.

Twists:
1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
   CONFIG_INIT_ALL_POSSIBLE for this rather than break them.

2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
   Those archs simply have phys_cpu_present_map replaced everywhere.

3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
   so I just manipulate them both in sync.

4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
   declarations.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Tested-by: Tony Luck <tony.luck@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Mike Travis <travis@sgi.com>
Cc: ink@jurassic.park.msu.ru
Cc: rmk@arm.linux.org.uk
Cc: starvik@axis.com
Cc: tony.luck@intel.com
Cc: takata@linux-m32r.org
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: paulus@samba.org
Cc: schwidefsky@de.ibm.com
Cc: lethal@linux-sh.org
Cc: wli@holomorphy.com
Cc: davem@davemloft.net
Cc: jdike@addtoit.com
Cc: mingo@redhat.com
2008-12-13 21:19:41 +10:30
Kevin D. Kissell 8531a35e5e [MIPS] SMTC: Fix SMTC dyntick support.
Rework of SMTC support to make it work with the new clock event system,
allowing "tickless" operation, and to make it compatible with the use of
the "wait_irqoff" idle loop.  The new clocking scheme means that the
previously optional IPI instant replay mechanism is now required, and has
been made more robust.

Signed-off-by: Kevin D. Kissell <kevink@paralogos.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-03 17:58:58 +01:00
Kevin D. Kissell d2bb01b042 [MIPS] SMTC: Close tiny holes in the SMTC IPI replay system.
Signed-off-by: Kevin D. Kissell <kevink@paralogos.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-03 17:58:58 +01:00
Ralf Baechle b7e4226e4f [MIPS] Build fix: Fix irq flags type
Though from a hardware perspective it would be sensible to use only a
32-bit unsigned int type Linux defines interrupt flags to be stored in
an unsigned long and nothing else.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-03 17:58:56 +01:00
Jens Axboe 2f304c0a0a mips: convert to generic helpers for IPI function calls
This converts mips to use the new helpers for smp_call_function() and
friends, and adds support for smp_call_function_single(). Not tested,
but it compiles.

mips shares the same IPI for smp_call_function() and
smp_call_function_single(), since not all mips platforms have enough
available IPIs to support seperate setups.

Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-06-26 11:22:57 +02:00
Ralf Baechle 39b8d52542 [MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:26 +01:00
Chris Dearman 0bfa130e74 [MIPS] Remove TLB sanitation code
It is not being used by Malta and shouldn't be needed for MIPSsim.
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:25 +01:00
Joe Perches 603e82edf7 arch/mips/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2008-02-03 16:54:53 +02:00
Ralf Baechle 87353d8ac3 [MIPS] SMP: Call platform methods via ops structure.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Kevin D. Kissell be5f1f2114 [MIPS] SMTC: Allow control over TC assignment to vpe0.
Modify the SMTC initialization code to allow boot-time specification not
only of how many VPEs and TCs to use, but also how many TCs out of the
allowed pool are to be bound to VPE 0.  The new boot option is "vpe0tcs=N",
where N is an integer.  Using it in combination with the existing options
allows arbitrary assignments across the 2 VPEs of a 34K.  e.g. "maxtcs=3
 vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4
vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1.  If no vpe0tcs
option is specified, the traditional algorithm of evenly dividing TCs
between available VPEs, with the odd "slop" going to VPE0, is retained.

The reason for doing this is to allow a finer balancing of TCs which can
handle I/O interrupts on Malta (those on VPE 0) and those which cannot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:32 +00:00
Ralf Baechle b5eb551145 [MIPS] Kill num_online_cpus() loops.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:18 +01:00
Ralf Baechle 21a151d8ca [MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle 49a89efbbb [MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle ea5804015c [MIPS] Dyntick support for SMTC:
The kernel currently only supports broadcasting of the timer interrupt
from a single timer, not multicasting into two multicast groups of
processors.  So the implemented mechanism for SMTC works by broadcasting
the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle 7bcf7717b6 [MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle 91a2fcc886 [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle d87d0c930a [MIPS] SMTC: Microoptimize atomic_postincrement for non-weak consistency.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:45:58 +01:00
Kevin D. Kissell f571eff0a2 [MIPS] IRQ Affinity Support for SMTC on Malta Platform
Signed-off-by: Kevin D. Kissell <kevink@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:45:57 +01:00
Ralf Baechle 1146fe3050 [MIPS] SMTC: Make ack_bad_irq() safe with no IM backstop.
Issue reported and original patch by Kevin Kissel, cleaner (imho)
implementation by me.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-24 18:13:02 +01:00
Ralf Baechle fe56b954ea [MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:55 +01:00
Ralf Baechle e119d49ab5 [MIPS] SMTC: Fix modpost warning.
WARNING: vmlinux.o(.text+0xcf54): Section mismatch: reference to .init.text:smp_bootstrap (between 'smtc_boot_secondary' and 'ipi_interrupt')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:27 +01:00
Ralf Baechle 07cc0c9e65 [MIPS] MT: Enable coexistence of AP/SP with VSMP and SMTC.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:24 +01:00
Ralf Baechle efaa534ed1 [MIPS] SMTC: smtc_timer_broadcast ignores its arguments, make it void.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:24 +01:00
Ralf Baechle 97aef63c9f [MIPS] SMTC: Declare static what should be static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:24 +01:00
Ralf Baechle 033890b084 [MIPS] SMTC: Statically initialize irq_ipi[].
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:23 +01:00
Ralf Baechle 8f8771a057 [MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Chris Dearman 8e15a0e35f [MIPS] Count timer interrupts correctly.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:34 +02:00
Ralf Baechle 3b1d4ed535 [MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict.  So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-20 22:27:10 +01:00
Ralf Baechle ef36fc3c5b [MIPS] SMTC: Fix warning.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Roman Zippel c9f4f06d31 wrap access to thread_info
Recently a few direct accesses to the thread_info in the task structure snuck
back, so this wraps them with the appropriate wrapper.

Signed-off-by: Roman Zippel <zippel@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-09 12:30:56 -07:00
Ralf Baechle 8a1e97ee2e [MIPS] SMTC: Fix recursion in instant IPI replay code.
local_irq_restore -> raw_local_irq_restore -> irq_restore_epilog ->
	smtc_ipi_replay -> smtc_ipi_dq -> spin_unlock_irqrestore ->
	_spin_unlock_irqrestore -> local_irq_restore

The recursion does abort when there is no more IPI queued for a CPU, so
this isn't usually fatal which is why we got away with this for so long
until this was discovered by code inspection.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-29 23:46:36 +01:00
Ralf Baechle 20bb25d10f [MIPS] SMTC: Fix false trigger of debug code on single VPE.
Make smtc_setup_irq() update the list of interrupts which need to be
watched by the debug code itself.  Also there is no need to initialize the
IPI swint when running with a single VPE, so don't initialize it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-29 23:46:36 +01:00
Ralf Baechle ae036b7908 [MIPS] SMTC: irq_{enter,leave} and kstats keeping for relayed timer ints.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-29 23:46:35 +01:00
Ralf Baechle c68644d330 [MIPS] Make SMTC_IDLE_HOOK_DEBUG a proper option in Kconfig.debug.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-26 23:06:06 +00:00
Ralf Baechle 5868756dcb [MIPS] SMTC: Make a bunch of functions and variables static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:22 +00:00
Ralf Baechle e0daad449c [MIPS] Whitespace cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:19 +00:00
Ralf Baechle 418451c178 [MIPS] SMTC: remove unused atomic_postclear
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:16 +00:00
Atsushi Nemoto 97dcb82de6 [MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:08 +00:00
Ralf Baechle ec43c01420 [MIPS] SMTC: Fix module build by exporting symbol
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-24 19:23:21 +00:00
Ralf Baechle a0b6218037 [MIPS] SMTC: Fix TLB sizing bug for TLB of 64 >= entries
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-24 19:23:21 +00:00
Ralf Baechle ac8be95504 [MIPS] SMTC: Instant IPI replay.
SMTC pseudo-interrupts between TCs are deferred and queued if the target
TC is interrupt-inhibited (IXMT). In the first SMTC prototypes, these
queued IPIs were serviced on return to user mode, or on entry into the
kernel idle loop. The INSTANT_REPLAY option dispatches them as part of
local_irq_restore() processing, which adds runtime overhead (hence the
option to turn it off), but ensures that IPIs are handled promptly even
under heavy I/O interrupt load.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-23 18:26:47 +00:00
Ralf Baechle c80697b3a0 [MIPS] SMTC: Fix cp0 hazard.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-19 01:08:26 +00:00
Atsushi Nemoto 1417836e81 [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework.  Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.

* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:46 +00:00
Ralf Baechle 64c590b7a6 [MIPS] SMTC: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-01 17:46:09 +00:00
Ralf Baechle 937a801576 [MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08 02:38:28 +01:00
Ralf Baechle 54d0a216f4 [MIPS] Replace board_timer_setup function pointer by plat_timer_setup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-07-13 21:26:17 +01:00
Ralf Baechle 4bf42d4272 [MIPS] SMTC: Reformat to Linux style.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:15 +01:00
Thomas Gleixner f40298fddc [PATCH] irq-flags: MIPS: Use the new IRQF_ constants
Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-02 13:58:47 -07:00
Ingo Molnar 34af946a22 [PATCH] spin/rwlock init cleanups
locking init cleanups:

 - convert " = SPIN_LOCK_UNLOCKED" to spin_lock_init() or DEFINE_SPINLOCK()
 - convert rwlocks in a similar manner

this patch was generated automatically.

Motivation:

 - cleanliness
 - lockdep needs control of lock initialization, which the open-coded
   variants do not give
 - it's also useful for -rt and for lock debugging in general

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-27 17:32:39 -07:00
Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:28 +02:00