Commit Graph

2008 Commits

Author SHA1 Message Date
Dmitri Vorobiev 52b3fc04ba [MIPS] Malta: else should follow close brace in malta_int.c
This patch fixes two errors reported by checkpatch.pl.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev a6352cddc7 [MIPS] Malta: remove a superfluous comment
Using the "We die here" comment right before calling the die()
function is an extremely vivid example of overcommenting.

Remove the redundant comment and save one line.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev 54bf038e22 [MIPS] Malta: include <linux/cpu.h> instead of <asm/cpu.h>
The checkpatch.pl script reported a few warnings about header files.
This patch fixes these warnings.

Compile-tested using the default Malta config.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev 1997267072 [MIPS] Malta, Atlas, Sead: remove an extern from .c files
This patch moves the "extern" declaration for the function
mips_reboot_setup() from the board setup .c files to the
header file include/asm-mips/mips-boards/generic.h.

This fixes a warning produced by the checkpatch.pl script.

No functional changes introduced.

This was compile-tested by building the kernel for all
three boards affected by this change. All builds finished
successfully.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev f807149667 [MIPS] Malta: fix oversized lines in malta_int.c
This patch fixes all "line over 80 characters" warnings found
in arch/mips/mips-boards/malta/malta_int.c by the checkpatch.pl
script.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev 82a1791772 [MIPS] Malta: remove a dead function declaration
Neither is the mips_rtc_get_time() routine defined anywhere in
the MIPS architecture-specific code, nor does anyone call it any
more. This patch removes the extern declaration of this fossil.

This patch does not introduce any functional changes.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:04 +00:00
Dmitri Vorobiev af825586c0 [MIPS] Malta: use tabs not spaces
This patch fixes all "use tabs not spaces" warnings reported by
the checkpatch.pl script on the board-specific files.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Dmitri Vorobiev a382963edc [MIPS] Malta: set up the screen info in a separate function
This patch adds a separate short and sweet function to initialize
the screen_info global variable.

This improves readability of the Malta board setup code.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Dmitri Vorobiev f3a4ce9587 [MIPS] Malta: check the PCI clock frequency in a separate function
This patch adds a separate short and sweet function to check the
PCI clock frequency. This is to improve readability of the Malta
setup code.

Along the way, a couple of coding style violations are fixed.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Dmitri Vorobiev 8216d348e3 [MIPS] Malta: use the KERN_ facility level in printk()
This patch adds the KERN_ macros to printk() calls. Where applicable,
spaces are replaced by tabs.

These changes noticeably reduce the number of errors and warnings
reported by the checkpatch.pl script for the malta_int.c file.

Before the patch: total: 47 errors, 20 warnings, 354 lines checked

After the patch: total: 34 errors, 7 warnings, 355 lines checked

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Dmitri Vorobiev 4ca7651354 [MIPS] Malta: use Linux kernel style for structure initialization
This patch reformats the structure initialization code thus
making the latter look idiomatic.

No functional changes introduced.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Jan Engelhardt 12323cacca [MIPS]: constify function pointer tables
Signed-off-by: Jan Engelhardt <jengelh@computergmbh.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:03 +00:00
Ralf Baechle d4e9cffa16 [MIPS] compat: handle argument endianess of sys32_(f)truncate64 with merge_64
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:02 +00:00
Florian Fainelli 0e8774b621 [MIPS] Cobalt 64-bits kernels can be safely unmarked experimental
64-bits Cobalt kernels run fine.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:02 +00:00
Ralf Baechle 302922e5f6 [MIPS] Qemu: Remove platform.
The Qemu platform was originally implemented to have an easily supportable
platform until Qemu reaches a state where it emulates a real world system.
Since the latest release Qemu is capable of emulating the MIPSsim and
Malta platforms, so this goal has been reached.  The Qemu plaform is also
rather underfeatured so less useful than a Malta emulation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:02 +00:00
Vitaly Wool 9900485893 [MIPS] pnx8xxx: clocksource cleanups
Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:01 +00:00
Daniel Walker 8a39c520b2 [MIPS] Lasat: Convert pvc_sem semaphore to mutex
I also changed the name to pvc_mutex, and moved the define to the file
it's used in which allows it to be static.

Signed-off-by: Daniel Walker <dwalker@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:01 +00:00
Florian Fainelli f6ed10ab97 [MIPS] MTX-1: Add GPIO system button
This patch adds support for the GPIO connected system button on the MTX-1
boards. Default configuration is updated accordingly.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:01 +00:00
Yoichi Yuasa 9c746edb35 [MIPS] move the eXcite local config to excitedirectory
Moved the eXcite local config to excite directory.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Yoichi Yuasa 167da469e5 [MIPS] add cpu_wait() to machine_halt()
Added cpu_wait() to machine_halt().
For the power reduction in halt.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Yoichi Yuasa 71466dd477 [MIPS] remove unneeded button check for reset
Removed unneeded button check for reset.
Because, the Cobalt has power switch.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Yoichi Yuasa 991f8b6ac5 [MIPS] move vr41xx_calculate_clock_frequency() to plat_time_init()
Moved vr41xx_calculate_clock_frequency() to plat_time_init().
This function relates to the timer function.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Yoichi Yuasa c9662341f8 [MIPS] time: remove unused mips_timer_state()
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Ralf Baechle fa71c96002 [MIPS] Altas, Malta: Switch boot file format to raw.
A raw binary boots about twice as fast as SREC.

The possibility to generate SREC binaries remains by simply using the
vmlinux.srec target but seems only useful for the probably hypothetical
case where one of these systems is booted over a serial interface.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:15:00 +00:00
Ralf Baechle 39a51109dd [MIPS] Extend performance counter event field.
The latest draft version of the MIPS Architecture Specification extends the
6 bit event field by adding a directly adjacent 4-bit EventExt field for a
total of 10 bits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Thomas Bogendoerfer 231a35d372 [MIPS] RM: Collected changes
- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part
  is the splitting of the EISA and onboard ISA of the RM200, which
  makes the EISA bus on the RM200 look like on other RMs.
- 64bit kernel support
- system type detection is now common for big and little endian
- moved sniprom code to arch/mips/fw
- added call_o32 function to arch/mips/fw/lib, which uses a private
  stack for calling prom functions
- fix problem with ISA interrupts, which makes using PIT clockevent
  possible

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Manuel Lauss 237cfee1db [MIPS] Alchemy: Au1210/Au1250 CPU support
This patch adds IDs for new Au1200 variants: Au1210 and Au1250.
They are essentially identical to the Au1200 except for the Au1210
which has a different SoC-ID in the PRId register [bits 31:24].
The Au1250 is a "Au1200 V0.2".

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Ralf Baechle c5ec1983e4 [MIPS] Eleminate local symbols from the symbol table.
These symbols appear in oprofile output, stacktraces and similar but only
make the output harder to read.  Many identical symbol names such as
"both_aligned" were also being used in multiple source files making it
impossible to see which file actually was meant.  So let's get rid of them.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Ralf Baechle f21d850808 [MIPS] Fulong: don't reinitialize pci_probe_only to it's default value.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Ralf Baechle 07c019bccc [MIPS] BCM1480: Use constants instead of magic numbers in PCI code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Thomas Bogendoerfer e2defae5a9 [MIPS] IP28 support
Add support for SGI IP28 machines (Indigo 2 with R10k CPUs)
This work is mainly based on Peter Fuersts work.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Ralf Baechle 81149be113 [MIPS] Remove CONFIG_SIBYTE_PT{1120,1125,SWARM}
According to Broadcom the PT systems are production test systems which
never reached customers so no need to keep the fragmentary support we
currently have.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Thomas Bogendoerfer c7c6b39050 [MIPS] Use correct dma flushing in dma_cache_sync()
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Thomas Bogendoerfer 930bff8822 [MIPS] IP28: added cache barrier to assembly routines
IP28 needs special treatment to avoid speculative accesses. gcc
takes care for .c code, but for assembly code we need to do it
manually.

This is taken from Peter Fuersts IP28 patches.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Atsushi Nemoto 2064ba23e5 [MIPS] TXx9 watchdog support for rbhma3100,rbhma4200,rbhma4500
This patch adds support for txx9wdt driver to rbhma3100, rbhma4200 and
rbhma4500 platform.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Thomas Bogendoerfer e9c33572a9 [MIPS] Use real cache invalidate
R10k non coherent machines need a real dma cache invalidate to get rid of
speculative stores in cache.  For other machines this promises a slight
speedup.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Ralf Baechle 87353d8ac3 [MIPS] SMP: Call platform methods via ops structure.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Ralf Baechle 19388fb092 [MIPS] Cleanup pcspeaker platform device registration.
Move registration into the actual platform code instead of making a
desparate attempt at sharing the hand full of likes of code in pcspeaker.c.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Ralf Baechle 0ab7aefc4d [MIPS] MT: Scheduler support for SMT
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu 92b1e6a64a [MIPS] tlbex.c: cleanup debug code
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu cbdbe07f9d [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu f49b94d8c1 [MIPS] tlbex.c: cleanup include files
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Franck Bui-Huu a9af6041e9 [MIPS] tlbex.c: Cleanup __init usages.
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Robert P. J. Day 3f4ac2dc05 [MIPS] Delete now-unreferenced i2c-yosemite.h header file.
Given that the corresponding source file i2c-yosemite.c file was
removed in commit daa4a68f90, and that
no one else includes this file, it seems safe to delete it.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Lucas Woods adfb899866 [MIPS] Remove duplicate includes.
Signed-off-by: Lucas Woods <woodzy@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Roel Kluin fa09187c34 [MIPS] ARC: Use strchr instead of strstr.
Use strchr instead of strstr when searching for a single character

Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Ralf Baechle 33202349ef [MIPS] Remove useless S-cache flushes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Ralf Baechle 526af35e5d [MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Andrew Sharp 48ef2626ae [MIPS] Put cast inside macro instead of all the callers
Since all the callers of the PHYS_TO_XKPHYS macro call with a constant,
put the cast to LL inside the macro where it really should be rather
than in all the callers.  This makes macros like PHYS_TO_XKSEG_UNCACHED
work without gcc whining.

Signed-off-by: Andrew Sharp <andy.sharp@onstor.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Yoichi Yuasa 2206583dd5 [MIPS] clean up au1xxx_irqmap.c include files
Clean up au1xxx_irqmap.c include files.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Yoichi Yuasa 7f3f490061 [MIPS] remove unused mips_machtype
Removed unused mips_machtype.  These are only set but not used.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Christoph Hellwig 417345d8f5 [MIPS] CFE: Make code remotely resemble Linux code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Atsushi Nemoto 8b6c2324bf [MIPS] cleanup tx39/tx49 setup code
Remove some unnecessary codes, includes and files.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Maciej W. Rozycki 619b6e18fc [MIPS] R4000/R4400 daddiu erratum workaround
This complements the generic R4000/R4400 errata workaround code and adds 
bits for the daddiu problem.  In most places it just modifies handwritten 
assembly code so that the assembler is allowed to use a temporary register 
as daddiu may now be treated as a macro that expands to a sequence of li 
and daddu.  It is the AT register or, where AT is unavailable or used 
explicitly for another purpose, an explicitly-named register is selected, 
using the .set at=<reg> feature added recently to gas.  This feature is 
only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the 
workaround remains disabled, the required version of binutils stays 
unchanged.

 Similarly, daddiu instructions put in branch delay slots in noreorder 
fragments are now taken out of them and the assembler is allowed to 
reorder them itself as possible (which it does making the whole idea of 
scheduling them into delay slots manually questionable).

 Also in the very few places where such a simple conversion was not 
possible, a handcoded longer sequence is implemented.

 Other than that there are changes to code responsible for building the 
TLB fault and page clear/copy handlers to avoid daddiu as appropriate.  
These are only effective if the erratum is verified to be present at the 
run time.

 Finally there is a trivial update to __delay(), because it uses daddiu in 
a branch delay slot.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:55 +00:00
Maciej W. Rozycki 20d60d9973 [MIPS] R4000/R4400 errata workarounds
This is the gereric part of R4000/R4400 errata workarounds.  They include 
compiler and assembler support as well as some source code modifications 
to address the problems with some combinations of multiply/divide+shift 
instructions as well as the daddi and daddiu instructions.

 Changes included are as follows:

1. New Kconfig options to select workarounds by platforms as necessary.

2. Arch top-level Makefile to pass necessary options to the compiler; also 
   incompatible configurations are detected (-mno-sym32 unsupported as 
   horribly intrusive for little gain).

3. Bug detection updated and shuffled -- the multiply/divide+shift problem 
   is lethal enough that if not worked around it makes the kernel crash in 
   time_init() because of a division by zero; the daddiu erratum might 
   also trigger early potentially, though I have not observed it.  On the 
   other hand the daddi detection code requires the exception subsystem to 
   have been initialised (and is there mainly for information).

4. r4k_daddiu_bug() added so that the existence of the erratum can be 
   queried by code at the run time as necessary; useful for generated code 
   like TLB fault and copy/clear page handlers.

5. __udelay() updated as it uses multiplication in inline assembly.

 Note that -mdaddi requires modified toolchain (which has been maintained 
by myself and available from my site for ~4years now -- versions covered 
are GCC 2.95.4 - 4.1.2 and binutils from 2.13 onwards).  The -mfix-r4000 
and -mfix-r4400 have been standard for a while though.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:54 +00:00
Alejandro Martinez Ruiz 2b22c034d0 [MIPS] Converting most array size calculations to use ARRAY_SIZE().
Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:54 +00:00
Ralf Baechle 161548bf35 [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:54 +00:00
Ralf Baechle 6920df4025 [MIPS] Delete unused CONFIG_64BIT_CONTEXT
The merge of the code to use this was never completed so delete it for the
time being.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:54 +00:00
Ralf Baechle e414004e94 [MIPS] Delete unused CONFIG_DMA_IP32.
The functionality of the former dma-ip32.c has been folded into
dma-default.c.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:54 +00:00
Adrian Bunk d3883ecebb Remove references to "make dep"
"make dep" is no longer required in kernel 2.6, but was still mentioned
in some places.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2008-01-28 23:22:13 +01:00
Sam Ravnborg 01ba2bdc6b all archs: consolidate init and exit sections in vmlinux.lds.h
This patch consolidate all definitions of .init.text, .init.data
and .exit.text, .exit.data section definitions in
the generic vmlinux.lds.h.

This is a preparational patch - alone it does not buy
us much good.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2008-01-28 23:21:17 +01:00
Manuel Lauss 8b798c4d16 i2c-au1550: Convert to platform driver
Convert the i2c-au1550 bus driver to platform driver, and
register a platform device for the Alchemy Db/Pb series of
boards.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27 18:14:52 +01:00
Gautham R Shenoy 86ef5c9a8e cpu-hotplug: replace lock_cpu_hotplug() with get_online_cpus()
Replace all lock_cpu_hotplug/unlock_cpu_hotplug from the kernel and use
get_online_cpus and put_online_cpus instead as it highlights the
refcount semantics in these operations.

The new API guarantees protection against the cpu-hotplug operation, but
it doesn't guarantee serialized access to any of the local data
structures. Hence the changes needs to be reviewed.

In case of pseries_add_processor/pseries_remove_processor, use
cpu_maps_update_begin()/cpu_maps_update_done() as we're modifying the
cpu_present_map there.

Signed-off-by: Gautham R Shenoy <ego@in.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-01-25 21:08:02 +01:00
Kay Sievers af5ca3f4ec Driver core: change sysdev classes to use dynamic kobject names
All kobjects require a dynamically allocated name now. We no longer
need to keep track if the name is statically assigned, we can just
unconditionally free() all kobject names on cleanup.

Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-01-24 20:40:40 -08:00
Atsushi Nemoto 06675e6f4f tc35815: Use irq number for tc35815-mac platform device id
The tc35815-mac platform device used a pci bus number and a devfn to
identify its target device, but the pci bus number may vary if some
bus-bridges are found.  Use irq number which is be unique for embedded
controllers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-22 00:35:23 +00:00
Dmitri Vorobiev 0487de9142 [MIPS] Malta: Fix reading the PCI clock frequency on big-endian
The JMPRS register on Malta boards keeps a 32-bit CPU-endian
value. The readw() function assumes that the value it reads is a
little-endian 16-bit number. Therefore, using readw() to obtain
the value of the JMPRS register is a mistake. This error leads
to incorrect reading of the PCI clock frequency on big-endian
during board start-up.

Change readw() to __raw_readl().

This was tested by injecting a call to printk() and verifying
that the value of the jmpr variable was consistent with current
setting of the JP4 "PCI CLK" jumper.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-22 00:35:23 +00:00
Linus Torvalds c60ecec67a Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Cacheops.h: Fix typo.
  [MIPS] Cobalt: Qube1 has no serial port so don't use it
  [MIPS] Cobalt: Fix ethernet interrupts for RaQ1
  [MIPS] Kconfig fixes for BCM47XX platform
2008-01-14 21:25:39 -08:00
Thomas Bogendoerfer c43756da94 [MIPS] Cobalt: Qube1 has no serial port so don't use it
Because Qube1 doesn't have a serial chip waiting for transmit fifo empty
takes forever, which isn't a good idea. No prom_putchar/early console
for Qube1 fixes this.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-15 01:04:42 +00:00
Thomas Bogendoerfer f6c0f32ee8 [MIPS] Cobalt: Fix ethernet interrupts for RaQ1
RAQ1 uses the same interrupt routing as Qube2.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-15 01:04:42 +00:00
Aurelien Jarno 2f02c15a5d [MIPS] Kconfig fixes for BCM47XX platform
The patch below fixes two problems for Kconfig on the BCM47xx platform:

- arch/mips/bcm47xx/gpio.c uses ssb_extif_* functions. Selecting
  SSB_DRIVER_EXTIF makes sure those functions are available.
- arch/mips/pci/pci.c needs, when enabled, platform specific functions,
  which are defined when SSB_PCICORE_HOSTMODE is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-15 01:04:41 +00:00
Atsushi Nemoto e452e94e21 [MIPS] Replace 40c7869b69 kludge
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-11 17:05:42 +00:00
WANG Cong 778bc145fe [MIPS] Lasat: Fix built in separate object directory.
Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>

[Ralf: The LDSCRIPT script needed fixing, too]

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-11 17:05:42 +00:00
Dmitri Vorobiev 84c21e2542 [MIPS] Malta: Fix software reset on big endian
I noticed that the commit f197465384
(MIPS Tech: Get rid of volatile in core code) broke the software
reset functionality for MIPS Malta boards in big-endian mode.

According to the MIPS Malta board user's manual, writing the magic
32-bit GORESET value into the SOFTRES register initiates board soft
reset. My experimentation has shown that the endianness of the GORESET
integer should thereby be the same as the endianness, which has been
set for the CPU itself. The writew() function used to write the magic
value in the code introduced by the commit mentioned above, however,
swaps bytes for big-endian kernels and transfers 16 bits instead of 32.

The patch below replaces the writew() function by the __raw_writel()
routine, which leaves the byte order intact and transfers the whole
MIPS machine word. Trivial code cleanup (replacing spaces by a tab
and cutting oversized lines to make checkpatch.pl happy) is also
included.

The patch was tested using a Malta evaluation board running in both
BE and LE modes. For both modes, software reset was fully functional
after the change.

P.S. I suspect that the same commit broke the "standby" functionality
for MIPS Atlas boards. However, I did not touch the Atlas code as I
don't have such board at my disposal and also because the linux-mips.org
Web site claims that Atlas support is scheduled for removal.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-11 17:05:41 +00:00
Vitaly Wool 1b1c5f0d96 [MIPS] pnx8xxx: move to clocksource
This patch converts PNX8XXX system timer to clocksource restoring PNX8550
support back to live.

Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-11 17:05:41 +00:00
Thomas Bogendoerfer 320167182d [MIPS] Wrong CONFIG option prevents setup of DMA zone.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-11 17:05:41 +00:00
Ralf Baechle ba820c5c51 [MIPS] Fix CONFIG_BOOT_RAW.
This was broken by 017e3a492683b32d17dcd1b13b279745cc656073 (lmo) /
396a2ae08e (kernel.org).

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:04 +00:00
Thomas Bogendoerfer ce202cbb9e [MIPS] Assume R4000/R4400 newer than 3.0 don't have the mfc0 count bug
This seems as reasonable assumption and gets some SNI machines to work
which currently must rely on the cp0 counter as clocksource.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:03 +00:00
Thomas Bogendoerfer c990081bf8 [MIPS] Fix IP32 breakage
- suppress master aborts during config read
- set io_map_base
- only fixup end of iomem resource to avoid failing request_resource
  in serial driver
- killed useless setting of crime_int bit, which caused wrong interrupts
- use physcial address for serial port platform device and let 8250
  driver do the ioremap

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:03 +00:00
Sergei Shtylyov 9cfacb790f [MIPS] Alchemy: Fix use of __init code bug exposed by modpost warning
WARNING: vmlinux.o(.text+0x1ca608): Section mismatch: reference to
.init.text: add_wired_entry (between 'config_access' and 'config_read')

by refactoring the code calling add_wired_entry() from config_access() to
a separate function which is called from aau1x_pci_setup(). While at it:

- make some unnecassarily global variables 'static';

- fix the letter case, whitespace, etc. in the comments...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:03 +00:00
Atsushi Nemoto c4eee283e0 [MIPS] Move inclusing of kernel/time/Kconfig menu to appropriate place
CONFIG_NO_HZ, CONFIG_HIGH_RES_TIMERS should be selected in "Kernel
type" menu, not in "CPU selection" menu.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:03 +00:00
Chris Dearman bbaf238b5f [MIPS] Ensure that ST0_FR is never set on a 32 bit kernel
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:30 +00:00
Ralf Baechle 4037500ebc [MIPS] time: Delete weak definition of plat_time_init() due to gcc bug.
Frank Rowand <frank.rowand@am.sony.com> reports:

> In linux-2.6.24-rc4 the Toshiba RBTX4927 hangs on boot.
>
> The cause is that plat_time_init() from arch/mips/tx4927/common/
> tx4927_setup.c does not override the __weak plat_time_init() from
> arch/mips/kernel/time.c.  This is due to a compiler bug in gcc 4.1.1.  The
> bug is reported to not exist in earlier versions of gcc, and to be fixed in
> 4.1.2.  The problem is that the __weak plat_time_init() is empty and thus
> gets optimized out of existence (thus the linker is never given the option
> to replace the __weak function).

[ He meant the call to plat_time_init() from time_init() gets optimized away ]

> For more info on the gcc bug see
>
>    http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27781
>
> The attached patch is one workaround.  Another possible workaround

[ His patch adds -fno-unit-at-a-time for time.c ]

> would be to change the __weak plat_time_init() to be a non-empty
> function.

The __weak definition of plat_time_init was only ever meant to be a
migration helper to keep platforms that don't have a plat_time_init
compiling.  A few greps says that all platforms now supply their own
plat_time_init() so the weak definition is no longer needed.  So I
instead delete it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:30 +00:00
Ralf Baechle d20e47e153 [MIPS] PCI: Make pcibios_fixup_device_resources ignore legacy resources.
There might be other reasons why a resource might be marked as fixed
such as a PCI UART holding the system console but until we use
IORESOURCE_PCI_FIXED that way also this will work.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:29 +00:00
Ralf Baechle 40c7869b69 [MIPS] Atlas, Malta: Don't free firmware memory on free_initmem.
A proper fix for this needs to turn a few MIPS-generic bits which I
don't want at this stage.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:29 +00:00
Sergei Shtylyov b87bb40b62 [MIPS] Alchemy: fix off by two error in __fixup_bigphys_addr()
the PCI specific code in this function doesn't check for the address range
being under the upper bound of the PCI memory window correctly -- fix this,
somewhat beautifying the code around the check, while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:29 +00:00
Sergei Shtylyov dd99d9661c [MIPS] Alchemy: fix PCI resource conflict
... by getting the PCI resources back into the 32-bit range -- there's no
need therefore for CONFIG_RESOURCES_64BIT either. This makes Alchemy PCI
work again while currently the kernel skips the bus scan.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:29 +00:00
Yoichi Yuasa 18ca38d26f [MIPS] time: Set up Cobalt's mips_hpt_frequency
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-14 17:34:29 +00:00
Ralf Baechle ba0f00b9fc [MIPS] Malta: Enable tickless and highres timers.
Most Malta use an FPGA CPU card which rarely is good for more than 40MHz.
So the performance penalta of the regular timer interrupt, especially
for the VSMP kernel model is significant, even at a mere 100Hz.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-09 04:51:10 +00:00
Ralf Baechle 5ef1b9a0f6 [MIPS] Bigsur: Enable tickless and and highres timers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-09 04:51:10 +00:00
Atsushi Nemoto 8f7e7d67cb qemu: do not enable IP7 blindly
IP7 will be enabled automatically in mips_clockevent_init(), if available.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-09 04:51:10 +00:00
Chris Dearman 6d2d419ffd [MIPS] Don't byteswap writes to display when running bigendian
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-09 04:51:09 +00:00
Linus Torvalds ceaeee6ad6 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Oprofile: Fix computation of number of counters.
  [MIPS] Alchemy: fix IRQ bases
  [MIPS] Alchemy: replace ffs() with __ffs()
  [MIPS] BCM1480: Fix interrupt routing, take 2.
2007-12-06 09:43:26 -08:00
Ralf Baechle 00a5825332 Fix oprofile configuration breakage
The cleanup 09cadedbdc broke the oprofile
configuration for MIPS by allowing oprofile support to be built for
kernel models where oprofile doesn't have a chance in hell to work.

Just a dependecy list on a number of architectures is - surprise - broken
and should as per past discussions probably in most considered to be
broken in most cases.  So I introduce a dependency for the oprofile
configuration on ARCH_SUPPORTS_OPROFILE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-12-06 09:37:03 -08:00
Ralf Baechle 5e2862eb5a [MIPS] Oprofile: Fix computation of number of counters.
VSMP kernels will split the available performance counters between the two
processors / cores.  But don't do this when we're not on a VSMP system ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06 17:15:58 +00:00
Sergei Shtylyov 0e8120e094 [MIPS] Alchemy: fix IRQ bases
Do what the commits commits f3e8d1da38 and
9d360ab4a7 failed to achieve -- actually
convert the Alchemy code to irq_cpu.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06 17:15:58 +00:00
Sergei Shtylyov 4b36673284 [MIPS] Alchemy: replace ffs() with __ffs()
Fix havoc wrought by commit 56f621c7f6 --
au_ffs() and ffs() are equivalent, that patch should have just replaced one
with another.  Now replace ffs() with __ffs() which returns an unbiased bit
number.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06 17:15:58 +00:00
Ralf Baechle f435a91e66 [MIPS] BCM1480: Fix interrupt routing, take 2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06 17:15:57 +00:00
Ralf Baechle a6733f2e14 [MIPS] BCM1480: Fix interrupt routing.
The old code did did only work as long as CFE and the kernel were using
the same interrupt numbering ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-03 19:40:26 +00:00
Ralf Baechle e6a1bb725e [MIPS] Fix build.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-01 00:39:37 +00:00
Thomas Bogendoerfer 68576cf122 IP22ZILOG: fix lockup and sysrq
- fix lockup when switching from early console to real console
 - make sysrq reliable
 - fix panic, if sysrq is issued before console is opened

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-29 09:24:53 -08:00
Joe Perches b1e3afa001 [MIPS] vpe: Add missing "space"
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:15 +00:00
Richard Knutsson 8142294dda [MIPS] Compliment va_start() with va_end().
Signed-off-by: Richard Knutsson <ricknu-0@student.ltu.se>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:15 +00:00
Thomas Bogendoerfer 5b3af8f19f [MIPS] IP22: Fix broken eeprom access by using __raw_readl/__raw_writel
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Thomas Bogendoerfer 68de480372 [MIPS] IP22: Fix broken EISA interrupt setup by switching to generic i8259
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle cce335ae47 [MIPS] 64-bit Sibyte kernels need DMA32.
Sibyte SOCs only have 32-bit PCI.  Due to the sparse use of the address
space only the first 1GB of memory is mapped at physical addresses
below 1GB.  If a system has more than 1GB of memory 32-bit DMA will
not be able to reach all of it.

For now this patch is good enough to keep Sibyte users happy but it seems
eventually something like swiotlb will be needed for Sibyte.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle 940f6b48a1 [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all.  This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle 5aa85c9fc4 [MIPS] Handle R4000/R4400 mfc0 from count register.
The R4000 and R4400 have an errata where if the cp0 count register is read
in the exact moment when it matches the compare register no interrupt will
be generated.

This bug may be triggered if the cp0 count register is being used as
clocksource and the compare interrupt as clockevent.  So a simple
workaround is to avoid using the compare for both facilities on the
affected CPUs.

This is different from the workaround suggested in the old errata documents;
at some opportunity probably the official version should be implemented
and tested.  Another thing to find out is which processor versions
exactly are affected.  I only have errata documents upto R4400 V3.0
available so for the moment the code treats all R4000 and R4400 as broken.

This is potencially a problem for some machines that have no other decent
clocksource available; this workaround will cause them to fall back to
another clocksource, worst case the "jiffies" source.
2007-11-26 17:26:14 +00:00
Ralf Baechle 98ce472181 [MIPS] IP32: More interrupt renumbering fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:13 +00:00
Ralf Baechle 526a677069 [MIPS] time: MIPSsim's plat_time_init doesn't need to be irq safe.
It's running early during the bootup process so interrupts are still off.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:13 +00:00
Ralf Baechle aea6863944 [MIPS] time: Fix negated condition in cevt-r4k driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:13 +00:00
Ralf Baechle 72e510654c [MIPS] N32 needs to use the compat version of sys_nfsservctl.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:52 +00:00
Ralf Baechle 30e748a507 [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
This matters to any sort of device that is wired to one of the CPU
interrupt pins on an SMP system.  Typically the scenario is most easily
triggered with the count/compare timer interrupt where the same interrupt
number and thus irq_desc is used on each processor.

   CPU A			CPU B

   do_IRQ()
   generic_handle_irq()
   handle_level_irq()
   spin_lock(desc_lock)
   set IRQ_INPROGRESS
   spin_unlock(desc_lock)
				do_IRQ()
				generic_handle_irq()
				handle_level_irq()
				spin_lock(desc_lock)
				IRQ_INPROGRESS set => bail out
   spin_lock(desc_lock)
   clear IRQ_INPROGRESS
   spin_unlock(desc_lock)

In case of the cp0 compare interrupt this means the interrupt will be
acked and not handled or re-armed on CPU b, so there won't be any timer
interrupt until the count register wraps around.

With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just
working right on VSMP because the count registers are synchronized on
bootup so it takes something that disables interrupts for a long time on
one processor to trigger this one.

For scenarios where an interrupt is multicasted or broadcasted over several
CPUs the existing code was safe and the fix will break it.  There is no
way to know in the interrupt controller code because it is abstracted from
the platform code.  I think we do not have such a setup currently, so this
should be ok.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:52 +00:00
Ralf Baechle f99f2cc936 [MIPS] Sibyte: Fix name of clocksource.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:51 +00:00
Maciej W. Rozycki eae5fdc3e5 [MIPS] SNI: s/achknowledge/acknowledge/
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:51 +00:00
Maciej W. Rozycki 3247989ee8 [MIPS] Makefile: Fix canonical system names
The GNU `config.guess' uses "linux-gnu" as the canonical system name.
Fix the list of compiler prefixes checked to spell it correctly.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:51 +00:00
Nigel Stephens 7c3a622d9c [MIPS] vpe: handle halting TCs in an errata safe way.
Adds a JR.HB after halting a TC, to ensure that the TC has really halted.
only modifies the TCSTATUS register when the TC is safely halted.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:50 +00:00
Ralf Baechle 8dfa741f14 [MIPS] Sibyte: Stop timers before programming next even.
We have no guarantee by the generic time code that the timer is stopped
when the ->next_event method is called.  Modifying the Timer Initial Count
register while the timer is enabled has UNPREDICTABLE effect according to
the BCM1250/BCM1125/BCM1125H User Manual.  So stop the timer before
reprogramming.

This is a paranoia fix; no ill effects have been observed previously.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:50 +00:00
Ralf Baechle 622477533d [MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks.
For the old minimum of a single tick a value of zero would be programmed
into the init value register which in the BCM1250/BCM1125/BCM1125H User
Manual in the Timer Special Cases section is documented to have
UNPREDICTABLE effect.

Observable sympthoms of this bug were hangs of several seconds on the
console during bootup and later if both dyntick and highres timer options
were activated.

In theory contiguous mode of the timers is also affected but in an act of
hopeless lack of realism I'll assume nobody will ever configure a KERNEL
for HZ > 500kHz but if so I leave that to evolution to sort out.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:50 +00:00
Yoichi Yuasa 89becf5c0d [MIPS] Lasat: Fix overlap of interrupt number ranges.
The range of MIPS_CPU IRQ and the range of LASAT IRQ overlap.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:50 +00:00
Thomas Bogendoerfer fcee3faf83 [MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:50 +00:00
Ralf Baechle f6771dbb27 [MIPS] Fix shadow register support.
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Atsushi Nemoto c6563e85f7 [MIPS] Fix typo in R3000 TRACE_IRQFLAGS code
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle 33b75e5c51 [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Roel Kluin bb856c5b49 [MIPS] iounmap if in vr41xx_pciu_init() pci clock is over 33MHz
iounmap if pci clock is over 33MHz.  Cosmetic because the iomap() in this
case is just a bit of address magic.

Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle a8401fa57f [MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle 07a80e4924 [MIPS] Sibyte: pin timer interrupt to their cores.
Or strange things will happen.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:48 +00:00
Ralf Baechle a57c228935 [MIPS] Qemu: Add early printk, your friend in a cold night.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:48 +00:00
Ralf Baechle a8049c53cd [MIPS] Convert reference to mem_map to pfn_to_page().
This was crashing the combination of highmem and sparsemem.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:48 +00:00
Ralf Baechle a754f70886 [MIPS] Sibyte: resurrect old cache hack.
The recent switch of the Sibyte SOCs from the processor specific cache
managment code in c-sb1.c to c-r4k.c lost this old hack

    [MIPS] Hack for SB1 cache issues

    Removing flush_icache_page a while ago broke SB1 which was using an empty
    flush_data_cache_page function.  This glues things well enough so a more
    efficient but also more intrusive solution can be found later.

    Signed-Off-By: Thiemo Seufer <ths@networkno.de>
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

in the hope it was no longer needed.  As it turns it still is so resurrect
it until there is a better solution.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:48 +00:00
Roel Kluin c0f2a9d75a mips: undo locking on error path returns
[akpm@linux-foundation.org: coding-style cleanups]
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-14 18:45:42 -08:00
Ralf Baechle 74521c28e5 Use i8253.c lock for PC speaker on MIPS, too.
The Jazz machines have to use the PIT timer for dyntick and highresolution
kernels.  This may break because currently just like i386 used to do MIPS
uses two separate spinlocks in the actual PIT code and the PC speaker
code.  So switch to do it the same that x86 currently does PIT locking.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-02 19:39:18 -07:00
Thomas Bogendoerfer 3be51f70e1 [MIPS] Jazz: disable PIT; cleanup R4030 clockevent
Fix ISA irq acknowledge.
Make r4030 clockevent code look like other mips clockevent code.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:49 +00:00
Ralf Baechle 651194f820 [MIPS] Bigsur supports highmem.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:49 +00:00
Ralf Baechle 9603a23d3b [MIPS] mtx-1: Enable -Werror.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:49 +00:00
Ralf Baechle e7c9d6b927 [MIPS] mtx-1: Remove unused mtx1_sys_btn.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:49 +00:00
Ralf Baechle ae11e3214b [MIPS] Pb1200: Enable -Werror.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:48 +00:00
Thomas Bogendoerfer c9294022af [MIPS] SNI: register a02r clockevent; don't use PIT timer
Register A20R clockevent.
Remove PIT timer setup because it doesn't work

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:48 +00:00
Ralf Baechle dd3db6eb0e [MIPS] i8253: Cleanup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:48 +00:00
Ralf Baechle db0c19e1a6 [MIPS] Pb1200: Fix warning.
arch/mips/au1000/pb1200/irqmap.c:101: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result

And while at it a few coding style cleanups.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:48 +00:00
Ralf Baechle f5cd9f14e2 [MIPS] Pb1200: Fix warning.
arch/mips/au1000/pb1200/board_setup.c:71: warning: unused variable 'pin_func'

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle c8925297e8 [MIPS] IP27: Fix build error.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle 07f6169cff [MIPS] Excite: Fix build error.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle 217dd11e9d [MIPS] Sibyte: Split and move clock code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle f3f9ad0edc [MIPS] Sibyte: Fixes for oneshot timer mode.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Ralf Baechle faf2782bf3 [MIPS] Sibyte: Remove blank line.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Thiemo Seufer 211a29a87c [MIPS] Swarm: Fix build failure
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Atsushi Nemoto d9eec1a5d6 [MIPS] time: Code cleanups
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static.  It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup.  It is just a placeholder.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 1d0a909cfc [MIPS] time: Remove now unused local_timer_interrupt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 81b635ef36 [MIPS] IP32: Fix address of 2nd serial interface.
Found by Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 46abf4b39a [MIPS] SB1250: Use the right irqaction for the timer interrupt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle d1598b6adb [MIPS] SB1250: Remove stray assignment of cpumask.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 2e5dcd2b4c [MIPS] Sibyte: Fix names of the clockevent devices.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 9e32a510af [MIPS] Sibyte: Build fixes / dead code removal.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:46 +00:00
Ralf Baechle 1a3b7920fe [MIPS] tb0219: Update copyright message.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Ralf Baechle a76ab5c10d [MIPS] MT: Fix bug in multithreaded kernels.
When GDB writes a breakpoint into address area of inferior process the
kernel needs to invalidate the modified memory in the inferior which
is done by calling flush_cache_page which in turns calls
r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC
kernel via r4k_on_each_cpu().

As the VSMP and SMTC SMP kernels for 34K are running on a single shared
caches it is possible to get away without interprocessor function calls.
This optimization is implemented in r4k_on_each_cpu, so
local_r4k_flush_cache_page is only ever called on the local CPU.

This is where the following code in local_r4k_flush_cache_page() strikes:

        /*
         * If ownes no valid ASID yet, cannot possibly have gotten
         * this page into the cache.
         */
        if (cpu_context(smp_processor_id(), mm) == 0)
                return;

On VSMP and SMTC had a function of cpu_context() for each CPU(TC).

So in case another CPU than the CPU executing local_r4k_cache_flush_page
has not accessed the mm but one of the other CPUs has there may be data
to be flushed in the cache yet local_r4k_cache_flush_page will falsely
return leaving the I-cache inconsistent for the breakpoint.

While the issue was discovered with GDB it also exists in
local_r4k_flush_cache_range() and local_r4k_flush_cache().

Fixed by introducing a new function has_valid_asid which on MT kernels
returns true if a mm is active on any processor in the system.

This is relativly expensive since for memory acccesses in that loop
cache misses have to be assumed but it seems the most viable solution
for 2.6.23 and older -stable kernels.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Ralf Baechle a370605594 [MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Ralf Baechle 1553f6a2ca Author: Ralf Baechle <ralf@linux-mips.org>
[MIPS] MSP71xx: Fix bitrot.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Maciej W. Rozycki d9ba26a93a [MIPS] sb1250: Enable GenBus IDE in defconfig.
Enable the onboard GenBus IDE interface in the default configuration.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Franck Bui-Huu 16be243589 [MIPS] vmlinux.ld.S: correctly indent .data section
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:37 +00:00
Maciej W. Rozycki 21b2aecaae [MIPS] c-r3k: Implement flush_cache_range()
Contrary to the belief of some, the R3000 and related processors did have
caches, both a data and an instruction cache.  Here is an implementation
of r3k_flush_cache_page(), which is the processor-specific back-end for
flush_cache_range(), done according to the spec in
Documentation/cachetlb.txt.

While at it, remove an unused local function: get_phys_page(), do some
trivial formatting fixes and modernise debugging facilities.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Atsushi Nemoto 62b14c24b1 [MIPS] Store sign-extend register values for PTRACE_GETREGS
A comment on ptrace_getregs() states "Registers are sign extended to
fill the available space." but it is not true.  Fix code to match the
comment.  Also fix casts on each caller to get rid of some warnings.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Florian Fainelli 26c288f82c [MIPS] Alchemy: Register platform devices
This patch separates the platform devices registration for the MTX-1
specific devices: GPIO leds and watchdog.

[Minor fixup and formatting change -- Ralf]

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
David Daney 098362e720 [MIPS] Add len and addr validation for MAP_FIXED mappings.
Mmap with MAP_FIXED was not validating the addr and len parameters.  This
leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases
when using the o32 ABI on a 64 bit kernel.

These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all
the memory.  In 2.6.18 and 2.6.23.1 (and likely other versions as well)
the kernel maps the requested memory, but since half of it is above
0x80000000 a SIGBUS is generated when it is accessed.

This patch moves the len validation above the MAP_FIXED processing so that
it is always validated.  It also adds validation to the addr parameter for
MAP_FIXED mappings.

Signed-off-by: David Daney  <ddaney@avtrex.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Ralf Baechle c4e8308c30 [MIPS] IRIX: Fix off-by-one error in signal compat code.
Based on original patch by Roel Kluin <12o3l@tiscali.nl>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Ralf Baechle 38760d40ca [MIPS] time: Replace plat_timer_setup with modern APIs.
plat_timer_setup is no longer getting called.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Ralf Baechle 1238d5d868 [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:36 +00:00
Atsushi Nemoto 3a6c43a787 [MIPS] time: Make c0_compare_int_usable faster
Try increasingly longer time periods starting of at 0x10 cycles.  This
should be fast on hardware and work nicely with emulators.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Atsushi Nemoto c637fecb4f [MIPS] time: Fix cevt-r4k.c for 64-bit kernel
The expression "(long)(read_c0_count() - cnt)" can never be a negative
value on 64-bit kernel.  Cast to "int" before comparison.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Ralf Baechle 11ca25aa31 [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
They break the timer interrupt initialization and only seem to be a kludge
for initialization happening in the wrong order.  Further testing done by
Thiemo confirms the suspicion that the other invocations also seem to have
useless.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Atsushi Nemoto 229f773ef4 [MIPS] txx9tmr clockevent/clocksource driver
Convert jmr3927_clock_event_device to more generic
txx9tmr_clock_event_device which supports one-shot mode.  The
txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer
interrupt was not available.

Convert jmr3927_hpt_read to txx9_clocksource driver which does not
depends jiffies anymore.  The txx9_clocksource itself can be used for
TX49, but normally TX49 uses higher precision clocksource_mips.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Yoichi Yuasa 22df3f53e3 [MIPS] Add mips_hpt_frequency check to mips_clockevent_init().
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Ralf Baechle 8a13ecd7b2 [MIPS] IP32: Fixes after interrupt renumbering.
And general untangling.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Ralf Baechle 725d7b36c3 [MIPS] IP27: Fix slice logic to work for arbitrary number of slices.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Ralf Baechle 84953b39f9 [MIPS] SNI: Convert a20r timer to clockevent device.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:34 +00:00
Ralf Baechle e0511f7524 [MIPS] time: Merge eXcite plat_timer_setup into plat_time_init.
Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how
to handle the alternate timer interrupt of the RM9000.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:34 +00:00
Ralf Baechle ba5eac515f [MIPS] time: Merge lasat plat_timer_setup into plat_time_init.
Since the cp0 compare interrupt handler isn't initialized by the time
plat_time_init is called don't set IE_IRQ5 anymore, cevt-r4k.c will do
that a little later itself.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:34 +00:00
Ralf Baechle da349bef97 [MIPS] time: Remove wrppmc's definition of plat_timer_setup.
The only thing it used to do is now done by cevt-r4k.c.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:34 +00:00
Ralf Baechle 656db5061d [MIPS] time: Cause platform definitions of plat_timer_setup to cause error.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:34 +00:00
Ralf Baechle bc2f2a24d9 [MIPS] Alchemy: Convert from plat_timer_setup to plat_time_init.
The old plat_timer_setup hook is no longer getting called so the Alchemy
time initialization was getting skipped.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:33 +00:00
Ralf Baechle 8292366341 [MIPS] vpe: Use p_paddr instead of p_vaddr loader.
This subtle difference makes ELF overlays work.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:33 +00:00
Ralf Baechle 6e86b0bf0b [MIPS] Cleanup random difference between the lmo and kernel.org tree.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:33 +00:00
Yoichi Yuasa 11c03a6faa [MIPS] time: set clock before clockevent_delta2ns() in GT641xx.
clockevent_delta2ns() use the shift and mult value, so
clockevent_set_clock() should be called first.
Pointed out by Atsushi Nemoto.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:33 +00:00
Yoichi Yuasa c984c87826 [MIPS] time: Use non-interrupt locks in GT641xx clockevent driver
set_next_event() and set_mode() are always called with interrupt disabled.
irqsave and irqrestore are not necessary for spinlock.
Pointed out by Atsushi Nemoto.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:33 +00:00
Ralf Baechle 2c771a4c28 [MIPS] Alchemy: micro-optimizatize time code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:32 +00:00
Ralf Baechle 310a09d850 [MIPS] Alchemy: Nuke homebrew setup_irq(), it's broken and unnecessary.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:32 +00:00
Kevin D. Kissell be5f1f2114 [MIPS] SMTC: Allow control over TC assignment to vpe0.
Modify the SMTC initialization code to allow boot-time specification not
only of how many VPEs and TCs to use, but also how many TCs out of the
allowed pool are to be bound to VPE 0.  The new boot option is "vpe0tcs=N",
where N is an integer.  Using it in combination with the existing options
allows arbitrary assignments across the 2 VPEs of a 34K.  e.g. "maxtcs=3
 vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4
vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1.  If no vpe0tcs
option is specified, the traditional algorithm of evenly dividing TCs
between available VPEs, with the odd "slop" going to VPE0, is retained.

The reason for doing this is to allow a finer balancing of TCs which can
handle I/O interrupts on Malta (those on VPE 0) and those which cannot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:32 +00:00
Jens Axboe 4fcc47a053 mips: sg_page() fallout
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2007-10-23 12:32:34 +02:00
Linus Torvalds f10f114f19 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] time: Make c0_compare_int_usable more bullet proof
  [MIPS] Kbuild: Use the new cc-cross-prefix feature.
  [MIPS] Fix include wrapper symbol to something sane.
  [MIPS] Malta: Delete dead code.
  [MIPS] time: Add GT641xx timer0 clockevent driver
  [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
  [MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code.
  [MIPS] time: Fix calculation in clockevent_set_clock()
2007-10-22 19:21:08 -07:00
Atsushi Nemoto dab969c00b [MIPS] time: Make c0_compare_int_usable more bullet proof
Use write_c0_compare(read_c0_count()) to clear interrupt.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:01 +01:00
Ralf Baechle 17f690be45 [MIPS] Kbuild: Use the new cc-cross-prefix feature.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:01 +01:00
Ralf Baechle fa33a54646 [MIPS] Malta: Delete dead code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Yoichi Yuasa 1097c6ac33 [MIPS] time: Add GT641xx timer0 clockevent driver
And make use of it for Cobalt.  A few others such as the Malta could make
use of it as well.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Ralf Baechle d04533650f [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it.  In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Ralf Baechle 06d428d719 [MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Atsushi Nemoto 508a775a3c [MIPS] time: Fix calculation in clockevent_set_clock()
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Jens Axboe 58b053e4ce Update arch/ to use sg helpers
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2007-10-22 21:19:59 +02:00
Matt LaPlante 01dd2fbf0d typo fixes
Most of these fixes were already submitted for old kernel versions, and were
approved, but for some reason they never made it into the releases.

Because this is a consolidation of a couple old missed patches, it touches both
Kconfigs and documentation texts.

Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-20 01:34:40 +02:00
Robert P. J. Day 3a4fa0a25d Fix misspellings of "system", "controller", "interrupt" and "necessary".
Fix the various misspellings of "system", controller", "interrupt" and
"[un]necessary".

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-19 23:10:43 +02:00
Linus Torvalds 0a4908e19f Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Delete totally outdated Documentation/mips/time.README
  [MIPS] Kill duplicated setup_irq() for cp0 timer
  [MIPS] Sibyte: Finish conversion to modern time APIs.
  [MIPS] time: Helpers to compute clocksource/event shift and mult values.
  [MIPS] SMTC: Build fix.
  [MIPS] time: Delete dead code.
  [MIPS] MIPSsim: Strip defconfig file to the bones.
2007-10-19 12:01:22 -07:00
Mathieu Desnoyers 09cadedbdc Combine instrumentation menus in kernel/Kconfig.instrumentation
Quoting Randy:

"It seems sad that this patch sources Kconfig.marker, a 7-line file,
20-something times.  Yes, you (we) don't want to put those 7 lines into
20-something different files, so sourcing is the right thing.

However, what you did for avr32 seems more on the right track to me: make
_one_ Instrumentation support menu that includes PROFILING, OPROFILE, KPROBES,
and MARKERS and then use (source) that in all of the arches."

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19 11:53:54 -07:00