Now, arch dependent code around CONFIG_MEMORY_HOTREMOVE is a mess.
This patch cleans up them. This is against 2.6.23-rc6-mm1.
- fix compile failure on ia64/ CONFIG_MEMORY_HOTPLUG && !CONFIG_MEMORY_HOTREMOVE case.
- For !CONFIG_MEMORY_HOTREMOVE, add generic no-op remove_memory(),
which returns -EINVAL.
- removed remove_pages() only used in powerpc.
- removed no-op remove_memory() in i386, sh, sparc64, x86_64.
- only powerpc returns -ENOSYS at memory hot remove(no-op). changes it
to return -EINVAL.
Note:
Currently, only ia64 supports CONFIG_MEMORY_HOTREMOVE. I welcome other
archs if there are requirements and testers.
Signed-off-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
We have had complaints where a threaded application is left in a bad state
after one of it's threads is killed when we hit a VM: out_of_memory
condition.
Killing just one of the process threads can leave the application in a bad
state, whereas killing the entire process group would allow for the
application to restart, or be otherwise handled, and makes it very obvious
that something has gone wrong.
This change allows the entire process group to be taken down, rather
than just the one thread.
Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Andi Kleen <ak@suse.de>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Matthew Wilcox <willy@debian.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This implements a fast-path for small (less than 12 bytes) copies,
with the existing path treated as the slow-path and left as the default
behaviour for all other copy sizes.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When using URAM in NUMA mode another active region is needed.
Bump this up so we don't trigger the region truncation in
add_active_range().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
4kB pages are unstable on extended mode TLB, it's recommended
that TLB compat mode be used when using a 4kB PAGE_SIZE. Set
the default for extended mode to 8kB.
This should have negligible impact, as other than the extra swap
cache entry bits, there's no reason to use the extended mode TLB
with 4kB pages.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Calculate the number of cache aliases on probed L2 caches, and while
we're at it, print out the detected statistics at boot time for these
also.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We stopped referencing these functions unconditionally when the
old entry.S code was refactored, so this is just dead code at
present. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was an off-by-1 on the cache alias detection logic on SH-4,
which caused n_aliases to always be 1 even when the page size
precluded the existence of aliases.
With this corrected, 64KB pages happily reports n_aliases == 0, and
hits the appropriate fast paths in the flushing routines.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
current_cpu_data uses smp_processor_id() in order to find the
corresponding cpu_data. As the cache descs are all currently
identical, just have this look at probed results from the boot
CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.
The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).
Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This leads to invalid configurations where both FPU and DSP support
can be enabled in the same kernel, resulting in build failure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch contains the following fixes:
- Adds sh7785 support to CONFIG_EARLY_SCIF_CONSOLE_PORT.
- Removes duplicate include from rts7751r2d irq code.
- Removes CONFIG_CPU_HAS_INTC from sh7720 Kconfig entry.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for sh7206
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7720 (SH3-DSP) CPU.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There is no point in keeping around the now unused intc2 code.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for x3 from
intc2 to intc. New vectors are also added to match the preliminary
information.
Use plat_irq_setup_pins() to select between IRQ and IRL mode for IRQ0-3.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for sh7760
from ipr + intc2 to intc. New vectors are also added to match the
information provided by the datasheet.
Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins()
if pins IRL0-3 should be used in IRLM mode.
The patch also adds the SIM block to the serial port platform data.
Version two of this patch fixes MMCIF problems reported by Manuel Lauss.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for sh7785
from intc2 to intc. New vectors are also added to match the information
provided by the datasheet.
No IRQ/IRL pin vectors are enabled by default. Use plat_irq_setup_pins()
to select between IRL and IRQ mode.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch unifies the cpu specific interrupt setup code for
sh7706, sh7707, sh7708 and sh7709 and moves the code into a new
file called setup-sh770x.c. It makes sense to share the setup code
between these processors because most hardware blocks are identical
from a software point of view. With this patch the sh770x processors
now have a complete set of vectors that match with the information
provided by the data sheets. This is a big improvement for sh7708.
Vectors for IRQ4 and IRQ5 are enabled by default. Use
plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.
This patch also unifies the platform device setup code which means
that the rtc driver now has platform data for all sh770x processors.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code
for sh7710 from ipr to intc. While at it new vectors are added
to match the information provided by the datasheet. Version two
simplifies the Kconfig part.
Vectors for IRQ4 and IRQ5 are enabled by default. Use
plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.
This patch also adds sh7710 specific platform data for the rtc
driver. The base address of SCIF1 is adjusted to match the
datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific interrupt setup code for
sh7705 from ipr to intc. While at it new vectors are added to
match the information provided by the datasheet.
Vectors for IRQ4 and IRQ5 are enabled by default.
Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode.
This patch also adds sh7705 specific platform data for the rtc driver.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When reading the cached TTB value and extracting the pgd, we
accidentally applied a __va() to it and bumped it off in to bogus
space which ended up causing multiple faults in the error path.
Fix it up so unhandled faults don't do strange and highly unorthodox
things when oopsing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
fault-nommu defines the page fault handler stubs for SH-3/4 parts,
but is not needed on SH-2/SH-2A now that the entry code has been
logically separated.
Add it in for SH-3 and SH-4 explicitly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We were missing the trace_hardirqs_on() instrumentation in the nommu
case, resync with the MMU version of the page fault handler to have
this behaving consistently. Also explicitly re-enable IRQs now that
the assembly code isn't doing it for us any more.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch removes old dead code:
- kill off sh7300 cpu support
- get rid of broken solution engine 7300 board support
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Not all CPUs support the DSP, and this leads to problems when mixing
and matching CPU types and DSP opcodes. Fix this up by only allowing
CONFIG_SH_DSP to be enabled for the CPUs that explicitly have such a
block.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch removes old dead code:
- kill off sh73180 cpu support
- get rid of broken solution engine 73180 board support
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The code in arch/sh/kernel/cpu/irq/pint.c doesn't compile, so let's
get rid of it to make space for a future pint implementation on top
of intc.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The first 1MB of P3 space was reserved and used for page colouring,
as we've reworked that to use fixmaps, we can reclaim the space and
hand it back to VMALLOC_START.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This wires up kmap_coherent() and kunmap_coherent() on SH-4, and
moves away from the p3map_mutex and reserved P3 space, opting to
use fixmaps for colouring instead.
The copy_user_page()/clear_user_page() implementations are moved
to this, which fixes the nasty blowups with spinlock debugging
as a result of having some of these calls nested under the page
table lock.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific 7750 setup code to use the
new intc controller. Many new vectors are added and multiple
processor variants including 7091, 7750, 7750s, 7750r, 7751 and
7751r should all have the correct vectors hooked up.
IRLM interrupts can be enabled using ipr_irq_enable_irlm() which
now is marked as __init.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific 7780 setup code to use the
new intc controller. Many new vectors are added and also support for
external interrupt sense configuration. So with this patch it is now
possible to configure external interrupt pins as edge or level
triggered using set_irq_type().
No external interrupts are registered by default.
Use plat_irq_setup_pins() to select between IRQ or IRL mode.
This patch also fixes the Alarm IRQ for the RTC.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the cpu specific 7722 setup code to use the
new intc controller. Many new vectors are added and also support
for external interrupt sense configuration. So with this patch
it is now possible to configure external interrupt pins as edge
or level triggered using set_irq_type().
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Slab destructors were no longer supported after Christoph's
c59def9f22 change. They've been
BUGs for both slab and slub, and slob never supported them
either.
This rips out support for the dtor pointer from kmem_cache_create()
completely and fixes up every single callsite in the kernel (there were
about 224, not including the slab allocator definitions themselves,
or the documentation references).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch completes Linus's wish that the fault return codes be made into
bit flags, which I agree makes everything nicer. This requires requires
all handle_mm_fault callers to be modified (possibly the modifications
should go further and do things like fault accounting in handle_mm_fault --
however that would be for another patch).
[akpm@linux-foundation.org: fix alpha build]
[akpm@linux-foundation.org: fix s390 build]
[akpm@linux-foundation.org: fix sparc build]
[akpm@linux-foundation.org: fix sparc64 build]
[akpm@linux-foundation.org: fix ia64 build]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Bryan Wu <bryan.wu@analog.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Matthew Wilcox <willy@debian.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
[ Still apparently needs some ARM and PPC loving - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Only print out pgd/pte data in the oops path if oops_may_print()
holds true. Follows the i386 implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We don't have a PMB for SH-X2 or later, so only enable it for
the few CPUs that support it. Fixes up the boot for SH4AL-DSP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There's no point in keeping these around, they've been broken
for some time, and the dmaenging/async_tx framework provides a
far more reasonable interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.
This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This enables simple hotplug support for sparsemem users. Presently
this only permits memory being added in to node 0 on ZONE_NORMAL.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds basic support for multiple nodes on SH machines.
This is primarily useful for boards with many different
memory blocks that are otherwise unused (SH7722/SH7785 URAM
and so forth).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Currently using multiple nodes tramples the ZONE_NORMAL
max low pfn, tidy up the logic a bit to get it all working
as expected.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements basic sparsemem support for SH. Presently this only
uses static sparsemem, and we still permit explicit selection of
flatmem. Those boards that want sparsemem can select it as usual.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was a big mess, rework the logic a bit so that we constrain
to a particular subtype and figure out the board support based
on that. This makes building subtype specific kernels supporting
multiple boards possible again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-3 comes up with the PAGE_SIZE on a misaligned boundary:
arch/sh/mm/copy_page.S: Assembler messages:
arch/sh/mm/copy_page.S:132: Warning: misaligned data
fix it up with explicit alignment.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
- setup-sh7750.c only defines the sh7751_ipr_map when building
with SH7751 support.
- 7722 Solution Engine was missing a mach-type entry, causing
the macro in cf-enabler to be undefined.
- arch/sh/mm/init.c needs linux/pagemap.h.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Just at the time you added them on sh we're removing them from other
architectures. As there's no user yet this patch just removes them
completely. Once you actually have a kprobes patch it should follow
the direct call to kprobes_fault_handler model that powerpc, s390 and
sparc64 employ in 2.6.22-rc1 and that I'm updating other architectures
to.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is the last remaining slab destructor in the kernel, which
we kill off and move the resultant list tracking logic up to
the pmb_alloc()/pmb_free() paths.
As Christoph Lameter pointed out, it's potentially unsafe to be
taking the list lock in the destructor anyways, so this is also
more fundamentally correct.
With this in place, we're all set for killing off slab destructors
from the kernel entirely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
GCC doesn't seem to be able to figure this one out for
itself, so just shut it up..
CC arch/sh/mm/fault.o
arch/sh/mm/fault.c: In function '__do_page_fault':
arch/sh/mm/fault.c:288: warning: 'ptl' may be used uninitialized in this function
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Most SH platforms aren't going to need more than a single active
region, ones that need more can pad this out as necessary.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves SH over to the generic quicklists. As per x86_64,
we have special mappings for the PGDs, so these go on their
own list..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove includes of <linux/smp_lock.h> where it is not used/needed.
Suggested by Al Viro.
Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc,
sparc64, and arm (all 59 defconfigs).
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Use SLAB_PANIC and delete duplicated panic().
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Cc: Ian Molton <spyro@f2s.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks some of the node 0 bootmem initialization in
preparation for discontigmem and sparsemem support.
ARCH_POPULATES_NODE_MAP is switched to as a result of this.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Convert some of the global flush users over to using the local variants
that don't need to use the global routines.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rename the existing flush routines to local_ variants for use by
the IPI-backed global flush routines on SMP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Only SH-4 needs to set _PAGE_WT when using write-through caching,
don't attempt to set it on SH-3 where it ends up being a reserved
bit.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.
With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.
And finally, explicitly disable the lazy writeback on SMP (SH-4A).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up shmin (and SH7706/SH7708) IPR support for some of the
recent API changes.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Many struct file_operations in the kernel can be "const". Marking them const
moves these to the .rodata section, which avoids false sharing with potential
dirty data. In addition it'll catch accidental writes at compile time to
these shared resources.
[akpm@osdl.org: sparc64 fix]
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
sh / sh64: Remove ZONE_DMA remains.
Both arches do not need ZONE_DMA
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Convert SH to use generic ioremap_page_range()
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Replace all uses of kmem_cache_t with struct kmem_cache.
The patch was generated using the following script:
#!/bin/sh
#
# Replace one string by another in all the kernel sources.
#
set -e
for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do
quilt add $file
sed -e "1,\$s/$1/$2/g" $file >/tmp/$$
mv /tmp/$$ $file
quilt refresh
done
The script was run like this
sh replace kmem_cache_t "struct kmem_cache"
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Following up with the work on shared page table done by Dave McCracken. This
set of patch target shared page table for hugetlb memory only.
The shared page table is particular useful in the situation of large number of
independent processes sharing large shared memory segments. In the normal
page case, the amount of memory saved from process' page table is quite
significant. For hugetlb, the saving on page table memory is not the primary
objective (as hugetlb itself already cuts down page table overhead
significantly), instead, the purpose of using shared page table on hugetlb is
to allow faster TLB refill and smaller cache pollution upon TLB miss.
With PT sharing, pte entries are shared among hundreds of processes, the cache
consumption used by all the page table is smaller and in return, application
gets much higher cache hit ratio. One other effect is that cache hit ratio
with hardware page walker hitting on pte in cache will be higher and this
helps to reduce tlb miss latency. These two effects contribute to higher
application performance.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Acked-by: Hugh Dickins <hugh@veritas.com>
Cc: Dave McCracken <dmccr@us.ibm.com>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Adam Litke <agl@us.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
