Commit Graph

56 Commits

Author SHA1 Message Date
Josh Cartwright 64e6861760 ARM: zynq: Use restart_handler mechanism for slcr reset
By making use of the restart_handler chain mechanism, the SLCR-based
reset mechanism can be prioritized amongst other mechanisms available on
a particular board.

Choose a default high-ish priority of 192 for this restart mechanism.

Signed-off-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-18 14:46:36 +02:00
Marc Zyngier 008e4d6735 ARM: zynq: switch from gic_arch_extn to gic_set_irqchip_flags
Instead of directly touching gic_arch_extn, which is about to
be removed, use gic_set_irqchip_flags instead.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088737-15817-5-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-15 01:28:12 +00:00
Michal Simek 3329659df0 ARM: zynq: Simplify SLCR initialization
Based on
"mfd: syscon: Decouple syscon interface from platform devices"
(sha1: bdb0066df9)
SLCR driver can use syscon/regmap drivers directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-29 15:38:17 +01:00
Linus Torvalds b528392669 ACPI and power management updates for 3.18-rc1
- Rework the handling of wakeup IRQs by the IRQ core such that
    all of them will be switched over to "wakeup" mode in
    suspend_device_irqs() and in that mode the first interrupt
    will abort system suspend in progress or wake up the system
    if already in suspend-to-idle (or equivalent) without executing
    any interrupt handlers.  Among other things that eliminates the
    wakeup-related motivation to use the IRQF_NO_SUSPEND interrupt
    flag with interrupts which don't really need it and should not
    use it (Thomas Gleixner and Rafael J Wysocki).
 
  - Switch over ACPI to handling wakeup interrupts with the help
    of the new mechanism introduced by the above IRQ core rework
    (Rafael J Wysocki).
 
  - Rework the core generic PM domains code to eliminate code that's
    not used, add DT support and add a generic mechanism by which
    devices can be added to PM domains automatically during
    enumeration (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).
 
  - Add debugfs-based mechanics for debugging generic PM domains
    (Maciej Matraszek).
 
  - ACPICA update to upstream version 20140828.  Included are updates
    related to the SRAT and GTDT tables and the _PSx methods are in
    the METHOD_NAME list now (Bob Moore and Hanjun Guo).
 
  - Add _OSI("Darwin") support to the ACPI core (unfortunately, that
    can't really be done in a straightforward way) to prevent
    Thunderbolt from being turned off on Apple systems after boot
    (or after resume from system suspend) and rework the ACPI Smart
    Battery Subsystem (SBS) driver to work correctly with Apple
    platforms (Matthew Garrett and Andreas Noever).
 
  - ACPI LPSS (Low-Power Subsystem) driver update cleaning up the
    code, adding support for 133MHz I2C source clock on Intel Baytrail
    to it and making it avoid using UART RTS override with Auto Flow
    Control (Heikki Krogerus).
 
  - ACPI backlight updates removing the video_set_use_native_backlight
    quirk which is not necessary any more, making the code check the
    list of output devices returned by the _DOD method to avoid
    creating acpi_video interfaces that won't work and adding a quirk
    for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak).
 
  - New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin).
 
  - Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
    Sudip Mukherjee, Yijing Wang, and Zhang Rui).
 
  - cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
    Rasmus Villemoes).
 
  - cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name
    change among other things), ppc-corenet, powernv (Viresh Kumar,
    Preeti U Murthy, Shilpasri G Bhat, Lucas Stach).
 
  - cpuidle support for DT-based idle states infrastructure, new
    ARM64 cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi,
    Rasmus Villemoes).
 
  - ARM big.LITTLE cpuidle driver updates: support for DT-based
    initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
    Kevin Hilman).
 
  - Rework of the test_suspend kernel command line argument and
    a new trace event for console resume (Srinivas Pandruvada,
    Todd E Brandt).
 
  - Second attempt to optimize swsusp_free() (hibernation core) to
    make it avoid going through all PFNs which may be way too slow on
    some systems (Joerg Roedel).
 
  - devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).
 
  - rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS
    entry update in MAINTAINERS (Heiko Stübner, Kevin Hilman).
 
  - PM core fix related to clock management (Geert Uytterhoeven).
 
  - PM core's sysfs code cleanup (Johannes Berg).
 
 /
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Merge tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and power management updates from Rafael Wysocki:
 "Features-wise, to me the most important this time is a rework of
  wakeup interrupts handling in the core that makes them work
  consistently across all of the available sleep states, including
  suspend-to-idle.  Many thanks to Thomas Gleixner for his help with
  this work.

  Second is an update of the generic PM domains code that has been in
  need of some care for quite a while.  Unused code is being removed, DT
  support is being added and domains are now going to be attached to
  devices in bus type code in analogy with the ACPI PM domain.  The
  majority of work here was done by Ulf Hansson who also has been the
  most active developer this time.

  Apart from this we have a traditional ACPICA update, this time to
  upstream version 20140828 and a few ACPI wakeup interrupts handling
  patches on top of the general rework mentioned above.  There also are
  several cpufreq commits including renaming the cpufreq-cpu0 driver to
  cpufreq-dt, as this is what implements generic DT-based cpufreq
  support, and a new DT-based idle states infrastructure for cpuidle.

  In addition to that, the ACPI LPSS driver is updated, ACPI support for
  Apple machines is improved, a few bugs are fixed and a few cleanups
  are made all over.

  Finally, the Adaptive Voltage Scaling (AVS) subsystem now has a tree
  maintained by Kevin Hilman that will be merged through the PM tree.

  Numbers-wise, the generic PM domains update takes the lead this time
  with 32 non-merge commits, second is cpufreq (15 commits) and the 3rd
  place goes to the wakeup interrupts handling rework (13 commits).

  Specifics:

   - Rework the handling of wakeup IRQs by the IRQ core such that all of
     them will be switched over to "wakeup" mode in suspend_device_irqs()
     and in that mode the first interrupt will abort system suspend in
     progress or wake up the system if already in suspend-to-idle (or
     equivalent) without executing any interrupt handlers.  Among other
     things that eliminates the wakeup-related motivation to use the
     IRQF_NO_SUSPEND interrupt flag with interrupts which don't really
     need it and should not use it (Thomas Gleixner and Rafael Wysocki)

   - Switch over ACPI to handling wakeup interrupts with the help of the
     new mechanism introduced by the above IRQ core rework (Rafael Wysocki)

   - Rework the core generic PM domains code to eliminate code that's
     not used, add DT support and add a generic mechanism by which
     devices can be added to PM domains automatically during enumeration
     (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).

   - Add debugfs-based mechanics for debugging generic PM domains
     (Maciej Matraszek).

   - ACPICA update to upstream version 20140828.  Included are updates
     related to the SRAT and GTDT tables and the _PSx methods are in the
     METHOD_NAME list now (Bob Moore and Hanjun Guo).

   - Add _OSI("Darwin") support to the ACPI core (unfortunately, that
     can't really be done in a straightforward way) to prevent
     Thunderbolt from being turned off on Apple systems after boot (or
     after resume from system suspend) and rework the ACPI Smart Battery
     Subsystem (SBS) driver to work correctly with Apple platforms
     (Matthew Garrett and Andreas Noever).

   - ACPI LPSS (Low-Power Subsystem) driver update cleaning up the code,
     adding support for 133MHz I2C source clock on Intel Baytrail to it
     and making it avoid using UART RTS override with Auto Flow Control
     (Heikki Krogerus).

   - ACPI backlight updates removing the video_set_use_native_backlight
     quirk which is not necessary any more, making the code check the
     list of output devices returned by the _DOD method to avoid
     creating acpi_video interfaces that won't work and adding a quirk
     for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak)

   - New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin)

   - Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
     Sudip Mukherjee, Yijing Wang, and Zhang Rui)

   - cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
     Rasmus Villemoes)

   - cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name change
     among other things), ppc-corenet, powernv (Viresh Kumar, Preeti U
     Murthy, Shilpasri G Bhat, Lucas Stach)

   - cpuidle support for DT-based idle states infrastructure, new ARM64
     cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi, Rasmus
     Villemoes)

   - ARM big.LITTLE cpuidle driver updates: support for DT-based
     initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
     Kevin Hilman)

   - Rework of the test_suspend kernel command line argument and a new
     trace event for console resume (Srinivas Pandruvada, Todd E Brandt)

   - Second attempt to optimize swsusp_free() (hibernation core) to make
     it avoid going through all PFNs which may be way too slow on some
     systems (Joerg Roedel)

   - devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).

   - rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS entry
     update in MAINTAINERS (Heiko Stübner, Kevin Hilman)

   - PM core fix related to clock management (Geert Uytterhoeven)

   - PM core's sysfs code cleanup (Johannes Berg)"

* tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (105 commits)
  ACPI / fan: printk replacement
  PM / clk: Fix crash in clocks management code if !CONFIG_PM_RUNTIME
  PM / Domains: Rename cpu_data to cpuidle_data
  cpufreq: cpufreq-dt: fix potential double put of cpu OF node
  cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'
  PM / hibernate: Iterate over set bits instead of PFNs in swsusp_free()
  cpufreq: ppc-corenet: remove duplicate update of cpu_data
  ACPI / sleep: Rework the handling of ACPI GPE wakeup from suspend-to-idle
  PM / sleep: Rename platform suspend/resume functions in suspend.c
  PM / sleep: Export dpm_suspend_late/noirq() and dpm_resume_early/noirq()
  ACPICA: Introduce acpi_enable_all_wakeup_gpes()
  ACPICA: Clear all non-wakeup GPEs in acpi_hw_enable_wakeup_gpe_block()
  ACPI / video: check _DOD list when creating backlight devices
  PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h
  cpufreq: Replace strnicmp with strncasecmp
  cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexec
  cpufreq: powernv: Set the pstate of the last hotplugged out cpu in policy->cpus to minimum
  cpufreq: Allow stop CPU callback to be used by all cpufreq drivers
  PM / devfreq: exynos: Enable building exynos PPMU as module
  PM / devfreq: Export helper functions for drivers
  ...
2014-10-09 16:07:43 -04:00
Viresh Kumar bbcf071969 cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'
The naming convention of this driver was always under the scanner, people
complained that it should have a more generic name than cpu0, as it manages all
CPUs that are sharing clock lines.

Also, in future it will be modified to support any number of clusters with
separate clock/voltage lines.

Lets rename it to 'cpufreq_dt' from 'cpufreq_cpu0'.

Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-10-03 15:37:54 +02:00
Michal Simek 8097171e19 ARM: zynq: Remove useless L2C AUX setting
AUX setting has no effect that's why remove it.

Warning log:
L2C: platform provided aux values match the hardware, so
have no effect.  Please remove them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16 12:55:12 +02:00
Soren Brinkmann 0beb2bd36f ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16 12:55:07 +02:00
Soren Brinkmann ae88b85e80 ARM: zynq: PM: Enable A9 internal clock gating feature
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16 12:55:05 +02:00
Linus Torvalds eb3d3ec567 Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
2014-06-05 15:57:04 -07:00
Russell King dcf9c7f9f4 ARM: l2c: zynq: convert to generic l2c OF initialisation
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:50:30 +01:00
Russell King 2c4133c5d0 ARM: l2c: zynq: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:50:28 +01:00
Michal Simek 00f7dc6363 ARM: zynq: Add support for SOC_BUS
Provide information through SOC_BUS to user space.
Silicon revision is provided through devcfg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 16:13:48 +02:00
Linus Torvalds 2bf73dd61a ARM: SoC: late cleanups
These could not be part of the first cleanup branch, because they either
 came too late in the cycle, or they have dependencies on other branches.
 Important changes are:
 
 * The integrator platform is almost multiplatform capable after
   some reorganization (Linus Walleij)
 * Minor cleanups on Zynq (Michal Simek)
 * Lots of changes for Exynos and other Samsung platforms, including
   further preparations for multiplatform support and the clocks bindings
   are rearranged.
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Merge tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late cleanups from Arnd Bergmann:
 "These could not be part of the first cleanup branch, because they
  either came too late in the cycle, or they have dependencies on other
  branches.  Important changes are:

   - The integrator platform is almost multiplatform capable after some
     reorganization (Linus Walleij)
   - Minor cleanups on Zynq (Michal Simek)
   - Lots of changes for Exynos and other Samsung platforms, including
     further preparations for multiplatform support and the clocks
     bindings are rearranged"

* tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  devicetree: fix newly added exynos sata bindings
  ARM: EXYNOS: Fix compilation error in cpuidle.c
  ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h
  ARM: EXYNOS: Remove hardware.h file
  ARM: SAMSUNG: Remove hardware.h inclusion
  ARM: S3C24XX: Remove invalid code from hardware.h
  dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock
  ARM: dts: Keep some essential LDOs enabled for arndale-octa board
  ARM: dts: Disable MDMA1 node for arndale-octa board
  ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion
  serial: s3c: Fix build of header without serial_core.h preinclusion
  ARM: EXYNOS: Allow wake-up using GIC interrupts
  ARM: EXYNOS: Stop using legacy Samsung PM code
  ARM: EXYNOS: Remove PM initcalls and useless indirection
  ARM: EXYNOS: Fix abuse of CONFIG_PM
  ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h
  ARM: SAMSUNG: Move common save/restore helpers to separate file
  ARM: SAMSUNG: Move Samsung PM debug code into separate file
  ARM: SAMSUNG: Consolidate PM debug functions
  ARM: SAMSUNG: Use debug_ll_addr() to get UART base address
  ...
2014-04-05 15:46:37 -07:00
Linus Torvalds 1ead658124 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer changes from Thomas Gleixner:
 "This assorted collection provides:

   - A new timer based timer broadcast feature for systems which do not
     provide a global accessible timer device.  That allows those
     systems to put CPUs into deep idle states where the per cpu timer
     device stops.

   - A few NOHZ_FULL related improvements to the timer wheel

   - The usual updates to timer devices found in ARM SoCs

   - Small improvements and updates all over the place"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
  tick: Remove code duplication in tick_handle_periodic()
  tick: Fix spelling mistake in tick_handle_periodic()
  x86: hpet: Use proper destructor for delayed work
  workqueue: Provide destroy_delayed_work_on_stack()
  clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS
  timer: Remove code redundancy while calling get_nohz_timer_target()
  hrtimer: Rearrange comments in the order struct members are declared
  timer: Use variable head instead of &work_list in __run_timers()
  clocksource: exynos_mct: silence a static checker warning
  arm: zynq: Add support for cpufreq
  arm: zynq: Don't use arm_global_timer with cpufreq
  clocksource/cadence_ttc: Overhaul clocksource frequency adjustment
  clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled
  clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI
  sh: Remove Kconfig entries for TMU, CMT and MTU2
  ARM: shmobile: Remove CMT, TMU and STI Kconfig entries
  clocksource: armada-370-xp: Use atomic access for shared registers
  clocksource: orion: Use atomic access for shared registers
  clocksource: timer-keystone: Delete unnecessary variable
  clocksource: timer-keystone: introduce clocksource driver for Keystone
  ...
2014-04-01 11:00:07 -07:00
Arnd Bergmann 32adc19d4b Merge tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx into next/cleanup2
Merge "arm: Xilinx Zynq cleanup patches for v3.15" from Michal Simek:

- Redesign SLCR initialization to enable
  driver developing which targets SLCR space

* tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx:
  ARM: zynq: Add waituart implementation
  ARM: zynq: Move of_clk_init from clock driver
  ARM: zynq: Introduce zynq_slcr_unlock()
  ARM: zynq: Add and use zynq_slcr_read/write() helper functions
  ARM: zynq: Make zynq_slcr_base static
  ARM: zynq: Map I/O memory on clkc init
  ARM: zynq: Hang iomapped slcr address on device_node
  ARM: zynq: Split slcr in two parts
  ARM: zynq: Move clock_init from slcr to common
  arm: dt: zynq: Add fclk-enable property to clkc node

[Arnd: remove SOC_BUS support from pull request]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-27 02:19:41 +01:00
Michal Simek 4a32c74e76 ARM: zynq: Move of_clk_init from clock driver
Move of_clk_init() from clock driver to enable
options not to use zynq clock driver.
Use for example fixed clock setting.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-17 15:12:07 +01:00
Soren Brinkmann cd32529587 arm: zynq: Add support for cpufreq
The generic cpufreq-cpu0 driver can scale the CPU frequency on Zynq
SOCs. Add the required platform device to the BSP and appropriate
OPPs to the dts.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2014-03-11 23:10:28 +01:00
Michal Simek 46f5b96085 ARM: zynq: Reserve not DMAable space in front of the kernel
Reserve space from 0x0 - __pa(swapper_pg_dir),
if kernel is loaded from 0, which is not DMAable.
It is causing problem with MMC driver and others
which want to add dma buffers to this space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2014-02-10 10:45:42 -08:00
Michal Simek b0504e39c2 ARM: zynq: Map I/O memory on clkc init
The clkc has its registers in the range of the slcr.
Instead of passing around the slcr base address pointer, let the clkc get the
address from the DT.
This prepares the slcr to be a real driver with multiple memory ranges
(slcr, clocks, pinctrl,...)

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:13 +01:00
Michal Simek 016f4dcae8 ARM: zynq: Split slcr in two parts
Split the slcr into an early part for unlocking and cpu starting
and a later syscon driver.
Also add "syscon" compatible property for slcr.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:20:54 +01:00
Steffen Trumtrar 6f69c7f21c ARM: zynq: Move clock_init from slcr to common
Preparation step for next changes.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-05 15:57:00 +01:00
Soren Brinkmann 9f4f5d26c6 arm: zynq: Set proper GIC flags
Zynq is able to wake up on any IRQ, so flag it with
IRQCHIP_SKIP_SET_WAKE, and we want to mask off the IRQs when
going to suspend to avoid transient effects so also flag
this with IRQCHIP_MASK_ON_SUSPEND.

This is essentially, making the same changes as commit
'ARM: ux500: set proper GIC flags'
(sha1: 7e1f97ea8f) for Zynq.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-12-10 14:20:24 +01:00
Soren Brinkmann f4d5d7b7c6 arm: zynq: Use of_platform_populate instead of bus_probe
All new boards should be using this function instead of
of_platform_bus_probe.

Two side effects:
1. Possible to probe node which are not in the bus
2. Remove bus_id table from platform code

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-12-10 14:19:56 +01:00
Daniel Lezcano 3e8ceca6c7 ARM: zynq: cpuidle: convert to platform driver
As the ux500 and the kirkwood driver, make the zynq driver a platform driver

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2013-10-07 16:46:59 +02:00
Vincent Stehlé fe08bf9f46 ARM: zynq: fix compilation warning
Fix the following compilation warning:

  arch/arm/mach-zynq/common.c:110:2: warning: initialization from incompatible pointer type [enabled by default]
  arch/arm/mach-zynq/common.c:110:2: warning: (near initialization for ‘__mach_desc_XILINX_EP107.restart’) [enabled by default]

Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
Cc: Robin Holt <holt@sgi.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: trivial@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-07-23 11:04:04 -07:00
Arnd Bergmann 514a590847 ARM: zynq: use DT_MACHINE_START
The zynq platform code only supports DT based booting, so we
should use DT_MACHINE_START rather than MACHINE_START.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Michal Simek <michal.simek@xilinx.com>
2013-07-05 23:07:39 +02:00
Linus Torvalds ee1a8d402e ARM SoC device tree changes
These changes from 30 individual branches for the most part update device
 tree files, but there are also a few source code changes that have crept
 in this time, usually in order to atomically move over a driver from
 using hardcoded data to DT probing.
 
 A number of platforms change their DT files to use the C preprocessor,
 which is causing a bit of churn, but that is hopefully only this once.
 
 There are a few conflicts with the other branches unfortunately:
 
 * in exynos5440.dtsi and kirkwood-6281.dtsi, device nodes are added
   from multiple branches. Need to be careful to have the right
   set of closing braces as git gets this one wrong.
 
 * In kirkwood.dtsi, one 'ranges' line got split into two lines, while
   another line got added. Order of the lines does not matter.
 
 * in sama5d3.dtsi, some cleanup was merged the wrong way, causing
   a bogus conflict. We want the 'dmas' and 'dma-names' properties
   to get added here.
 
 * Two lines got removed independently in arch/arm/mach-mxs/mach-mxs.c
 
 * Contents get added independently in arch/arm/mach-omap2/cclock33xx_data.c
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree changes from Arnd Bergmann:
 "These changes from 30 individual branches for the most part update
  device tree files, but there are also a few source code changes that
  have crept in this time, usually in order to atomically move over a
  driver from using hardcoded data to DT probing.

  A number of platforms change their DT files to use the C preprocessor,
  which is causing a bit of churn, but that is hopefully only this once"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits)
  ARM: at91: dt: rm9200ek: add spi support
  ARM: at91: dt: rm9200: add spi support
  ARM: at91/DT: at91sam9n12: add SPI DMA client infos
  ARM: at91/DT: sama5d3: add SPI DMA client infos
  ARM: at91/DT: fix SPI compatibility string
  ARM: Kirkwood: Fix the internal register ranges translation
  ARM: dts: bcm281xx: change comment to C89 style
  ARM: mmc: bcm281xx SDHCI driver (dt mods)
  ARM: nomadik: add the new clocks to the device tree
  clk: nomadik: implement the Nomadik clocks properly
  ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
  ARM: dts: omap4-panda: Fix DVI EDID reads
  ARM: dts: omap4-panda: Add USB Host support
  arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
  ARM: shmobile: irqpin: add a DT property to enable masking on parent
  ARM: dts: AM43x EPOS EVM support
  ARM: dts: OMAP5: Add bandgap DT entry
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
  ...
2013-07-02 14:23:01 -07:00
Soren Brinkmann 7fa5ac3fa2 arm: zynq: Remove board specific compatibility string
It is not necessary to have board specific compatibility strings
in the platform code. The board dts files can use the more generic
'xlnx,zynq-7000' string.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-06-17 10:32:25 +02:00
Maxime Ripard 7ac161c435 ARM: zynq: Remove init_irq declaration in machine description
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
specified") removed the need to explictly setup the init_irq field in
the machine description when using only irqchip_init. Remove that
declaration for zynq as well.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-21 16:32:16 +02:00
Michal Simek aa7eb2bb4e arm: zynq: Add smp support
Zynq is dual core Cortex A9 which starts always
at zero. Using simple trampoline ensure long jump
to secondary_startup code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2013-04-04 09:24:00 +02:00
Michal Simek 889faa8814 arm: zynq: Get rid of xilinx function prefix
Xilinx is vendor name not SoC name. Use zynq instead.

Also remove one checkpatch warning:
WARNING: static const char * array should probably be
static const char * const
+static const char *xilinx_dt_match[] = {

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:23:58 +02:00
Michal Simek 96790f0a28 arm: zynq: Add support for system reset
Do system reset via slcr registers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00
Michal Simek 64b889b39e arm: zynq: Move slcr initialization to separate file
Create separate slcr driver instead of polluting common code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00
Michal Simek 732078c369 arm: zynq: Load scu baseaddress at run time
Use Cortex a9 cp15 to read scu baseaddress.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:28 +02:00
Michal Simek c5263bb8b7 arm: zynq: Move timer to clocksource interface
Use clocksource timer initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:09:10 +02:00
Michal Simek e932900a32 arm: zynq: Use standard timer binding
Use cdns,ttc because this driver is Cadence Rev06
Triple Timer Counter and everybody can use it
without xilinx specific function name or probing.

Also use standard dt description for timer
and also prepare for moving to clocksource
initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:09:08 +02:00
Soren Brinkmann f184c5caa9 arm: zynq: timer: Replace PSS through PS
The acronym PSS is deprecated by Xilinx. The correct term, which is
also used in Xilinx documentation is PS (processing system).
This is just a search and replace:
 - s/PSS/PS/g
 - s/pss/ps/g

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
2013-01-28 13:27:20 +01:00
Michal Simek c067561759 arm: zynq: Add missing irqchip.h to common.c
The patch: "ARM: use common irqchip_init for GIC init"
(sha1: 0529e315bb)
should also add linux/irqchip.h header.

Error message:
arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init'
  undeclared here (not in a function)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-01-28 13:27:18 +01:00
Olof Johansson f8060f5446 Initial irqchip init infrastructure and GIC and VIC clean-ups
This creates irqchip initialization infrastructure from Thomas
 Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips
 and adapted to use the new infrastructure. All DT enabled platforms
 using GIC and VIC are converted over to use the new irqchip_init.
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Merge tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux into next/cleanup

From Rob Herring:

Initial irqchip init infrastructure and GIC and VIC clean-ups

This creates irqchip initialization infrastructure from Thomas
Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips
and adapted to use the new infrastructure. All DT enabled platforms
using GIC and VIC are converted over to use the new irqchip_init.

* tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux:
  irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h
  ARM: picoxcell: use common irqchip_init function
  ARM: spear: use common irqchip_init function
  irqchip: Move ARM VIC to drivers/irqchip
  ARM: samsung: remove unused tick.h
  ARM: remove unneeded vic.h includes
  ARM: remove mach .handle_irq for VIC users
  ARM: VIC: set handle_arch_irq in VIC initialization
  ARM: VIC: shrink down vic.h
  irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h
  ARM: use common irqchip_init for GIC init
  irqchip: Move ARM GIC to drivers/irqchip
  ARM: remove mach .handle_irq for GIC users
  ARM: GIC: set handle_arch_irq in GIC initialization
  ARM: GIC: remove direct use of gic_raise_softirq
  ARM: GIC: remove assembly ifdefs from gic.h
  ARM: mach-ux500: use SGI0 to wake up the other core
  arm: add set_handle_irq() to register the parent IRQ controller handler function
  irqchip: add basic infrastructure
  irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS

Fixed up massive merge conflicts with the timer cleanup due to adjacent changes:

Signed-off-by: Olof Johansson <olof@lixom.net>

Conflicts:
	arch/arm/mach-bcm/board_bcm.c
	arch/arm/mach-cns3xxx/cns3420vb.c
	arch/arm/mach-ep93xx/adssphere.c
	arch/arm/mach-ep93xx/edb93xx.c
	arch/arm/mach-ep93xx/gesbc9312.c
	arch/arm/mach-ep93xx/micro9.c
	arch/arm/mach-ep93xx/simone.c
	arch/arm/mach-ep93xx/snappercl15.c
	arch/arm/mach-ep93xx/ts72xx.c
	arch/arm/mach-ep93xx/vision_ep9307.c
	arch/arm/mach-highbank/highbank.c
	arch/arm/mach-imx/mach-imx6q.c
	arch/arm/mach-msm/board-dt-8960.c
	arch/arm/mach-netx/nxdb500.c
	arch/arm/mach-netx/nxdkn.c
	arch/arm/mach-netx/nxeb500hmi.c
	arch/arm/mach-nomadik/board-nhk8815.c
	arch/arm/mach-picoxcell/common.c
	arch/arm/mach-realview/realview_eb.c
	arch/arm/mach-realview/realview_pb1176.c
	arch/arm/mach-realview/realview_pb11mp.c
	arch/arm/mach-realview/realview_pba8.c
	arch/arm/mach-realview/realview_pbx.c
	arch/arm/mach-socfpga/socfpga.c
	arch/arm/mach-spear13xx/spear1310.c
	arch/arm/mach-spear13xx/spear1340.c
	arch/arm/mach-spear13xx/spear13xx.c
	arch/arm/mach-spear3xx/spear300.c
	arch/arm/mach-spear3xx/spear310.c
	arch/arm/mach-spear3xx/spear320.c
	arch/arm/mach-spear3xx/spear3xx.c
	arch/arm/mach-spear6xx/spear6xx.c
	arch/arm/mach-tegra/board-dt-tegra20.c
	arch/arm/mach-tegra/board-dt-tegra30.c
	arch/arm/mach-u300/core.c
	arch/arm/mach-ux500/board-mop500.c
	arch/arm/mach-ux500/cpu-db8500.c
	arch/arm/mach-versatile/versatile_ab.c
	arch/arm/mach-versatile/versatile_dt.c
	arch/arm/mach-versatile/versatile_pb.c
	arch/arm/mach-vexpress/v2m.c
	include/asm-generic/vmlinux.lds.h
2013-01-14 19:55:03 -08:00
Rob Herring 0529e315bb ARM: use common irqchip_init for GIC init
Convert all GIC DT initialization over to use common irqchip_init
function.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2013-01-12 10:47:32 -06:00
Rob Herring 1d5cc604f4 ARM: remove mach .handle_irq for GIC users
Now that the GIC initialization sets up the handle_arch_irq pointer, we
can remove it for all machines and make it static.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-12 10:47:20 -06:00
Stephen Warren 6bb27d7349 ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.

Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-12-24 09:36:38 -07:00
Josh Cartwright 9a45eb691d ARM: zynq: add support for ARCH_MULTIPLATFORM
The majority of changes are necessary to remove dependencies on header
files within arch/arm/mach-zynq/include/mach:

  uncompress.h
    - Deleted. It is unused for ARCH_MULTIPLATFORM builds.

  uart.h:
    - Move uart definitions out of uart.h into debug/zynq.S, which is
      now the only user

  zynq_soc.h:
    - Move SCU address definitions into common.c.
    - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are
      unused and can be dropped

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21 10:52:13 +01:00
Josh Cartwright 385f02b169 ARM: zynq: make use of debug_ll_io_init()
Convert low-level debugging routines to make use of debug_ll_io_init().
This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21 10:52:05 +01:00
Josh Cartwright 667f2988e2 ARM: zynq: remove TTC early mapping
Now that the TTC driver has proper support for DT bindings, it is not
necessary for the registers to be mapped early.  They will be mapped
during clock initialization using of_iomap().  Remove the early mapping.

In addition, remove the extraneous zynq_soc.h include from the timer
driver.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21 10:51:57 +01:00
Josh Cartwright 0f586fbf6f ARM: zynq: use zynq clk bindings
Make the Zynq platform use the newly created zynq clk bindings.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14 16:10:32 +01:00
Josh Cartwright e06f1a9ed7 ARM: zynq: dts: split up device tree
The purpose of the created zynq-7000.dtsi file is to describe the
hardware common to all Zynq 7000-based boards.  Also, get rid of the
zynq-ep107 device tree, since it is not hardware anyone can purchase.

Add a zc702 dts file based on the zynq-7000.dtsi.  Add it to the
dts/Makefile so it is built with the 'dtbs' target.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-12 13:24:48 +01:00
Nick Bowler aaf5e0be79 ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
The main UART on the Xilinx ZC702 board is UART1, located at address
e0001000.  Add a Kconfig option to select this device as the low-level
debugging port.  This allows the really early boot printouts to reach
the USB serial adaptor on this board.

For consistency's sake, add a choice entry for UART0 even though it is
the the default if UART1 is not selected.

Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-07 13:48:43 +01:00
Josh Cartwright 03e07595fe ARM: zynq: move arm-specific sys_timer out of ttc
Move the sys_timer definition out of ttc driver and make it part of the
common zynq code.  This is preparation for renaming and COMMON_CLK
support.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-05 13:38:32 +01:00
Josh Cartwright f58007762f zynq: move static peripheral mappings
Shifting them up into the vmalloc region prevents the following warning,
when booting a zynq qemu target with more than 512mb of RAM:

  BUG: mapping for 0xe0000000 at 0xe0000000 out of vmalloc space

In addition, it allows for reuse of these mappings when the proper
drivers issue requests via ioremap().

There are currently unknown issues with the early uart mapping.  For
now, the uart will be mapped to a known working address.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Cc: John Linn <john.linn@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-10-29 08:54:56 +01:00