In function pci_get_subsys() there is a check:
/*
* pci_find_subsys() can be called on the ide_setup() path,
* super-early in boot. But the down_read() will enable local
* interrupts, which can cause some machines to crash. So here we
* detect and flag that situation and bail out early.
*/
if (unlikely(no_pci_devices()))
return NULL;
But there is no ide_setup() now, and no down_read() either, which
makes the check obsolete. So remove it.
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Previously, the driver ignored resume unless the pciehp_force module_param
was specified. On some laptops that means that interrupts are not
delivered after S3, so card removals and insertions are not handled.
This patch makes the driver handle resume regardless of pciehp_force.
[bhelgaas: changelog]
Signed-off-by: Oliver Neukum <oneukum@suse.de>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
On some platforms, root port has neither MSI/MSI-X nor INTx interrupt
generated in RC mode. In this case, we have to use other interrupt, e.g.,
system shared interrupt, for port service IRQ to have AER, Hot-plug, etc.,
services work.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The fakephp driver was scheduled for removal in 2011.
Fakephp presented /sys/bus/pci/slots/.../power files for every PCI
function. Writing "0" to one of these files logically removed the device
from the system. The PCI core now provides the same functionality with
/sys/bus/pci/devices/.../remove.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This fixes a kernel warning https://lkml.org/lkml/2012/7/31/682
pci_get_subsys() may get called in late system reboot stage, using
a sleepable kmalloc() sounds fragile and will cause a kernel warning
with my recent commmit 55c844a "x86/reboot: Fix a warning message
triggered by stop_other_cpus()" which disable local interrupt in
late system shutdown/reboot phase. Using a local parameter instead
will fix it and make it eligible for calling from atomic context.
Do the same change for the pci_get_class() as suggested by Bjorn Helgaas.
Initializing the on-stack struct pci_device_id suggested by Fengguang Wu
and Jiri Slaby. Section 6.7.8 of the C99 standard guarantees that when we
initialize some of the struct members, the rest of the struct is implicitly
initialized the same as objects with static storage duration, i.e., to zero
in this case.
[bhelgaas: changelog, incorporate Fengguang/Jiri initialization fix]
Bisected-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fengguang Wu <fengguang.wu@intel.com>
* pci/bjorn-cleanup-remove:
PCI: Remove unused pci_dev_b()
sgi-agp: Use list_for_each_entry() for bus->devices traversal
parisc/PCI: Use list_for_each_entry() for bus->devices traversal
parisc/PCI: Enable PERR/SERR on all devices
frv/PCI: Use list_for_each_entry() for bus->devices traversal
PCI: Leave normal LIST_POISON in deleted list entries
PCI: Rename local variables to conventional names
PCI: Remove unused, commented-out, code
PCI: Stop and remove devices in one pass
PCI: Fold stop and remove helpers into their callers
PCI: Use list_for_each_entry() for bus->devices traversal
PCI: Remove pci_stop_and_remove_behind_bridge()
PCI: Don't export stop_bus_device and remove_bus_device interfaces
pcmcia: Use common pci_stop_and_remove_bus_device()
PCI: acpiphp: Use common pci_stop_and_remove_bus_device()
PCI: acpiphp: Stop disabling bridges on remove
Use PCI Express Capability access functions to simplify tsi721 driver.
[bhelgaas: use word (16-bit) accesses for PCI_EXP_DEVCTL, PCI_EXP_DEVCTL2]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
Use PCI Express Capability access functions to simplify cxgb3 driver.
[bhelgaas: split cxgb3 and cxgb4 into separate patches]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use PCI Express Capability access functions to simplify igb driver.
[bhelgaas: split e1000e and igb into separate patches]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Use PCI Express Capability access functions to simplify e1000e driver.
[bhelgaas: split e1000e and igb into separate patches]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Use PCI Express Capability access functions to simplify tg3 driver.
[bhelgaas: split bnx2x and tg3 into separate patches]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use PCI Express Capability access functions to simplify bnx2x driver.
[bhelgaas: split bnx2x and tg3 into separate patches]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Previously, when we turned on the "Enable No Snoop Bit," we cleared all
the other Device Control bits, including error reporting enables,
Max_Payload_Size, Max_Read_Request_Size, etc. This patch preserves
all the other bits.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use PCI Express Capability access functions to simplify ARM PCIe code.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Before initiating an FLR, we should wait for completion of any outstanding
non-posted requests. See PCIe spec r3.0, sec 6.6.2.
This makes reset_intel_82599_sfp_virtfn() very similar to the generic
pcie_flr(). The only difference is that the 82599 doesn't report FLR
support in the VF Device Capability register.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The PCI Express Capability (PCIe spec r3.0, sec 7.8) comes in two
versions, v1 and v2. In v1 Capability structures (PCIe spec r1.0 and
r1.1), some fields are optional, so the structure size depends on the
device type.
This patch adds functions to access this capability so drivers don't
have to be aware of the differences between v1 and v2. Note that these
new functions apply only to the "PCI Express Capability," not to any of
the other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.)
Function pcie_capability_read_word/dword() reads the PCIe Capabilities
register and returns the value in the reference parameter "val". If
the PCIe Capabilities register is not implemented on the PCIe device,
"val" is set to 0.
Function pcie_capability_write_word/dword() writes the value to the
specified PCIe Capability register.
Function pcie_capability_clear_and_set_word/dword() sets and/or clears bits
of a PCIe Capability register.
[bhelgaas: changelog, drop "pci_" prefixes, don't export
pcie_capability_reg_implemented()]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
With introduction of pci_pcie_type(), pci_dev->pcie_type field becomes
redundant, so remove it.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Bjorn Helgaas
Feng Tang
Oliver Neukum
Shengzhou Liu
Jiang Liu
Yijing Wang