Commit Graph

348560 Commits

Author SHA1 Message Date
Lee Jones b9fab6e45d pinctrl/abx500: align GPIO cluster boundaries
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:

    GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */

    if (offset >= cluster->start && offset <= cluster->end)
        /* Valid GPIO for IRQ use */

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:40 +01:00
Lee Jones fa1ec996ac pinctrl/abx500: prevent error path from corrupting returning error
Prior to this patch abx500_gpio_probe() would return the return-value
of gpiochip_remove() during its error patch regardless of what the
actual failure was. So as long as gpiochip_remove() succeeded, probe()
would look like it succeeded too.

This patch ensures the correct error value is returned and that
mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:31 +01:00
John Crispin d8a7c1f134 pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable
The mapping logic inside ltq_pmx_gpio_request_enable() was
broken. This only effected Falcon SoC.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:26 +01:00
John Crispin c58bdc36bc pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show
The current code only has a stub for falcon_pinconf_dbg_show.
This patch adds proper functionality.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:25 +01:00
John Crispin 77ef406272 pinctrl/lantiq: fix pinconfig parameters
The Falcon driver only defined the pinconf parameters but
did not pass them properly to the underlying api.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:25 +01:00
John Crispin 41228b7b33 pinctrl/lantiq: one of the boot leds was defined incorrectly
On the Falcon SoC the bootleds are located on pins 9->14.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:24 +01:00
John Crispin a8ae367f40 pinctrl/lantiq: only probe available pad controllers
The template falcon.dtsi lists all 6 pad controllers that
can be loaded. Only probe those that have status = "okay";
inside the dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:24 +01:00
John Crispin 9338628737 pinctrl/lantiq: the pinconf OD parameter argument was ignored
When setting the OpenDrain bit we should really honour the
argument passed inside the devicetree.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:23 +01:00
John Crispin 6360350cbc pinctrl/lantiq: add output pinconf parameter
While converting the boards inside OpenWrt to OF I noticed
that the we are missing a pinconf parameter to set a pin
to output.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:22 +01:00
John Crispin 3a6b04ca33 pinctrl/lantiq: add pin_config_group_set support
While converting all the boards supported by OpenWrt to OF
I noticed that this feature is missing. Adding it makes the
devicetrees more readable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:22 +01:00
John Crispin 7541083fc4 pinctrl/lantiq: faulty bit inversion
The logic of the OD bit was inverted when calling the
pinconf get method.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:21 +01:00
John Crispin 362ba3cfb4 pinctrl/lantiq: pinconf uses port instead of pin
The XWAY pinctrl driver invalidly uses the port and not the pin
number to work out the registers and bits to be set for the
opendrain and pullup/down resistors.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:21 +01:00
Lee Jones d41e35c364 pinctrl/abx500: destroy mutex if returning early due to error
Current failure path neglects to mutex_destroy() before returning
an error due to an invalid parameter or an error received from
gpiochip_add(). This patch aims to remedy that behaviour.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:24 +01:00
Lee Jones 83b423c885 pinctrl/abx500: beautify the ABX500 pin control driver
This patch provides some superficial changes to the driver to
aid with readability and maintainability. We're mostly fixing
things like white-space errors, spreading out code which as
been clumped together impeding readability and comment layout,
such as using the new "/**" comment start for function headers
etc. No code semantics were harmed in the making of this patch.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:23 +01:00
Lee Jones 1abeebeaa5 pinctrl/abx500: replace incorrect return value
Currently in the empty abx500_pin_config_get() function, we're
returning -EINVAL, with a comment stating that the reason for the
failure is that the function isn't implemented yet. Well there's
a proper return code for that. If we use it, we can do away with
the comment too, as it would be implied.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:22 +01:00
Lee Jones 49dcf086e4 pinctrl/abx500: use the BIT() macro where appropriate
The BIT() macro provides a simple and easy to read way of
obtaining bit offsets into things like masks and hardware
registers. In this patch we're simply replacing all
instances of '1 << x' with 'bit(x)'.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:22 +01:00
Patrice Chotard a8f96e4178 pinctrl/abx500: add AB8540 sub-driver
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:21 +01:00
Patrice Chotard 09dbec3f74 pinctrl/abx500: add AB9540 sub-driver
Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:20 +01:00
Patrice Chotard 1aa2d8d405 pinctrl/abx500: add AB8505 sub-driver
Add AB8505 sub driver to the ABx5x family.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:19 +01:00
Patrice Chotard 3c93799378 pinctrl/abx500: add AB8500 sub-driver
This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:40 +01:00
Patrice Chotard 0493e64930 pinctrl: add abx500 pinctrl driver core
This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.

Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:14 +01:00
Linus Walleij a718ff6f9b gpio: delete AB8500 driver
The AB8500 GPIO driver has been marked BROKEN for ages, and we
have something better in store: a shiny new pinctrl driver. So
let use delete this old driver as the first step.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:14 +01:00
Linus Walleij 56813f798e mfd: ab8500: update header file and version detection
This updates the AB8500 register map with defines for a few
new chip variants and adds version detection helpers to handle
the different variants.

Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:14 +01:00
Linus Walleij 1728c96d3d ARM: ux500: select the DB8540 pin controller
The pin controller is an inherent part of the SoC, without
it the system will not boot, thus it needs to be selected
from Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:05 +01:00
Lee Jones 627c1a8239 ARM: ux500: correct typo in pinctrl Device Tree node
The preference is to use '-' instead of '_' in compatible strings.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 19:10:07 +01:00
Sachin Kamat 2917e8338c pinctrl: core: Make pinctrl_release static
'pinctrl_release' is used only in this file. Hence make it static.

Without this patch we get the following sparse error:
drivers/pinctrl/core.c:815:6: warning:
symbol 'pinctrl_release' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 11:00:58 +01:00
Linus Walleij ab78029ecc drivers/pinctrl: grab default handles from device core
This makes the device core auto-grab the pinctrl handle and set
the "default" (PINCTRL_STATE_DEFAULT) state for every device
that is present in the device model right before probe. This will
account for the lion's share of embedded silicon devcies.

A modification of the semantics for pinctrl_get() is also done:
previously if the pinctrl handle for a certain device was already
taken, the pinctrl core would return an error. Now, since the
core may have already default-grabbed the handle and set its
state to "default", if the handle was already taken, this will
be disregarded and the located, previously instanitated handle
will be returned to the caller.

This way all code in drivers explicitly requesting their pinctrl
handlers will still be functional, and drivers that want to
explicitly retrieve and switch their handles can still do that.
But if the desired functionality is just boilerplate of this
type in the probe() function:

struct pinctrl  *p;

p = devm_pinctrl_get_select_default(&dev);
if (IS_ERR(p)) {
   if (PTR_ERR(p) == -EPROBE_DEFER)
        return -EPROBE_DEFER;
        dev_warn(&dev, "no pinctrl handle\n");
}

The discussion began with the addition of such boilerplate
to the omap4 keypad driver:
http://marc.info/?l=linux-input&m=135091157719300&w=2

A previous approach using notifiers was discussed:
http://marc.info/?l=linux-kernel&m=135263661110528&w=2
This failed because it could not handle deferred probes.

This patch alone does not solve the entire dilemma faced:
whether code should be distributed into the drivers or
if it should be centralized to e.g. a PM domain. But it
solves the immediate issue of the addition of boilerplate
to a lot of drivers that just want to grab the default
state. As mentioned, they can later explicitly retrieve
the handle and set different states, and this could as
well be done by e.g. PM domains as it is only related
to a certain struct device * pointer.

ChangeLog v4->v5 (Stephen):
- Simplified the devicecore grab code.
- Deleted a piece of documentation recommending that pins
  be mapped to a device rather than hogged.
ChangeLog v3->v4 (Linus):
- Drop overzealous NULL checks.
- Move kref initialization to pinctrl_create().
- Seeking Tested-by from Stephen Warren so we do not disturb
  the Tegra platform.
- Seeking ACK on this from Greg (and others who like it) so I
  can merge it through the pinctrl subsystem.
ChangeLog v2->v3 (Linus):
- Abstain from using IS_ERR_OR_NULL() in the driver core,
  Russell recently sent a patch to remove it. Handle the
  NULL case explicitly even though it's a bogus case.
- Make sure we handle probe deferral correctly in the device
  core file. devm_kfree() the container on error so we don't
  waste memory for devices without pinctrl handles.
- Introduce reference counting into the pinctrl core using
  <linux/kref.h> so that we don't release pinctrl handles
  that have been obtained for two or more places.
ChangeLog v1->v2 (Linus):
- Only store a pointer in the device struct, and only allocate
  this if it's really used by the device.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mitch Bradley <wmb@firmworks.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Rickard Andersson <rickard.andersson@stericsson.com>
Cc: Russell King <linux@arm.linux.org.uk>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[swarren: fixed and simplified error-handling in pinctrl_bind_pins(), to
correctly handle deferred probe. Removed admonition from docs not to use
pinctrl hogs for devices]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-23 16:39:51 +01:00
Haojian Zhuang 684697cbbc pinctrl: generic: add slew rate config parameter
Add PIN_CONFIG_SLEW_RATE parameter into pinconf-generic driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-21 15:43:42 +01:00
Haojian Zhuang ef5e3eef6b gpio: use pinctrl device name for add range
gpiochip_add_pin_range() needs pinctrl device name as parameter.
Currently the parameter is pinctrl description name. So fix it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-21 15:16:22 +01:00
Haojian Zhuang d6e99abb42 pinctrl: core: get devname from pinctrl_dev
Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name()
can only get pinctrl description name. If we want to use gpio driver to
find pinctrl device node, we need to fetch the pinctrl device name.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-21 15:14:39 +01:00
Lee Jones 32e67eee67 pinctrl: nomadik: Allow prcm_base to be extracted from Device Tree
The Nomadik Pinctrl driver requires access to some PRCMU registers
in order to run with full functionality. When Device Tree is
disabled the required PRCMU base address is passed in via platform
data, so in order for Device Tree booting to be as functional, we
need a similar mechanism to fetch it from Device Tree.

The new semantics goes like this: Parse the Device Tree and look
for the PRCMU node using a provided Phandle. Obtain the ioremaped
address from that node. If one was supplied via platform data
over-write it with anything found in Device Tree. Fail if either
the prcm_base can't be found if we're running on anything other
than an STN8815 ASIC.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 21:00:56 +01:00
Lee Jones 8979cfef26 ARM: ux500: Provide a link from AB8500 Pinctrl to the PRCMU
The AB8500 Pinctrl driver uses PRCMU register addresses to
control Pinctrl related functions. For this to happen, the
Pinctrl driver needs the PRCMU base to work from. We can do
that using standard Open Firmware (of_*) function calls, but
first we need a mechanism to gain access to the PRCMU
device node. We're going to use a Phandle in this case.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Added reg-names="prcmu"; to the prcmu DT node]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 21:00:27 +01:00
Kukjin Kim 7452b64d01 pinctrl: exynos: change PINCTRL_EXYNOS option
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.

Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 20:35:06 +01:00
Maxime Ripard f868ef995b pinctrl: pinconf-generic: add drive strength parameter
Some pin configurations IP allows to set the current output to the pin.
This patch adds such a parameter to the pinconf-generic mechanism.

This parameter takes as argument the drive strength in mA.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 16:16:28 +01:00
Pritesh Raithatha b6ae7a2653 pinctrl: tegra114: add pinctrl driver for NVIDIA's Tegra114 SoC
This adds a driver for the Tegra114 pinmux, and required
parameterization data for Tegra114.

The driver uses the common Tegra pincontrol driver utility
functions to implement the majority of the driver.

This driver is not compatible with the earlier NVIDIA's SoCs,
hence add new compatibile as "nvidia,tegra114-pinmux".

Originally written by Pritesh.
ldewangan:
	- cleanup the patches,
	- remove non-require tables.
	- Use module_platform_driver() for driver registartion.

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 16:14:54 +01:00
Pritesh Raithatha 348d1bf75c pinctrl: tegra: add support for rcv-sel and drive type
NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e.
rcv-sel and drive type.

rcv-sel: Select between High and Normal VIL/VIH receivers.
	RCVR_SEL=1: High VIL/VIH
	RCVR_SEL=0: Normal VIL/VIH

drv_type: Ouptput drive type:
	33-50 ohm driver: 0x1
	66-100ohm driver: 0x0

Add support of these parameters to be configure from DTS file.

Tegra20 and Tegra30 does not support this configuration and hence initialize their
pinmux structure with reg = -1.

Originally written by Pritesh Raithatha.
Changes by ldewangan:
	- remove drvtype_width as it is always 2.
	- Better describe the change.

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 16:13:52 +01:00
Linus Walleij b2083062a3 pinctrl: do not defer device tree hogs
commit af1024e0f7cde9023ddd0f3116db03911d5914c0
"pinctrl: skip deferral of hogs"

Attempts to avoid probe deferral on hogged pins, but we
forgot the device tree case. This patch fixes this.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:21 +01:00
Gabriel Fernandez e32af88945 pinctrl/nomadik: add device tree support
This implements pin multiplexing and pin configuration for
the Nomadik pin controller using the device tree.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:21 +01:00
Linus Walleij 50f690d85e pinctrl/nomadik: simplify GPIO probe
Instead of jumping to a label later in the probe just return
with an error code whenever probe() fails. Make sure to remove
the gpiochip on irqdomain error now that we're at it.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:20 +01:00
Linus Walleij aa6e379aef pinctrl/nomadik: make independent of <mach/irqs.h>
Some leftovers in the driver were using NOMADIK_* macros to
translate the irq numbers to offsets, while the first base IRQ
was already being passed from platform data, and the function
setting the disable mask could just as well use the irqdomain.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:20 +01:00
Linus Walleij 483f33f63c pinctrl: add pinconf-generic defines for output
This adds a definition of a generic output configuration
for a certain pin when using the generic pin configuration
library. Whereas driving pins low/high is usually a GPIO
business, you may want to set up pins into a default state
using hogs, and never touch them again. This helps out
with that scenario.

Based on a patch from Patrice Chotard.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:20 +01:00
Julien Delacou 8d99b32d7b pinctrl/nomadik: adopt pinctrl sleep mode management
This fix makes pinctrl-nomadik able to handle
suspend/resume events and change hogged pins states
accordingly.

Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:49:20 +01:00
Julien Delacou 840a47ba43 pinctrl: add sleep mode management for hogs
This fix allows handling sleep mode for hogged
pins in pinctrl. It provides functions to set pins
to sleep/default configurations according to their
current state.

Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:48:05 +01:00
Linus Walleij 89216494ae pinctrl: skip deferral of hogs
Up until now, as hogs were always taken at the end of the
pin control device registration, it didn't cause any problem.
But when starting to hog pins from the device core it will
cause deferral of the pin controller device itself since the
default pin fetch is done *before* the device probes, so
let's fix this annoyance (which is also aesthetically ugly).

Also take some care to make sure that if any one map entry
results in a deferral rather than a failure, then that
deferral will take precedence.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-11 21:48:05 +01:00
Linus Torvalds 9931faca02 Linux 3.8-rc3 2013-01-09 18:59:55 -08:00
Linus Torvalds 5c49985c21 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
  ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable
  ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
  ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM
  ARM: 7611/1: VIC: fix bug in VIC irqdomain code
  ARM: 7610/1: versatile: bump IRQ numbers
  ARM: 7609/1: disable errata work-arounds which access secure registers
  ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
2013-01-09 08:58:57 -08:00
Linus Torvalds 57a0c1e2d6 Two error path fixes causing a crash and a Kconfig fix for an issue
which spilled all EDAC suboptions into the 'Device Drivers' menu.
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Merge tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC fixes from Borislav Petkov:
 "Two error path fixes causing a crash and a Kconfig fix for an issue
  which spilled all EDAC suboptions into the 'Device Drivers' menu."

* tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC: Cleanup device deregistering path
  EDAC: Fix EDAC Kconfig menu
  EDAC: Fix kernel panic on module unloading
2013-01-09 08:43:56 -08:00
Linus Torvalds e53289c0c5 mm: reinstante dropped pmd_trans_splitting() check
The check for a pmd being in the process of being split was dropped by
mistake by commit d10e63f294 ("mm: numa: Create basic numa page
hinting infrastructure"). Put it back.

Reported-by: Dave Jones <davej@redhat.com>
Debugged-by: Hillf Danton <dhillf@gmail.com>
Acked-by: Andrea Arcangeli <aarcange@redhat.com>
Acked-by: Mel Gorman <mgorman@suse.de>
Cc: Kirill Shutemov <kirill@shutemov.name>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-01-09 08:36:54 -08:00
Marc Dionne 08c097fc3b cred: Remove tgcred pointer from struct cred
Commit 3a50597de8 ("KEYS: Make the session and process keyrings
per-thread") removed the definition of the thread_group_cred structure,
but left a now unused pointer in struct cred.

Signed-off-by: Marc Dionne <marc.c.dionne@gmail.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-01-09 08:26:53 -08:00
Linus Torvalds 974b33586b ARM: arm-soc fixes for 3.8-rc
People are back from the holiday breaks, and it shows. Here are a bunch of
 fixes for a number of platforms:
  - A couple of small fixes for Nomadik
  - A larger set of changes for kirkwood/mvebu
    - uart driver selection, dt clocks, gpio-poweroff fixups,
      a few __init annotation fixes and some error handling improvement
      in their xor dma driver.
  - i.MX had a couple of minor fixes (and a critical one for flexcan2
    clock setup)
  - MXS has a small board fix and a framebuffer bugfix
  - A set of fixes for Samsung Exynos, fixing default bootargs and some
    Exynos5440 clock issues
  - A set of OMAP changes including PM fixes and a few sparse warning
    fixups
 
 All in all a bit more positive code delta than we'd ideally want to see
 here, mostly from the OMAP PM changes, but nothing overly crazy.
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Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "People are back from the holiday breaks, and it shows.  Here are a
  bunch of fixes for a number of platforms:
   - A couple of small fixes for Nomadik
   - A larger set of changes for kirkwood/mvebu
     - uart driver selection, dt clocks, gpio-poweroff fixups, a few
       __init annotation fixes and some error handling improvement in
       their xor dma driver.
   - i.MX had a couple of minor fixes (and a critical one for flexcan2
     clock setup)
   - MXS has a small board fix and a framebuffer bugfix
   - A set of fixes for Samsung Exynos, fixing default bootargs and some
     Exynos5440 clock issues
   - A set of OMAP changes including PM fixes and a few sparse warning
     fixups

  All in all a bit more positive code delta than we'd ideally want to
  see here, mostly from the OMAP PM changes, but nothing overly crazy."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
  ARM: clps711x: Fix bad merge of clockevents setup
  ARM: highbank: save and restore L2 cache and GIC on suspend
  ARM: highbank: add a power request clear
  ARM: highbank: fix secondary boot and hotplug
  ARM: highbank: fix typos with hignbank in power request functions
  ARM: dts: fix highbank cpu mpidr values
  ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  ...
2013-01-08 18:53:56 -08:00